1. Field of the Invention
The present invention generally relates to a signal processing circuit for slicing binary signals in a receiver. More particularly, the present invention relates to a signal processing circuit that generates an adaptive slicer threshold by using either average amplitude data of both binary ones and binary zeros, or minimum amplitude data of a binary one and maximum amplitude data of a binary zero.
2. Discussion of the Related Art
Data communication using binary signals takes place at high rates in various applications. For example, in optical data systems, data transmission rates of 10 gigabits/second (Gb/s) and higher are utilized. In such binary data communication systems, a receiver is used for receiving the binary signals from a transmitter. In many cases, the signals received are of a low level and are accompanied by noise and/or jitter (see
To improve the ability to accurately recapture the binary signals passing through the receiver before being supplied to other equipment, a slicing technique is employed. This technique involves slicing the received binary signal at a level about the midpoint of its amplitude, that is, between its maximum and minimum values. The portion of the received binary signal appearing above the slicing level corresponds to a binary one and the portion below the slicing level corresponds to a binary zero (see
In one type of prior art slicer circuit, the slicer threshold is fixed at a certain voltage level. A variable offset voltage is combined with the voltage level of the received binary signal to maintain the midpoint of the binary signal that is applied to the slicer at the fixed slicer threshold. However, adjusting the received binary signal to maintain the midpoint of the binary signal at a fixed level adds complexity to a system.
In another type of prior art slicer circuit, the slicer threshold is varied so as to be at the midpoint of the amplitude of the binary signal, wherein the midpoint is calculated to be the average of the maximum and minimum values of the received binary signal. However, the midpoint that is calculated using the maximum and minimum values of the received binary signal is the midpoint between the outer edges of the data eye 100, 200 (see
Thus, a slicer circuit that is capable of accurately determining the midpoint between the average values of the data eye 100, 200 or the inner edges of the data eye 100, 200 is required.
For example, if a received binary signal encounters a positive DC offset, the data eye 100 will reflect a data sample that is offset in the positive voltage direction (i.e., the data sample will be shifted upward within
The slicer threshold 140 is, therefore, adaptively generated to track the data eye 100. A received binary signal is compared to the slicer threshold 140 to determine whether the received binary signal will be read as a binary one or as a binary zero.
The adaptive slicer threshold generation system 400 includes a first moving average filter 410 (see
According to an embodiment of the invention, the first moving average filter 410 and/or the second moving average filter 420 includes a leakage element 425, 475 to control an adaptation rate of the slicer threshold 140.
The adaptive slicer threshold generation system 500 includes a minimum detector 510 (see
According to an embodiment of the invention, the minimum detector 510 and/or the peak detector 520 includes a leakage element 545, 595 to control an adaptation rate of the slicer threshold 140.
The first moving average filter 410 averages binary ones 110 (see
The second moving average filter 420 averages binary zeros 120 (see
The adaptive slicer threshold generation system 400 selects a slicer threshold 140 (see
According to an embodiment of the present invention, the adaptive slicer threshold generation system 400 further includes a first absolute value element 450, a second absolute value element 460, and a switch 470. In a three level system (i.e., when a received binary signal may be either a binary one, a binary zero, or a binary negative one), the first absolute value element 450 and the second absolute value element 460 convert a binary negative one into a binary one. This technique assumes that a received binary signal is symmetric. The first absolute value element 450 receives a received binary signal. The second absolute value element 460 receives an Rdata signal. The Rdata signal is the received binary signal that has preferably passed through a comparator. The comparator outputs a digitized received binary signal to control the switch 470. The switch 470 receives the digitized received binary signal and connects the received binary signal that has passed through the first absolute value element 450 to either the first moving average filter 410 or the second moving average filter 420. If the digitized received binary signal is a binary one, then the switch 470 connects the received binary signal that has passed through the first absolute value element 450 to the first moving average filter 410. If the digitized received binary signal is a binary zero, then the switch 470 connects the received binary signal that has passed through the first absolute value element 450 to the second moving average filter 420.
The minimum detector 510 receives a binary signal to determine a minimum value of a binary one. The minimum detector 510 illustratively includes a minimum comparator 505, a combiner 515, a gain element 525, and a delay element 535. The minimum comparator 505 compares a received binary signal, vin(n), and a delayed output signal, vout(n−1), of the minimum comparator 505. The delayed output signal, vout(n−1), of the minimum comparator 505 results when an output signal, vout(n), of the minimum comparator 505 is passed through both the combiner 515 and the delay element 535. The combiner 515 combines the output signal, vout(n), of the minimum comparator 505 with preferably a leakage signal, vL(n). The leakage signal, vL(n), is a sample of the output signal, vout(n), of the combiner 515 that has passed through the gain element 525.
If the received binary signal, vin(n), of the minimum comparator 505 of the minimum detector 510 is less than the delayed output signal, vout(n−1), of the minimum comparator 505 that has passed through both the combiner 515 and the delay element 535, then the minimum comparator 505 outputs the received binary signal, vin(n), of the minimum comparator 505. Thus, the output signal, vout(n), of the minimum comparator 505 substantially equals the received binary signal, vin(n), of the minimum comparator 505. In this case, the received binary signal, vin(n), of the minimum comparator 505 is preferably stored in a storage element that may be coupled to the output node of the minimum comparator 505. Storage of the received binary signal, vin(n), of the minimum comparator 505 occurs when the minimum comparator 505 outputs the output signal, vout(n), that substantially equals the received binary signal, vin(n), of the minimum comparator 505. The storage element may be the combiner 515; however, any other suitable device may be used. The gain of the gain element 525 is preferably substantially less than one, so that the leakage signal, vL(n), eventually approximates a value of zero. The delay element 535 delays the output signal, vout(n), of the combiner 515 that is compared with the received binary signal, vin(n), by the minimum comparator 505.
If the received binary signal, vin(n), of the minimum comparator 505 of the minimum detector 510 is not less than the delayed output signal, vout(n−1), of the minimum comparator 505 that has passed through both the combiner 515 and the delay element 535, then the minimum comparator 505 outputs the delayed output signal, vout(n−1), of the minimum comparator 505. Thus, the output signal, vout(n), of the minimum comparator 505 substantially equals the delayed output signal, vout(n−1), of the minimum comparator 505. In this case, the delayed output signal, vout(n−1), of the minimum comparator 505 is preferably stored in a storage element that may be coupled to the output node of the minimum comparator 505. Storage of the delayed output signal, vout(n−1), of the minimum comparator 505 occurs when the minimum comparator 505 outputs the output signal, vout(n), that substantially equals the delayed output signal, vout(n−1), of the minimum comparator 505. The storage element may be the combiner 515; however, any other suitable device may be used.
Thus, the minimum detector 510 tracks the lower boundary (i.e., inner edge) of the portion of the data eye 100, 200 (see
The peak detector 520 receives a binary signal to determine a maximum value of a binary zero. The peak detector 520 illustratively includes a peak comparator 555, a combiner 565, a gain element 575, and a delay element 585. The peak comparator 555 compares a received binary signal, vin(n), and a delayed output signal, vout(n−1), of the peak comparator 555. The delayed output signal, vout(n−1), of the peak comparator 555 results when an output signal, vout(n), of the peak comparator 555 is passed through both the combiner 565 and the delay element 585. The combiner 565 combines the output signal, vout(n), of the peak comparator 555 with preferably a leakage signal, vL(n). The leakage signal, vL(n), is a sample of the output signal, vout(n), of the combiner 565 that has passed through the gain element 575.
If the received binary signal, vin(n), of the peak comparator 555 of the peak detector 520 is more than the delayed output signal, vout(n−1), of the peak comparator 555 that has passed through both the combiner 565 and the delay element 585, then the peak comparator 555 outputs the received binary signal, vin(n), of the peak comparator 555. Thus, the output signal, vout(n), of the peak comparator 555 substantially equals the received binary signal, vin(n), of the peak comparator 555. In this case, the received binary signal, vin(n), of the peak comparator 555 is preferably stored in a storage element that may be coupled to the output node of the peak comparator 555. Storage of the received binary signal, vin(n), of the peak comparator 555 occurs when the peak comparator 555 outputs the output signal, vout(n), that substantially equals the received binary signal, vin(n), of the peak comparator 555. The storage element may be the combiner 565; however, any other suitable device may be used. The gain of the gain element 575 is preferably substantially less than one, so that the leakage signal, vL(n), eventually approximates a value of zero. The delay element 585 delays the output signal, vout(n), of the combiner 565 that is compared with the received binary signal, vin(n), by the peak comparator 555.
If the received binary signal, vin(n), of the peak comparator 555 of the peak detector 520 is not more than the delayed output signal, vout(n−1), of the peak comparator 555 that has passed through both the combiner 565 and the delay element 585, then the peak comparator 555 outputs the delayed output signal, vout(n−1), of the peak comparator 555. Thus, the output signal, vout(n), of the peak comparator 555 substantially equals the delayed output signal, vout(n−1), of the peak comparator 555. In this case, the delayed output signal, vout(n−1), of the peak comparator 555 is preferably stored in a storage element that may be coupled to the output node of the peak comparator 555. Storage of the delayed output signal, vout(n−1), of the peak comparator 555 occurs when the peak comparator 555 outputs the output signal, vout(n), that substantially equals the delayed output signal, vout(n−1), of the peak comparator 555. The storage element may be the combiner 565; however, any other suitable device may be used.
Thus, the peak detector 520 tracks the upper boundary (i.e., inner edge) of the portion of the data eye 100, 200 (see
The combiner 430 combines the minimum value of the binary one and the maximum value of the binary zero to generate a combined output. The gain element 440 preferably sets a value of a slicer threshold 140 within a data eye 100, 200.
The adaptive slicer threshold generation system 500 selects a slicer threshold 140 (see
According to an embodiment of the present invention, the adaptive slicer threshold generation system 500 further includes a first absolute value element 450, a second absolute value element 460, and a switch 470. The switch 470 receives the digitized received binary signal and connects the received binary signal that has passed through the first absolute value element 450 to either the minimum detector 510 or the peak detector 520. If the digitized received binary signal is a binary one, then the switch 470 connects the received binary signal that has passed through the first absolute value element 450 to the minimum detector 510. If the digitized received binary signal is a binary zero, then the switch 470 connects the received binary signal that has passed through the first absolute value element 450 to the peak detector 520.
In summary, the adaptive slicer threshold generation system 400 (see
The adaptive slicer threshold generation system 400, 500 improves noise immunity for a receiver system, such as an Intel LXT3108 T1 receiver. Furthermore, the adaptive slicer threshold generation system 400, 500 of the present invention uses amplitude data of both binary ones 110 and binary zeros 120 to calculate the midpoint of a data eye 100, 200, providing a more accurate representation of the data eye 100, 200 than systems that use only a received peak value.
While the description above refers to particular embodiments of the present invention, it will be understood that many modifications may be made without departing from the spirit thereof. The accompanying claims are intended to cover such modifications as would fall within the true scope and spirit of the present invention. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims, rather than the foregoing description, and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Number | Name | Date | Kind |
---|---|---|---|
4692765 | Politis et al. | Sep 1987 | A |
4700365 | Casey | Oct 1987 | A |
4736163 | Berkhout et al. | Apr 1988 | A |
4823360 | Tremblay et al. | Apr 1989 | A |
4873700 | Wong | Oct 1989 | A |
5371545 | Tults | Dec 1994 | A |
5412692 | Uchida | May 1995 | A |
5483289 | Urade et al. | Jan 1996 | A |
5670951 | Servilio et al. | Sep 1997 | A |
5832039 | Rijns | Nov 1998 | A |
6026773 | LaBelle | Feb 2000 | A |
6041084 | Nagaraj | Mar 2000 | A |
6178210 | Craig et al. | Jan 2001 | B1 |
6263018 | Lee | Jul 2001 | B1 |
6492929 | Coffey et al. | Dec 2002 | B1 |
6556635 | Dehghan | Apr 2003 | B1 |
6735260 | Eliezer et al. | May 2004 | B1 |
20020001354 | McNally | Jan 2002 | A1 |
20020122504 | Payne et al. | Sep 2002 | A1 |
Number | Date | Country |
---|---|---|
001148682 | Oct 2001 | EP |
Number | Date | Country | |
---|---|---|---|
20030081697 A1 | May 2003 | US |