The present invention relates to apparatus and receivers based thereon, for determining in a communication system using frequency modulation schemes (such as, for example, Gaussian Frequency Shift Keying, GFSK) a frequency offset error in a modulated received signal. In particular, the present invention applies to Bluetooth receivers.
Many receivers require detection means that enable the receiver to detect a preamble or certain delimiters. This is of particular importance in communication systems where the transmitter and receiver operate in an asynchronous mode. Since the receiver does not know when to expect a signal with payload (herein also referred to as signal burst), the payload is typically preceded by a preamble or start delimiter that is detectable by the receiver.
Especially Bluetooth communication systems, where the preamble phase is very short (only 4 bits), require at the beginning of the signal burst a very fast settling procedure for the receiver. In Bluetooth applications, information is transmitted in the form of packets. A Bluetooth packet has an access code with a four bit preamble, a 64 bit “sync word”, a four bit trailer. This access code precedes the random payload data (plus header). The “sync word” is unique to the wireless connection that involves the receiving device. That is, a receiving device understands whether or not a packet received at its antenna is being sent to the receiving device (or another receiving device) by correlating (via a correlation circuit within the receiver's downstream processing circuitry) the sync word against the connection's unique word.
The received signal usually shows some frequency offset that makes it difficult for the receiver to reliably demodulate the package including the sync word. This implies that in some microseconds the frequency offset should be at least roughly removed prior to the sync word and at the same time the edges of the symbol clock signal should be roughly settled close to the middle of the received symbols.
In order to remove quickly the frequency offset in a Bluetooth GFSK modulated antenna signal, usually a MaxMin DC extraction circuit is implemented. In addition to this MaxMin detection, typically a leakage mechanism is employed to reduce the effect of the noise.
Known preamble detection schemes, such as the MaxMin detection scheme as used in conventional analog Bluetooth demodulators, are not very well suited for a digital implementation. Some kinds of preamble detection schemes require that the receiver is provided with a special triggering signal that indicates the signal burst. The respective receiver architectures are complicated.
It is important that the preceding noise does not degrade the required preamble settling process. The MaxMin algorithm, as used in prior art Bluetooth receivers, usually fails due to the preceding noise. Failing means here, that the package error rate (PER) is too high. If there are too many bit errors in the access code, then the received package is rejected which is considered to be a package error.
The location of the searched preamble sequence (e.g., “1010”) is especially aggravated by a low S/N ratio, if one assumes a low antenna input signal being received. In this case, the noise of the receiver front-end degrades the wanted signal.
It is a further disadvantage of known Bluetooth approaches based on the MaxMin algorithm, that the compensation may depend on potential wrong historical values. Due to this, the frequency demodulated signal after activating a conventional Bluetooth receiver, but prior to the signal burst, would generate a wrong initial value for the MaxMin algorithm and even the use of the known leakage concept either slows down the offset calculation or reduces dramatically the accuracy.
It is an object of the present invention to provide an improved apparatus that allows to quickly and reliably detect a preamble used, for example, in an FSK or DFSK communication and to estimate and/or remove the offset.
It is another object of the present invention to provide an improved receiver comprising such an improved apparatus.
These and other objects are accomplished by an apparatus according to claim 1 and a receiver according to claim 13. Further advantageous implementations of the apparatus are claimed in claims 2-12. Further advantageous implementations of the receiver are claimed in claims 14 and 15.
The invention proposed herein allows determining a rough offset in a very short time period. According to the present invention, this is achieved using a frequency demodulated signal without the accurate knowledge of the beginning of the signal burst. As an example, the frequency demodulated signal is derived from an FSK or GFSK-modulated signal (herein referred to as antenna signal) received via a communication channel. Other frequency modulation schemes can be used as well.
According to the present invention, a simplified receiver architecture may be employed using comparators instead of analog-to-digital converts (ADCs) in order to convert the so-called analog I and Q signals to the digital domain. The simplified receiver architecture extracts only the frequency information (ω0(t)) from the I and Q signals. The signal that carries or represents the frequency information is herein referred to as frequency demodulated signal.
Since the simplified receiver extracts only the frequency information, a triggering signal indicating the start of the signal burst is not available. Due to the fact that the exact timing of the beginning of the signal burst is not known, the receiver has to be activated a certain time (several microseconds) prior to the signal burst and the receiver back-end part needs a special approach to determine the frequency offset error in the short preamble phase.
The proposed digital apparatus for the fast offset compensation is based on a correlator. If in the antenna signal a sequence of “1010”, corresponding to the preamble phase, occurs, then a digital frequency offset value is immediately calculated and subtracted from the digital frequency demodulated signal. As mentioned above, the location of the preamble sequence looked for is especially aggravated by a low S/N ratio. The digital apparatus, according to the present invention, is able to operate even under such adverse conditions.
According to the present invention, two criteria have to be fulfilled. Firstly, the correlation with a time-limited (the time-window corresponds to 2 cycles=4 μsec) sine wave signal of 500 kHz has to exceed a certain limit and secondly, the expected peaks of the positive and negative half-waves have to have certain distances. Every time the proposed digital apparatus detects the corresponding preamble sequence, the offset error is newly calculated and subtracted. In contrast to the known MaxMin algorithm, the compensation is not anymore dependent of potential wrong historical values. A conventional Bluetooth receiver would thus generate a wrong initial value for the MaxMin algorithm.
The present invention will now be described in more detail, by way of example, with reference to the accompanying drawings, wherein:
A Bluetooth radio receiver 10, according to the present invention, being designed for GFSK demodulation is described in connection with
The back-end block 16 of the receiver 10 (also referred to as demodulator) is depicted in
At the output bus 23.1 of the low-pass filter 23, a digital signal demod_lp is provided that represents the frequency information. In the present example, the bus 23.1 is 9 bits wide (9 bit resolution). An adder 24 is employed in order to subtract a digital value 138 (corresponding to IF=1000 KHz) from the signal demod_lp. This allows the center frequency to be set to zero. At the adder's output bus 24.1 a digitally coded frequency demodulated signal demod_lp2 is made available. This frequency demodulated signal demod_lp2 is fed into the fast offset compensation block 20, that embodies the core of the invention.
The back-end block 16 may further comprise a slow offset compensation block 29 to reduce any residual offset followed by a comparator 29.1 serving as zero threshold slicer and a clock recovery unit 29.2 that extracts the bit clock from the signal demod soc, provided at the output 29.4 of the slow offset compensation block 29. A flip-flop 29.3 is employed to provide the bits (access code, header, and payload) representing the information that was transmitted. The bits output by the flip-flop 29.3 are referred to as RxData.
The back-end block 16 extracts the data bits (or symbols) from the baseband I and Q signals I_NZIF and Q_NZIF. In order to get enough zero-crossings in the I_NZIF and Q_NZIF signals, a LIF architecture is applied. An intermediate frequency of e.g. 0 would result in much less zero-crossings and therefore the limiter concept based on comparators 17 would not be anymore applicable. In terms of process spread and sensitivity there is a large advantage to former architectures: after the I and Q comparators 17, the whole back end circuitry is purely digital.
The drawback of the concept of using simple comparators 17 for the baseband I_NZIF and Q_NZIF signals is the reduction of the available information. Since the amplitude information of the antenna signal VAntenna is not anymore available after the comparators 17, especially the beginning of the burst signal with the preamble code is quite tricky to locate correctly.
Details of a first embodiment of the fast offset compensation block 20 are depicted in
Details of a second embodiment of the fast offset compensation block 20 are depicted in
Further details of third embodiment are depicted in
The apparatus 20 (cf.
There are subtractors A and B, 36.1, 36.2, with subsequent comparators 36.3, 36.4.
As already mentioned in the introduction, the correlation only is not sufficient for a reliable detection of “1010” sequences. The correlator 35.1 together with the peak detector 35.2 and the comparator 35.3 sometimes provides an o.k. signal (ok_crit1) for non “1010” sequences. For example, a sequence of “1110” with larger signal swings than the searched sequence could result in a large correlation value even with the second symbol=1 and therefore may lead to a wrong interpretation (cf.
In order to sort out this kind of “wrong” detections, a second criterion was chosen by calculating two subtractions in order to compare all four received symbols (in the correlation time-window) with the corresponding amplitudes. One possible implementation is shown in the
The offset register 37.2 is initialized with zero and is always, that is during the preburst and access code phase, up-dated with the value coming from the average detector 37.1 in the case where all the criteria are fulfilled (correlation and certain distances between the positive and negative waves). The up-date procedure of the offset results in total loosing of the former value and has the advantage to get immediately rid of the wrong value calculated during the preburst phase. This value is a random number reflecting the received noise (cf.
An offset compensator 38 is employed in order to continuously subtract the value stored in the offset register 37.2 from the demodulated signal demod_lp2. The result, referred to as signal demod_foc, is released from large frequency offset errors. The signal demod_foc still comprises some noise. This residual small error may be reduced in a subsequent slow offset compensation block 29, as indicated in
One possible implementation on gate level with flip-flops of a subtractor 50 A and B is shown in
The building blocks of the apparatus 20 may be realized using dedicated locig, or they may be realized using micro processors or digital signal processors (DSPs), as described in connection with
The digital means 26 or 36 for a minimum-maximum evaluation determine whether the distance between a first minimum and maximum pair is larger than the threshold_2 value. If the distance between a second minimum and maximum pair is
larger than the threshold_2 value, too, the second criterion (referred to as minimum-maximum criterion) is satisfied.
Only if the minimum-maximum criterion and the correlation criterion are both o.k., a valid preamble was detected and the frequency offset is calculated and subtracted.
A simulated ideal antenna signal VAntenna, that is a signal without noise and with no distortions, is illustrated in
In
In
The two band-limited I and Q signals with band-limited noise are illustrated in
A typical IF GFSK signal, as derived from an antenna signal VAntenna, is illustrated in
In
In
Apart of the main task of demodulating the symbols from the incoming GFSK modulated signal (antenna signal VAntenna), some signal processing is necessary such as clock recovery and frequency offset compensation. If there is a mismatch between the reference frequencies of both communication partners, a frequency offset is generated resulting in a unwanted DC component in the demodulated signal demod_lp.
In order to reduce cost and power consumption, digital demodulators will be used in future Bluetooth systems. The main issue of the respective digitally-implemented receiver back-end is the fast frequency offset compensation using the known MaxMin algorithm. Sometimes, the calculated offset is very inaccurate (or totally wrong) resulting in a high package error rate. Since the preamble phase of only 4 symbols is very short, a very fast settling procedure for the receiver is required. In addition, the exact beginning of the preamble sequence is unknown and therefore the demodulated frequency signal (after activating the receiver part, but prior to the burst) generates a wrong initial value for the MaxMin algorithm. This error is caused by the noise signal (prior to the signal burst) containing huge frequency amplitudes. Even the use of the known leakage concept reducing the effect of the wrong initial value (after a certain time) did not satisfy the PER requirements.
The apparatus for frequency offset compensation, according to the present invention, is very well suited for being used in connection with a digital demodulator, like the one being illustrated in
As described above, the proposed digital apparatus for the fast offset compensation is based on a correlator. If in the antenna signal a sequence of “1010” occurs—corresponding to the Bluetooth preamble phase—an offset value is immediately calculated and subtracted from the signal. In order to increase the reliability of the right detection two criteria, as described above, have to be fulfilled. Apart from a minimum correlation value, the peaks of the positive and negative half-waves have to have a certain distance. Every time both criteria are fulfilled (i.e. the circuit has detected the corresponding sequence), the offset error is newly calculated and subtracted.
It is another advantage of the present invention that the knowledge about the actual location of the preamble phase also allows to improve the clock recovery of the receiver. Once the preamble has been detected using a digital apparatus, according to the present invention, a coarse phase information of the incoming received signal is available which can be used for initializing a digital phase locked loop (DPLL).
The present invention can be applied for all communication standards using frequency shift keying (FSK) modulation schemes such as DECT, Pager and Bluetooth standards. However, the speed requirement for the offset calculation in a DECT application, for example, is relaxed compared to Bluetooth due to the longer preamble phase (DECT has 16 preamble symbols) and therefore a simpler methodology might be applied where just the correlation criterion is examined. In a DECT implementation of the invention, it may not be necessary to apply the minimum-maximum criterion in addition to the correlation criterion.
The present invention can be used in mobile phones and other mobile devices, for example.
In the drawings and specification there has been set forth preferred embodiments of the invention and, although specific terms are used, the description thus given uses terminology in a generic and descriptive sense only and not for purposes of limitation.
Number | Date | Country | Kind |
---|---|---|---|
03300192 | Nov 2003 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/IB2004/003562 | 10/29/2004 | WO | 00 | 5/1/2006 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2005/043852 | 5/12/2005 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
4888744 | Keeler | Dec 1989 | A |
5894593 | Cadd | Apr 1999 | A |
6356608 | Atarius | Mar 2002 | B1 |
6642797 | Luo et al. | Nov 2003 | B1 |
6657986 | Laudel et al. | Dec 2003 | B1 |
6671379 | Nemirovski | Dec 2003 | B2 |
6891905 | Malone et al. | May 2005 | B1 |
6934524 | Hansen et al. | Aug 2005 | B2 |
20030043937 | Kobayashi et al. | Mar 2003 | A1 |
20030043947 | Zehavi et al. | Mar 2003 | A1 |
Number | Date | Country |
---|---|---|
1217781 | Jun 2002 | EP |
0126260 | Apr 2001 | WO |
02082757 | Oct 2002 | WO |
Number | Date | Country | |
---|---|---|---|
20070041479 A1 | Feb 2007 | US |