Information
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Patent Grant
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4705432
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Patent Number
4,705,432
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Date Filed
Thursday, December 19, 198539 years ago
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Date Issued
Tuesday, November 10, 198737 years ago
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Inventors
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Original Assignees
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Examiners
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CPC
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US Classifications
Field of Search
US
- 425 6
- 425 7
- 425 10
- 209 3
- 264 5
- 264 6
- 264 11-14
- 210 196
- 210 410
- 422 273
- 422 262
- 422 268
- 422 269
- 422 272
- 422 256
- 023 293 S
- 023 308 S
- 029 DIG 1FICALLY, AS DISCLOSED IN THE AFORESAID COPENDING CARLSON, ET AL APPLICATION, A BURT PYRAMID ANALYZER, AN FSD PYRAMID ANALYZER OR A PYRAMID SYNTHESIZER, AS THE CASE MAY BE, IS COMPRISED OF N STAGES, WHERE N IS A PLURAL INTEGER THE GAUSSIAN INPUT SIGNAL TO STAGE K (WHERE K HAS A VALUE BETWEEN 1 AND N) OF A BURT OR FSD PYRAMID ANALYZER STAGE IS DESIGNATED GSUBK-1
- 029 THE OUTPUT GAUSSIAN SIGNAL FROM STAGE K OF A BURT OR FSD PYRAMID ANALYZER STAGE IS DESIGNATED GSUBK, AND THE LAPLACIAN OUTPUT SIGNAL FROM STAGE K OF A BURT OR FSD PYRAMID ANALYZER STAGE IS DESIGNATED LSUBK-1 THE GAUSSIAN INPUT SIGNAL TO STAGE K OF A PYRAMID SYNTHESIZER IS DESIGNATED G'SUBK
- 029 THE LAPLACIAN INPUT SIGNAL TO STAGE K OF A PYRAMID SYNTHESIZER IS DESIGNATED L'SUBK-1, AND THE GAUSSIAN OUTPUT SIGNAL FROM STAGE K OF A PYRAMID SYNTHESIZER IS DESIGNATED G'SUBK-1 EACH OF RESPECTIVE INPUT SIGNALS GSUBK-1, G'SUBK AND L'SUBK-1 IN FIGS 4 A, 4B AND 4C CONSTITUTES AN INPUT SIGNAL TO THE FILTER LOGIC UNIT 200 OF FIG 2, WHILE EACH OF THE RESPECTIVE OUTPUT SIGNALS GSUBK, LSUBK-1 AND G'SUBK-1 OF FIGS 4A, 4B AND 4C CONSTITUTE AN OUTPUT SIGNAL FROM THE FILTER LOGIC UNIT 200 OF FIG 2
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International Classifications
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Claims
- 1. In a delayed real time multiresolution processing apparatus utilizing digital techniques for operating during each of successive time cycles at respective levels of resolution which respective levels of resolution differ from each other, on a series of termporal signal samples that define at least one block of an n-dimensional information component, where n is a given integer of at least one, each of said time cycles being composed of a certain number of sample periods that is at least as large as the number of temporal signal samples in said series; the combination comprising:
- a programmable filter logic unit for deriving during each successive time cycle a set of one or more sampled-signal outputs therefrom as specified selectable functions of a set of one or more sampled-signal inputs thereto in accordance with the values of applied first digital control signals, whereby said programmable filter logic unit sequentially performs processing at each of said respective levels of resolution;
- a plurality of addressable read/write memory means each of which is separately addressable in each of said n dimensions, each of said memory means being controllable in accordance with the values of applied second digital control signals;
- programmable coupling means including a first set of multiplexers (MUX) individually associated with each of said filter logic unit outputs and a second set of MUX individually associated with each of filter logic unit inputs for selectively coupling:
- (1) any filter logic unit output as a write-input to a selected one of at least two of said memory means through that one of said first set of MUX individually associated with that filter logic unit output,
- (2) the read-output of any one of said at least two of said memory means to a selected one of said filter logic unit inputs through that one of said second set of MUX individually associated with that filter logic unit input,
- (3) any filter logic unit output directly to any selected one of said filter logic unit inputs through those respective ones of said first and second sets of MUX that are individually associate with that filter logic unit output an that selecte one of said filter logic unit inputs, and
- (4) an applied external series of said temporal signal samples to any selected one of said filter logic unit inputs through that one of said second set of MUX individually associated with that selected one of said filter logic unit inputs,
- all in accordance with the values of applied third digital control signals; and
- timing and control means for deriving and applying said respective first, second and third digital control signals which together determine the level of resolution of processing done by said programmable filter logic unit during each said successive time cycle, said timing and control means including addressable instruction memory means for determining the respective values of said first, second and third digital control signals during each one of said certain number of sample periods in each of said time cycles.
- 2. The apparatus defined in claims 1, wherein:
- said delayed real time multiresolution processing apparatus is comprised of delayed real time pyramid processing apparatus.
- 3. In a delayed real time pyramid processing apparatus utilizing digital techniques for operating, during each of successive time cycles, on a series of temporal signal samples that define at least one block of an n-dimensional informaation component, where n is a given integer of at least one, each of said time cycles being composed of a certain number of sample periods that is at least as large as the number of temporal signal samples in said series; the combination comprising:
- programmable filter logic unit for deriving a set of one or more sampled-signal outputs therefrom as specified selectable functions of a set of one or more sampled-signal inputs thereto in accordance with the values of applied first digital control signals;
- a plurality of addressable read/write memory means each of which is separately addressable in each of said n dimensions, each of said memory means being controllable in accordance with the values of applied second digital control signals;
- programmable coupling means including a first set of multiplexers (MUX) individually associated with each of said filter logic unit outputs and a second set of MUX individually associated with each of filter logic unit inputs for selectively coupling:
- (1) any filter logic unit as a write-input to a selected one of at 1east two of said memory means through that one of said first set of MUX individually associated with that filter logic unit output,
- (2) the read-output of any one of said at least two of said memory means to a selected one of said filter logic unit inputs through that one of said second set of MUX individually associated with that filter logic unit input,
- (3) any filter logic unit output directly to any selected one of said filter logic unit inputs through those respective ones of said first and second sets of MUX that are individually associated with that filter logic unit output and that selected one of said filter logic unit inputs and
- (4) an applied external series of said temporal signal samples to any selecte one of said filter logic unit input through ty D. C. Young, which is herein incorporated by reference in its entirety. In addition, various micronutrients may be incorporated into the sulfur particles by following the teachings of said U.S. Pat. No. 4,133,668. Finally, either of the embodiments of the above-escribed molten sulfur lift may be used to elevate or pump other molten materials, with the same advantages of providing a high flow rate with a low head pressure, and enjoying seizure-free operation by means of the sensible heat of the molten material and the design of the lift. It is intended to include within this invention any such modification as will fall within the scope of the appended claims.
Divisions (1)
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Number |
Date |
Country |
Parent |
678633 |
Feb 1985 |
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