BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of an image processing circuit in an image pickup apparatus in accordance with a first embodiment of the present invention;
FIG. 2 is a block diagram of the image pickup apparatus of FIG. 1;
FIGS. 3A and 3B illustrate a setting process of a correction coefficient of the image processing circuit of FIG. 1;
FIG. 4 is a plot of characteristics of the correction coefficient of the image processing circuit of FIG. 1;
FIG. 5 is a plot of characteristics of the correction coefficient of the image processing circuit in accordance with a second embodiment of the present invention;
FIG. 6 is a block diagram of an image processing circuit in an image pickup apparatus in accordance with a third embodiment of the present invention;
FIG. 7 is a block diagram of a non-linear smoothing filter in the image processing circuit of FIG. 6;
FIG. 8 is a block diagram of a non-linear smoothing circuit of the non-linear smoothing filter of FIG. 7;
FIG. 9 illustrates operation of the image processing circuit of FIG. 6;
FIG. 10 is a block diagram of an image processing circuit in an image pickup apparatus in accordance with a fourth embodiment of the present invention;
FIGS. 11A and 11B are plots of characteristics representing gradation correction of the image processing circuit of FIG. 10;
FIGS. 12A and 12B are plots of characteristics representing gradation correction different from the characteristics of FIGS. 11A and 11B;
FIGS. 13A and 13B are plots of characteristics representing gradation correction different from the characteristics of FIGS. 11A and 11B and FIGS. 12A and 12B;
FIGS. 14A1-14B2 illustrate a setting process of the correction coefficient in the image processing circuit of FIG. 10; and
FIG. 15 is a block diagram of a known image processing circuit.