Patent Application
20090168469
1. Field of the Invention
This invention relates to power supplies and more particularly relates to low cost fault-tolerant power supplies.
2. Description of the Related Art
A power supply, sometimes known as a power supply unit or PSU, is a device or system that supplies electrical or other types of energy to an output load or group of loads. A power supply, in some embodiments may be configured to convert power in one form to another form, such as converting AC power to DC power. The regulation of power supplies is typically done by incorporating circuitry to tightly control the output voltage and/or current of the power supply to a specific value. The specific value is closely maintained despite variations in the load presented to the power supply's output, or any reasonable voltage variation at the power supply's input.
For example, in an electronic device such as a computer, the power supply is typically designed to convert an AC voltage input such as is traditionally provided by a conventional wall socket, into several low-voltage DC power outputs for transmission to the internal components of the electronic device. Conversion is typically performed in stages such as a rectification stage, a pre-regulation stage such as an active harmonic filter, a regulator/chopper stage, etc. The stages may be a boost stage, a buck stage, or other derivative topology.
Some stages in a power supply may include a pulse-width modulator that regulates a bus voltage by sensing a controlled bus voltage and adjusting a switching duty cycle to regulate the controlled bus signal to some target value. Conventional power supplies typically use a power Metal Oxide Semiconductor Field-Effect Transistor (“MOSFET”) as the switching component because power MOSFETs can switch at very high speeds. However, the switching components such as the power MOSFETs are also one of the most likely components to fail in a power supply. When a power MOSFET in a conventional power supply fails, the power supply is no longer able to continue providing power, and therefore, systems powered by the power supply remain inoperational until the faulty power supply is replaced. This can result in a significant loss of productivity.
Artisans have attempted to resolve failure problems in power supplies by implementing completely redundant power supplies with a power back plane. However, the costs of implementing fully redundant power supplies can be extremely expensive and inefficient. Thus, a need exists for a low cost fault-tolerant power supply that provides fault protection at a much lower cost than implementing fully redundant power supplies.
From the foregoing discussion, it should be apparent that a need exists for an apparatus, system, and method for implementing a low cost fault-tolerant power supply. Beneficially, such an apparatus, system, and method would provide inexpensive increased fault protection in a power supply by implementing interleaved primary and regulator stages using fuses in series with switches. Such an implementation would provide redundant fault protection and pre-emptive fault protection by detecting faults before they occur and shutting down the appropriate switches prior to a failure of those switches. Thus, in the event of a failure, or predicted failure, of a switch, the power supply is able to continue operating normally until a replacement power supply is obtained, or until a complete failure of the power supply is realized.
The present invention has been developed in response to the present state of the art, and in particular, in response to the problems and needs in the art that have not yet been fully solved by currently available power supplies. Accordingly, the present invention has been developed to provide an apparatus, system, and method for implementing a low-cost fault-tolerant power supply that overcome many or all of the above-discussed shortcomings in the art.
The apparatus is provided to regulate voltage and includes a power supply that regulates a direct current (“DC”) regulated bus to maintain a regulated bus voltage under varying load conditions. The power supply includes at least one pulse-width modulated stage, where each pulse-width modulated stage includes at least two DC-to-DC converters connected and operating in parallel. Each DC-to-DC converter includes a switch. In one embodiment, the power supply includes a failure sensing module configured to detect a failing condition within a component, such as the switch, in at least one of the at least two DC-to-DC converters.
The power supply also includes a pulse-width modulator for each stage of the power supply that regulates a bus voltage controlled by the stage by sensing the controlled bus voltage and adjusting a switching duty cycle to regulate the controlled bus voltage to a target value. The pulse-width modulator for a stage provides a substantially identical switching duty cycle to each switch of the stage. The switching duty cycle includes a signal to control a switch on and then off for a portion of a switching period.
In one embodiment, each DC-to-DC converter further comprises a fuse connected in series with the switch that disconnects the switch in response to an over current condition sufficient to open the fuse. In a further embodiment of the apparatus, the over current condition sufficient to open a fuse comprises a failure of the switch connected in series with the fuse that results in the switch failing in a low impedance (“shorted”) state. The apparatus further comprises, in one embodiment, a failure sensing module that detects a failing condition within a component in one of the at least two DC-to-DC converters of a pulse-width modulated stage. In a further embodiment, the failure sensing module may be further configured to command a switch in the DC-to-DC converter with the failing component to remain in an open or closed position in response to detecting the failing condition. The commanded open or closed position of the switch preferably corresponds to a shut-down condition for the DC-to-DC converter.
In one embodiment, the failure sensing module may be configured to detect a failing switch. In various embodiments, a failing switch includes one of an inoperable switch and a switch operating in an abnormal condition indicating a pending failure. In a further embodiment, the failure sensing module detects a failed switch by detecting a voltage across the switch at a low value when a high value is expected. In yet a further embodiment, the failure sensing module detects a failed switch by detecting a temperature increase on a die that includes the failed switch. In one embodiment, detecting a temperature increase includes detecting a fan speed increase, where the fan speed is increased in response to detecting a temperature increase on the die that includes the failed switch.
In yet a further embodiment, the failure sensing module detects a failing switch by detecting that the failing switch is in a closed state during a switching period for a time longer than the failing switch is commanded to close. In a further embodiment, the apparatus may include a failure warning module configured to send an alert in response to the failure sensing module detecting a failing condition within a component. In various embodiments, sending an alert may include turning on an indicator on the power supply and/or sending a message to a system in communication with the power supply.
In one embodiment, the power supply includes a primary stage and a regulator stage in series. The primary stage includes two DC-to-DC converters connected in parallel and regulates a voltage on an internal bus that serves as input for the regulator stage. The regulator stage includes two DC-to-DC converters connected in parallel and regulates the regulated bus voltage. In various embodiments, the primary stage includes an active harmonic filter that provides approximately unity power factor correction and harmonic filtering. In a further embodiment, the primary stage may include two boost converters connected in parallel that regulate the internal bus to a voltage greater than an input voltage provided to the boost stage, and the regulator stage may include two buck-type converters connected in parallel that regulate the regulated bus to a value lower than the internal bus.
A system and method of the present invention are also presented for implementing a low cost fault-tolerant power supply. The system and method in the disclosed embodiments substantially include the steps necessary to carry out the functions presented above with respect to the operation of the described apparatus and system.
The system includes one or more power supplies that regulate a direct current regulated bus to maintain a regulated bus voltage under varying load conditions. At least one of the power supplies includes at least one pulse-width modulated stage, where each pulse-width modulated stage includes at least two DC-to-DC converters connected and operating in parallel. Each DC-to-DC converter may include a switch and a fuse connected in series wherein the fuse disconnects the switch in response to an over current condition sufficient to open the fuse. In one embodiment, the power supply includes a failure sensing module configured to detect a failing condition within the switch and configured to turn off the switch in response to detecting the failing condition. The power supply may also include a pulse-width modulator for each stage of the power supply that regulates a bus voltage controlled by the stage by sensing the controlled bus voltage and adjusting a switching duty cycle to regulate the controlled bus voltage to a target value. The pulse-width modulator for a stage provides a substantially identical switching duty cycle to each switch of the stage. The switching duty cycle includes a signal to control a switch on and then off for a portion of a switching period.
The system also includes an electronic device causing the varying load to the power supplies and a regulated bus connected between the electronic device and the one or more power supplies, wherein the regulated bus delivers power from the one or more power supplies to the electrical device. In various embodiments, the electronic device may be one of a personal computer, a laptop computer, and a server.
The method includes sensing a controlled bus voltage of at least one stage within a power supply, and adjusting a switching duty cycle by a pulse-width modulator of the stage to regulate the controlled bus voltage of the stage to a target value. The power supply includes at least one pulse-width modulated stage, where each pulse-width modulated stage includes at least two DC-to-DC converters connected and operating in parallel. Each DC-to-DC converter may include a switch and a fuse connected in series wherein the fuse disconnects the switch in response to an over current condition sufficient to open the fuse. In one embodiment, the power supply includes a failure sensing module configured to detect a failing condition within the switch and configured to turn off the switch in response to detecting the failing condition. The power supply also includes a pulse-width modulator for each stage of the power supply that regulates the sensed controlled bus voltage that is controlled by the stage. The controlled bus of one of the at least one stages comprises a DC regulated bus regulated under varying load conditions of a load connected to the regulated bus. The pulse-width modulator for a stage provides a substantially identical switching duty cycle to each switch of the stage. The switching duty cycle includes a signal to control a switch on and then off for a portion of a switching period.
In one embodiment, the method may include sensing a failing switch within the power supply. In a further embodiment, the method may include sending an alert in response to the failure sensing module detecting a failing switch. In various embodiments, sensing a failing switch further includes commanding the detected failing switch to remain in an open or closed position corresponding to shutting down the DC-to-DC converter with the failing switch.
Reference throughout this specification to features, advantages, or similar language does not imply that all of the features and advantages that may be realized with the present invention should be or are in any single embodiment of the invention. Rather, language referring to the features and advantages is understood to mean that a specific feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention. Thus, discussion of the features and advantages, and similar language, throughout this specification may, but do not necessarily, refer to the same embodiment.
Furthermore, the described features, advantages, and characteristics of the invention may be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize that the invention may be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the invention. These features and advantages of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.
In order that the advantages of the invention will be readily understood, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only typical embodiments of the invention and are not therefore to be considered to be limiting of its scope, the invention will be described and explained with additional specificity and detail through the use of the accompanying drawings, in which:
Many of the functional units described in this specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom VLSI circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.
Modules may also be implemented in software for execution by various types of processors. An identified module of executable code may, for instance, comprise one or more physical or logical blocks of computer instructions which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module need not be physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.
Indeed, a module of executable code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different storage devices, and may exist, at least partially, merely as electronic signals on a system or network. Where a module or portions of a module are implemented in software, the software portions are stored on one or more computer readable media.
Reference throughout this specification to “one embodiment,” “an embodiment,” or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment,” “in an embodiment,” and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.
Reference to a signal bearing medium may take any form capable of generating a signal, causing a signal to be generated, or causing execution of a program of machine-readable instructions on a digital processing apparatus. A signal bearing medium may be embodied by a transmission line, a compact disk, digital-video disk, a magnetic tape, a Bernoulli drive, a magnetic disk, a punch card, flash memory, integrated circuits, or other digital processing apparatus memory device.
Furthermore, the described features, structures, or characteristics of the invention may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided, such as examples of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention.
The power supply 102 provides regulated power to the electronic device 104 to power various electronic systems and subsystems within the electronic device 104. The power supply 102 is typically connected to the electronic device 104 by a regulated bus 108. The regulated bus 108 and power supply 102 may be configured to provide one or more different voltages and currents to the electronic device 104. For example, in a typical power supply, voltages of +12v, +5v, +3.3v, and −12 v are commonly provided.
In various embodiments, the electronic device 104 may be a computer system, such as a desktop, laptop, or server, and the power supply 102 may be configured to provide power to the various components of the computer system. In other embodiments, the electronic device 104 may include devices such as routers, personal digital assistants (PDAs), displays, or other electronic devices as recognized by one of skill in the art. In one embodiment, the power supply 102 may be implemented within the same enclosure as the electronic device 104, such as within a computer tower case. In other embodiments, the power supply 102 may be implemented external to the electronic device 104 and may be connected to the electronic device 104 via a connection means such as a cord, cable, or bus such as in a blade center.
The electronic device 104 causes a load 106 to be applied to the power supply 102. The amount of load 106 may affect the performance of the power supply 102. The power supply 102 is preferably configured to operate efficiently in conjunction with a specified load 106. In one embodiment, the load 106 may vary depending on the operation characteristics of the electronic device 104 and the power supply 102 may be configured to adjust accordingly. For example, the power supply 102 may include a feedback signal for adjusting the power output characteristics of the power supply 102 in response to changes in the load 106. Typically, the power supply 102 regulates the voltage on the regulated bus 108 so as to provide substantially constant voltage levels to the electronic device 104 under varying load conditions.
The power supply 102 regulates a DC regulated bus 108 to maintain a regulated bus voltage under varying load 106 conditions. The power supply 102 includes at least one pulse-width modulated stage, wherein each pulse-width modulated stage includes at least two DC-to-DC converters connected and operating in parallel. Each DC-to-DC converter includes at least one switch Q1, Q2. Preferably, each switch Q1, Q2 includes a fuse F1, F2 connected in series with the switch Q1, Q2 such that the corresponding switch Q1, Q2 is disconnected by the fuse F1, F2 in response to an over current condition sufficient to open the fuse F1, F2. The switches Q1, Q2 are implemented in parallel to provide redundancy protection in the event of a failure of one of the switches Q1, Q2. Initially, in one embodiment, both switches Q1, Q2 are operating simultaneous to regulate the voltage on a bus. In the event one of the switches Q1, Q2 fails, the corresponding fuse F1, F2 will disconnect the failed switch Q1, Q2 from the circuit, and the switch Q1, Q2 that did not fail continues to operate normally.
Each DC-to-DC converter also preferably includes circuitry provided in parallel to adjust and maintain a DC voltage at the output of the parallel DC-to-DC converters. In one embodiment the additional parallel circuitry may include an inductor L1, L2 and a diode D1, D2. In a further embodiment, the parallel diodes D1, D2 may be connected to a capacitor (not shown) at the output of the pulse-width modulated stage. The capacitor may be used to store a charge such that the output voltage is substantially maintained as the switches Q1, Q2 are switched on and off by a pulse width modulator (“PWM”) 202. The circuitry of the DC-to-DC converters may be implemented in various topologies such as in boost-like topologies (as shown) or buck-like topologies (not shown) to provide various different voltage outputs. An implementation that raises the output voltage above the input voltage is typically called a boost stage because the output voltage is ‘boosted’ above the input voltage, and an implementation that lowers the output voltage below the input voltage is typically called a buck stage. Of course, other types of topology may be implemented such as ‘boost-like’ topologies, ‘buck-like’ topologies, or other topologies as will be recognized by one of skill in the art.
Thus, by providing parallel DC-to-DC converters, redundancy protection is provided for the power supply 102. Furthermore, because redundant parallel inductors L1, L2 and diodes D1, D2 are provided in additional to redundant parallel switches Q1, Q2 and fuses F1, F2, the operation of the power supply 102 will not be interrupted in the event of a failure of one of the switches Q1, Q2. For example, if a switch Q2 fails thereby causing a fuse F2 to disconnect that switch Q2 from the circuit, the channel consisting of that switch Q2, its fuse F2, and its associated inductor L2 and diode D2 will discontinue operation. However, the redundant channel that includes the parallel switch Q1 with its associated fuse F1, inductor L1, and diode D1 will continue operating normally such that the output voltage is sufficiently maintained before, during, and after the time of failure of the failed switch Q2. Therefore, even though a voltage fluctuation may be observed between the components on the failed channel at the time of failure of the switch Q2, the voltage fluctuation will not be propagated to the output of the parallel diodes D1, D2.
The switches Q1, Q2 are preferably implemented as power Metal Oxide Semiconductor Field-Effect Transistors (“MOSFETs”). A power MOSFET is a specific type of transistor typically designed to handle large amounts of current. Power MOSFETs are preferred because they have a high commutation speed and high efficiency at low voltages. Of course, as will be recognized by one of skill in the art, other types of switches Q1, Q2, may also be used including other types of MOSFETS, transistors, or other electronic switches. Switches, including power MOSFETs, are typically the most common component in a power supply 102 to fail. Therefore, by providing redundancy in the MOSFET switches Q1, Q2, the reliability and life expectancy of the power supply 102 is dramatically increased for at a very low cost.
The power supply 102 includes a pulse-width modulator 202 for each stage of the power supply 102. The pulse-width modulator regulates a bus voltage output by the corresponding stage by sensing the bus voltage and adjusting a switching duty cycle to regulate the bus voltage to a target value. For example, in regard to the output stage of the power supply 102 that regulates voltage on the regulated bus 108, the voltage on the regulated bus 108 may be monitored and fed back to the power supply 102 to compare the voltage output on the regulated bus 108 with a reference voltage that represents the target value. The power supply 102 adjusts the output voltage if needed in order to match the target reference voltage. A similar process may occur for each stage in the power supply 102 in order to maintain substantially constant voltages on each of the internal buses as well as on the regulated output bus 108.
Typically, in a switching power supply, switches are turned on at a fixed switching rate. For example, if a switching rate is 100 kilo-Hertz (“kHz”), the switching period is 10 micro seconds. Duty cycle is typically a ratio of an amount of time a switch is commanded on during a switching period divided by the switching period. So if a switch is commanded on for 5 microseconds of a 10 microsecond switching period, the duty cycle is 5 microseconds divided by 10 microseconds or 0.5. The minimum duty cycle is 0 and the maximum duty cycle is 1.0.
Preferably, the pulse-width modulator 202 for each stage provides a substantially identical switching duty cycle to each switch Q1, Q2 of the various stages. This is typically accomplished by sending a signal from the pulse width modulator 202 to each switch Q1, Q2 to turn each switch on and then off for a portion of a switching period.
In one embodiment, a single pulse width-modulator 202 may be utilized to provide signals to each of the switches Q1, Q2 thereby maintaining a substantially identical switching duty cycle. This is advantageous to provide a lower cost than a power supply 102 with a separate pulse-width modulator 202 for each switch as well as circuitry to allow the stages to operate in parallel.
In one embodiment of the power supply 102, a failure sensing module 204 may be provided to detect a failing condition of a component (e.g. Q1, Q2, L1, L2, D1, D2, F1, F2) in the power supply 102. For example, in one embodiment, the failure sensing module 204 may be configured to detect a failing switch Q1, Q2. A failing switch Q1, Q2 may include switches Q1, Q2 such as an inoperable switch Q1, Q2 or a switch Q1, Q2 operating in an abnormal condition that indicates pending failure. The failure sensing module 204 may detect a failing switch Q1, Q2 by detecting a voltage across the switch Q1, Q2 at a low value when a high value is expected. For example, if a switch Q1, Q2 is commanded off but the switch Q1, Q2 has failed short, the voltage across the switch Q1, Q2 will approach zero volts when it is expected to be a much higher voltage.
In a further embodiment, the failure sensing module 204 may detect a failing condition of an inductor L1, L2, diode D1, D2, or other component as will be recognized by one of skill in the art. For example, in one embodiment, the failure sensing module 204 may detect that an inductor L1, L2 has shorted circuited or failed in some other manner. In response to detecting a failing condition of a component Q1, Q2, L1, L2, D1, D2, F1, F2 in the power supply 102, the failure sensing module 204 may command a corresponding switch Q1, Q2 to remain in an open or closed position in order to shut down or disconnect the circuit (e.g. Q1, F1, L1, D1) which contains the failed or failing component Q1, Q2, L1, L2, D1, D2, F1, F2. Subsequently, the circuit that does not contain the failed or failing component (e.g. Q2, F2, L2, D2) continues to provide power to the regulated bus 108 such that a disruption in power is avoided.
In another embodiment, voltage at the output of a stage is detected and the failure sensing module 204 determines that a component Q1, Q2, L1, L2, D1, D2, F1, F2 has failed or is failing if the output voltage of the stage dips below a specified value. In a further embodiment, the failure sensing module 204 may detect a failed or failing switch Q1, Q2 by detecting a temperature increase on a die that includes the failed or failing switch Q1, Q2. In yet a further embodiment, the failure sensing module 204 may also detect a fan speed increase thereby indicating a temperature increase on the die that includes the failed or failing switch Q1, Q2.
In one embodiment, the failure sensing module 204 may detect a failed or failing switch Q1, Q2 by detecting that the failed or failing switch Q1, Q2 is in a closed state during a switching period for a time longer than the failed or failing switch Q1, Q2 is commanded to close. In the event, the failure sensing module 204 detects a pending failure, the failure sensing module 204 may, in one embodiment, disconnect or turn off the failing switch Q1, Q2 prior to the occurrence of a complete failure of the switch Q1, Q2. However, the parallel switch Q1, Q2 will continue to operate normally in order to continue providing power to a load 106.
Typically when a switch (e.g. Q1) fails, the other switch Q2 in parallel will then draw more current because the current is no longer shared between the switches Q1, Q2. This increase in current will generate more heat than two switches operating in parallel. This is because the parasitic resistance of the switch (drain-to-source resistance of a MOSFET) of two switches Q1, Q2 operating connected in parallel is about half of the parasitic resistance of one switch Q2 that continues to be connected after the fuse F1 of the failed switch Q1 opens. The failure sensing module 204 may detect the temperature rise or may detect a fan speed increase where the fan increases in speed based on a temperature increase.
In one embodiment, the failure sensing module 204 detects a failing switch Q1, Q2 and shuts down the power supply stage with the failing switch. Q1, Q2. Typically, the failure sensing module 204 will command a failing switch Q1, Q2 to an open position. In a rare embodiment, a switch Q1, Q2 of a converter with a particular topology may be commanded closed. By commanding the power supply stage with the failing switch Q1, Q2 to shut down, a failure may be prevented that could cause a voltage to be out of tolerance or could cause damage to the power supply 102.
If the failure sensing module 204 detects a failed or failing switch Q1, Q2, a failure warning module 206 may send an alert in response to the detection of the failed or failing switch Q1, Q2. In one embodiment, the alert may include turning on an indicator on the power supply 102, such as a light emitting diode (LED), or in another embodiment, the alert may include sending a message to a system in communication with the power supply 102. In the event one of the switches (e.g. Q1) fails or is failing, and an alert is generated, a user may choose to immediately replace the power supply 102 before a failure of a second switch Q2 which may cause the power supply 102 to stop operating completely. Or alternatively, a user may continue to operate the power supply 120 as is (with a failed switch) until an additional failure is detected.
In one embodiment, the power supply 102 receives as an input an AC input voltage Vin that is fed to an input rectifier and filter 302. The input rectifier and filter 302 rectifies the AC voltage Vin in order to produce a DC voltage at the output of the input rectifier and filter 302. The input rectifier and filter 302 may also include an electro-magnetic compatibility (“EMC”) filter in order to meet industry standards for electro-magnetic compatibility as will be recognized by one of ordinary skill in the art.
The output of the rectifier and filter 302 is connected in series to two parallel inductors L1, L2. As the switches Q1, Q2 are switched on and off, the inductors L1, L2 provide a current that allows a voltage to be realized at the output of a first capacitor C1 that is higher than an input voltage to the boost converters. When the switches Q1, Q2 are on, the current through the inductors L1, L2 starts to increase. Then when the switches Q1, Q2 are turned off, the inductors L1, L2 continue to provide current for a limited amount of time to the capacitor C1 through the associated parallel diodes D1, D2 such that the voltage on the output of the stage is capable of being greater than the voltage at the input of the stage (the output of the rectifier and filter 302). Such an implementation (including the inductors L1, L2, the connected switches Q1, Q2 and associated fuses F1, F2, the diode D1, D2, and the first capacitor C1) is a boost stage topology. Of course, in other embodiments, other topologies may be implemented as will be recognized by one of skill in the art.
The switches Q1, Q2 are turned on or off by a signal from a pulse-width modulator 202. In one embodiment, drivers DRV1, DRV2 may be provided to convert the signal from the pulse-width modulator 202 into a signal that is compatible with the switches Q1, Q2. The switches Q1, Q2 are controlled by the pulse-width modulator 202 by utilizing a particular switching duty cycle to obtain a substantially constant voltage on the output of the first stage at the first capacitor C1. The voltage may be regulated to a higher or lower voltage by changing the switching period (or the switching duty cycle). A feedback signal (not shown) from the output of the second stage (capacitor C1) may used by the pulse-width modulator 202 to adjust the switching duty cycle and therefore adjust the voltage output. If the first stage is part of an active power factor correction circuit, other voltage and current signals (not shown) are also fed into the pulse-width modulator 202 to control the switches Q1, Q2. The pulse-width modulator 202 then generates a duty cycle based on the feedback signals and a control formula implemented in the pulse-width modulator 202. The pulse width-modulator 202 preferably provides substantially identical control signals to the switches Q1, Q2 such that they turn on or turn off at the same time thereby operating redundantly.
In the event of a failure of one of the switches Q1, Q2 caused by an over current condition, the corresponding fuse F1, F2 which are provided in series with the switches Q1, Q2, will disconnect the failed switch Q1, Q2 from the circuit. Then, the power supply 102 may continue operating normally utilizing only a single switch Q1 instead of two redundant switches Q1, Q2.
In one embodiment, the over current condition may be caused by a low impedance (“shorted”) state in one of the switches (e.g. Q1). This is a likely condition because MOSFETs often fail in a shorted condition. In this case, a sudden drop in voltage might be observed between failure (short circuit) of the switch Q1 and the disconnection of the fuse (e.g. F1). After the fuse F1 opens, the power supply 102 is able to continue operating with only a single connected switch Q2. Because redundant parallel inductors L1, L2 and diodes D1, D2 are provided, the sudden voltage drop is not propagated to the output of the power supply 102, and therefore, the power supply 102 is able to continuously operate without interruption even in the event of a failure of one of the switches Q1, Q2. This provides increased failure protection in the power supply 102 at the very low cost of adding redundant components (e.g. Q2, Q4, L2, T2, D2, D5, F2, F4) to each stage of the power supply 102. Thus, redundancy protection and increased reliability are provided without the cost of providing an entirely separate additional power supply.
The first stage, or primary stage, in one embodiment, may be implemented as an active harmonic filter that provides approximately unity power factor correction and harmonic filtering. In various embodiments, the first stage may be implemented as a boost stage (depicted), as a buck stage, or as some other power supply topology including variations of buck-type topologies and boost-type topologies as will be recognized by one of skill in the art.
In the depicted embodiment, as the first stage operates, the regulated voltage on the output of the first stage is provided to a transformer T1 which acts as an input to the second stage. The second stage includes two parallel redundant switches Q3, Q4 and associated fuses F3, F4, two parallel redundant transformers T1, T2, diodes D3, D4, D5, an inductor L3, and a second capacitor C2. The second stage, or the regulator stage, operates similar to the primary stage described above and regulates the voltage at the output of the power supply 102 (on the regulated bus 108). The pulse-width modulator 202 provides a signal to the switches Q3, Q4 to cause a regulated voltage to be maintained at the output of the stage. Like the first stage, fuses F3, F4 are provided in series with the switches Q3, Q4 such that the fuses F3, F4 disconnect the corresponding switch Q3, Q4 from the circuit in the event of a failure of one of the switches Q3, Q4.
When the second stage switches Q3, Q4 are closed, the voltage across the first capacitor C1 is applied across the transformers T1, T2, which causes a current to flow through the series diodes D3, D5 and to increase through the inductor L3 to charge up the second capacitor C2 if voltage across the second capacitor C2 is less than voltage at the output of the transformers T1, T2. When the switches Q3, Q4 of the second stage are opened, current through the inductor L3 continues to flow and the connected diodes D3, D5 are forward biased. The on and off times of the switches (duty cycle) are varied such that a voltage is maintained on the regulated bus 108.
The output voltage may be fed back to the pulse-width modulator 202 as a feedback signal (not shown) in order to adjust and maintain proper voltages on the output of the regulator stage of the power supply 102. The feedback signal may be compared to a reference voltage, and the switching duty cycle may be adjusted accordingly in order to cause the output voltage of the second stage to increase or decrease. Typically, different switching duty cycles may be applied to different stages in the power supply 102 such that the output voltage of one stage differs from the output voltage of another stage.
In other embodiments, the transformers T1, T2 may include multiple secondary windings. Diodes, inductors, and capacitors similar to those of the second stage (i.e. D3, D5, L3, C2) may be connected to the other secondary windings of the transformers T1, T2 to provide additional voltages of the regulated bus 108. Typically one output bus of the second stage is controlled and the other secondary stages are proportional to the output voltage of the controlled stage. In other embodiments, each secondary stage is controlled with a separate pulse-width modulator 202. However, typically the paired regulator stages (as depicted) share a pulse-width modulator 202 which provides a substantially identical duty cycle to the switches Q3, Q4 of the paired regulator stages to reduce cost.
As described above with regard to
The failure sensing module 204 may use gate signals GS1, GS2, GS3, GS4 and drain signals DS1, DS2, DS3, DS4 to detect pending failures in the associated switches Q1, Q2, Q3, Q4. For example, the failure sensing module 204 may use the gate signals GS1, GS2, GS3, GS4 and drain signals DS1, DS2, DS3, DS4 to measure the gate-to-drain voltage or current in order to detect an abnormal condition that may indicate an impending failure of one of the switches Q1, Q2, Q3, Q4. In one embodiment, the gate signals GS1, GS2, GS3, GS4 and drain signals DS1, DS2, DS3, DS4 may be used to detect that a switch Q1, Q2, Q3, Q4 is in a closed or open state during a switching period for a time longer than a commanded duty cycle. Such a condition may indicate that the switch Q1, Q2, Q3, Q4 is likely to fail. If the failure sensing module 204 detects a failure or pending failure, the failed or failing switch Q1, Q2, Q3, Q4 may be disabled and a warning may be generated by the failure warning module 206. In further embodiments, the gate signals GS1, GS2, GS3, GS4 and drain signals DS1, DS2, DS3, DS, or other similar signals may be utilized to detect a failing condition of other components in the power supply 102 such as inductors L1, L2, L3, L4, diodes D1, D2, D3, D4, D5, and transformers T1, T2.
The power supply 102 includes at least one pulse-width modulated stage, and each modulated stage includes at least two DC-to-DC converters connected in parallel. In one embodiment, each DC-to-DC converter includes at least two switches (e.g. Q1, Q2 or Q3, Q4) connected in parallel. Each switch Q1, Q2, Q3, Q4 may include a fuse F1, F2, F3, F4 connected in series with the switch Q1, Q2, Q3, Q4 that disconnects the corresponding switch Q1, Q2, Q3, Q4 in response to an over current condition sufficient to open the fuse F1, F2, F3, F4, such as a short-circuit condition. Each DC-to-DC converter may also include additional circuitry connected in parallel such as inductors L1, L2 or diodes D1, D2 for forming various power stage topologies as described above.
The pulse-width modulator 202 adjusts 404 a switching duty cycle to regulate the controlled bus voltage to a target value. The pulse-width modulator 202 for each stage provides a substantially identical switching duty cycle to each switch Q1, Q2 within the stage. Thus, the switches operate simultaneously to regulate the voltage at the output of each stage. By increasing or decreasing a switching period for the pulse-width modulator 202, the voltage on the output of each stage may be adjusted up or down to correspond to a target voltage.
A failure sensing module 204 detects 406 a failing condition of one of the components (e.g. Q1, Q2, Q3, Q4, D1, D2, D3, D4, D5, T1, T2, L1, L2, L3, L4 etc.) in the power supply. In at least one embodiment, the failure sensing module 204 detects a failure or pending failure in one of the switches Q1, Q2, Q3, Q4, which may be implemented as a type of transistor such as a MOSFET. In one embodiment, sensing a failure is accomplished by detecting 406 a voltage across a switch Q1, Q2, Q3, Q4 at a low value when a high value is expected by comparing gate signals GS1, GS2, GS3, GS4 with drain signals DS1, DS2, DS3, DS4. In another embodiment, a failure may be detected by detecting a temperature increase on a die that includes the failed switch Q1, Q2, Q3, Q4. In yet a further embodiment, a failure may be detected 406 by monitoring a fan speed and determining that an abnormally high fan speed indicates a failed switch Q1, Q2, Q3, Q4. The failure sensing module 204, in one embodiment, disables 408 the switch Q1, Q2, Q3, Q4 in response to detecting a failure or pending failure such that a catastrophic failure is prevented. In another embodiment, the fuses F1, F2, F3, F4 connecting in series with the switches Q1, Q2, Q3, Q4 may automatically disconnect a failed switch Q1, Q2, Q3, Q4 in response to an over-current condition.
In a further embodiment, the failure sensing module 204 may be configured to command a switch Q1, Q2, Q3, Q4 to remain in an open or closed position in response to detecting a failing condition of a component in the power supply 102. The open or closed position of the switch Q1, Q2, Q3, Q4 preferably corresponds to a shut down condition for the circuit (e.g. DC-to-DC converter) containing the failed component. In this manner, a catastrophic failure caused by a failure of one of the switches Q1, Q2, Q3, Q4 may be prevented. For example, if a component (e.g. L1) is detected to have a failing condition, then the failure sensing module 204 may command a corresponding switch Q1 to shut down (remain in an open or closed position depending on the circuit topology) in order to prevent the failed component from disrupting the operation of the power supply 102. In another example, one of the switches Q1 may be detected 406 to have a pending failure, in which case that switch Q1 may be turned off or disabled.
A failure warning module 206 sends 408 an alert in response to a failure detected by the failure detection module and the method 400 ends. An alert sent 408 by the failure warning module 206 may include notifications such as lighting an LED, sounding an alarm, or sending a signal to a system to display a warning message. Of course, other alerting means may be utilized as will be recognized by one of skill in the art.
The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
