The invention relates in general to electronic devices and more specifically to an apparatus, system, and method for electrostatic discharge (ESD) protection in an electronic device.
Electronic devices such as, for example, cellular telephones, personal digital assistants (PDA), portable media players, and portable computers are susceptible to damage by electrostatic discharge (ESD). ESD is the rapid and spontaneous transfer of electrical charge between two objects. One example of ESD that can be experienced particularly in dry climates includes the “shock” or spark resulting from the discharge of electrostatic charge when a hand or figure is placed near a doorknob after the electrostatic charge has formed due to shuffling across carpet. ESD occurs in a variety of situations, however, and does not need to be felt to cause extensive damage to sensitive components in electronic devices. Keypads, buttons, and other user interfaces on electronic devices provide an especially vulnerable entry point for electrostatic charges to reach electronic device components.
Some conventional designs reduce the susceptibility of electronic devices to ESD by increasing the thickness of insulating materials at the vulnerable areas. For example, the thickness of the shaped rubber layer forming the keypad of a device can be increased to insulate the sensitive components from ESD. This technique is limited in that, due to the increased thickness, the size of the overall size of the electronic device is increased. Further, the electronic device may be more difficult and costly to manufacture since the thicker keypad requires more material and is more difficult to manipulate. Also, the thicker material may result in a keypad that is bulkier, less sensitive, and more difficult to use.
Other conventional techniques for reducing susceptibility to ESD include the placement of circuit elements such as diodes to “short out” ESD and direct charges to ground. These methods, however, are limited in that the complexity and cost of the electronic device is increased.
Other conventional designs include a conductive escutcheon that surrounds at least some of the buttons of a keypad and is connected to the ground of the electronic device. This technique is limited in that the escutcheon is difficult and costly to manufacture. Further, the escutcheon often can not be shaped to adequately protect the areas that are vulnerable to ESD penetration. For example, as the sizes of the keys of keypads decrease, the available space for positioning the sections of the conductive escutcheon also decreases resulting in device areas that are not adequately protected against ESD.
Accordingly, there is a need for an apparatus, system, and method for electrostatic discharge (ESD) protection in an electronic device.
An apparatus, system, and method provide electrostatic discharge (ESD) protection in electronic devices by guiding electrostatic charges to a ground through ESD channels within electrical insulation sheet. The ESD channels are positioned within the electrical insulation sheet to provide electrical paths to ground having a lower impedance than electrical paths to protected areas covered by the electrical insulation sheet. Accordingly, an ESD follows the path of least resistance safely to ground rather than to a critical component within the electronic device. In the exemplary embodiment, the ESD channels are openings in a dome contact layer of a keypad where the openings are positioned over one or more ground sections of a printed circuit board (PCB) and the insulting material of the dome contact layer covers areas of the PCB that are protected from ESD.
As discussed above, electronic devices are susceptible to damage from ESD. An ESD source 108 such as a human figure or hand, metallic button on the device, or other object that may accumulate static charge, creates an electrostatic discharge (ESD) 106 when the impedance along any path from the ESD source 108 to the electronic device is sufficiently low. If the ESD path passes through or terminates at a critical component, damage can result. In the exemplary embodiment, the ESD 106 are guided through discharge paths that avoid electrical components and signal traces within discharge avoidance areas 114.
A discharge channel 110 within an electrical insulation sheet 104 provides a relatively low impedance path to the ground potential of the electronic device. The discharge channel 110 has a channel impedance that is less than the insulation sheet impedance of the electrical insulation sheet 104. The discharge channel 110 is positioned adjacent to an exposed ground area 112 of the printed circuit board 102. Accordingly, at least a portion of the ground area 112 is exposed under the discharge channel 110 to provide a closed electrical path to the device ground for the ESD 106. The ground area 112 is a section of copper on the surface of the PCB 102 in the exemplary embodiment. The ground area 112 may include vias to other ground layers within the PCB 102 and may have any of numerous shapes and sizes.
In the exemplary embodiment, the electrical insulation sheet 104 comprises a plurality of discharge channels 110 which are formed by openings in the electrical insulation sheet 104. The discharge channel 110, however, may be formed using other techniques or components. For example, the discharge channel 110 may include a layer of insulation material that is thinner than the insulation sheet 104 in some situations. Also, a conductive material may be inserted or otherwise positioned through the electrical insulation sheet 104 to provide the electrical path to the exposed ground area 112. The discharge channel 110, therefore, is any configuration, mechanism, or material that forms a path having a lower electrical impedance than the insulation sheet 104 in order to guide the ESD 106 to a target discharge area within the electronic device to avoid the discharge avoidance areas 114.
In the exemplary embodiment, the discharge channel 110 comprises a plurality of openings extending through the dome contact sheet 302. The openings are strategically aligned with target discharge locations 316 on the PCB 102 within the target discharge area 314. Damage to the electronic device due to ESD 106 is minimized by selecting target discharge locations 316 on the exposed ground area 112 of the PCB 102 at a safe distance from components and traces susceptible to ESD 106. Accordingly, an electrostatic discharge 106 to a target discharge location 316 results in a discharge that avoids the discharge avoidance area 114.
In the exemplary embodiment, the chrome key pad 506 is a floating metallic object that accumulates chargers. The resulting increase in electrical potential will eventually find an electrical path to discharge. To avoid damage to components with the electronic device 500, at least one device discharge path 514 to the device ground is created by strategically positioning the discharge channels 112 in the dome contact sheet 302. A discharge path, therefore, includes one of the discharge channels 112 through the electrical insulation sheet 104 (dome contact sheet 302). The discharge path 514 provides a low impedance path to the ground area 112 that is lower than other paths from the exterior of the device 500. Accordingly, any ESD 106 is routed through the electronic device 500 without passing through the discharge avoidance area 114 thereby minimizing the likelihood of damage to the device components.
Therefore, in the exemplary embodiment, an electronic device 500 such as portable communication device includes a discharge path 514 for guiding ESD 106 to a ground area 112 of a printed circuit board 102. One or more discharge channels 110 within the electrical insulation sheet 104 have channel impedances less than the insulation electrical impedance of the electrical insulation sheet providing a relatively low impedance path for the ESD 106 to ground. The electrical insulation sheet 104 comprises a dome contact sheet 302 in the exemplary embodiment where a target discharge area 316 is formed over the exposed ground area 112. Accordingly, susceptibility to ESD 106 is minimized without additional components or insulation.
Clearly, other embodiments and modifications of this invention will occur readily to those of ordinary skill in the art in view of these teachings. The above description is illustrative and not restrictive. This invention is to be limited only by the following claims, which include all such embodiments and modifications when viewed in conjunction with the above specification and accompanying drawings. The scope of the invention should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims along with their full scope of equivalents.
This application is a continuation application of U.S. patent application Ser. No. 11/150,559, filed Jun. 10, 2005 now U.S. Pat. No. 7,567,419, entitled “APPARATUS, SYSTEM, AND METHOD FOR ELECTROSTATIC DISCHARGE PROTECTION, assigned to the assignee hereof and hereby expressly incorporated by reference herein.
Number | Name | Date | Kind |
---|---|---|---|
3354373 | Fatovic | Nov 1967 | A |
4456800 | Holland | Jun 1984 | A |
4778952 | Watkins et al. | Oct 1988 | A |
5335137 | English et al. | Aug 1994 | A |
5513078 | Komrska et al. | Apr 1996 | A |
5557079 | Jackson et al. | Sep 1996 | A |
5565658 | Gerpheide et al. | Oct 1996 | A |
5661279 | Kenmochi | Aug 1997 | A |
5796570 | Mekdhanasarn et al. | Aug 1998 | A |
6002388 | Seffernick et al. | Dec 1999 | A |
6140596 | Tsay | Oct 2000 | A |
6207912 | Persson | Mar 2001 | B1 |
6288687 | Glatz | Sep 2001 | B1 |
6339200 | Shi et al. | Jan 2002 | B1 |
6493198 | Arledge et al. | Dec 2002 | B1 |
6791037 | Ling | Sep 2004 | B1 |
6836397 | Chen et al. | Dec 2004 | B2 |
6987233 | Cole et al. | Jan 2006 | B2 |
6999294 | Festag et al. | Feb 2006 | B2 |
20030215116 | Brandt et al. | Nov 2003 | A1 |
20040013262 | Henry | Jan 2004 | A1 |
20040252867 | Lan et al. | Dec 2004 | A1 |
20040257727 | Chu | Dec 2004 | A1 |
20050052353 | Shiizaki et al. | Mar 2005 | A1 |
20050111085 | Kato | May 2005 | A1 |
Number | Date | Country |
---|---|---|
0788161 | Aug 1997 | EP |
11-195343 | Jul 1999 | JP |
2002-260480 | Sep 2002 | JP |
Entry |
---|
International Search Report (ISR): PCT/ISA/210 for International Application No. PCT/US2006/021383, ISR dated Oct. 9, 2006. |
Number | Date | Country | |
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20090262481 A1 | Oct 2009 | US |
Number | Date | Country | |
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Parent | 11150559 | Jun 2005 | US |
Child | 12493945 | US |