Patent Application
20060202640
The present invention relates to the general subject of power line communication. More particularly, the present invention relates to a power line communication arrangement and method that is well suited for use with power supplies and electronic ballasts that are, preferably, installed in buildings.
Various power line communication (PLC) approaches are known in the art. Existing approaches for PLC control are basically carrier frequency based methods that utilize at least one high frequency carrier. For example:
U.S. Pat. No. 4,538,136 (issued to Drabbing) teaches a two frequency keyed signal PLC system having a first predetermined frequency representing a first state of information (e.g., a “0”) and a second predetermined frequency representing a second state of information (e.g. a “1”).
U.S. Pat. No. 6,377,163 (issued to Deller et al) teaches a PLC arrangement having a high frequency communication component that is superimposed on an AC line voltage. A carrier signal that it is transmitted during a time interval coinciding with a positive half cycle of the AC line voltage represents the first state of information, while a carrier signal that is transmitted during a time interval coincident with a negative half cycle of the AC line voltage represents the second state of information. Binary data generated at the PLC transmitter is synchronized with the AC line voltage, assuming a negligible phase shift between the AC line voltages at the transmitter and the receiver.
In the aforementioned patents, the hot and neutral wires of the AC power source are used for transmitting a carrier signal from the transmitter to the receiver.
U.S. Pat. No. 4,016,429 (issued to Vercellotti et al) and U.S. Pat. Nos. 4,408,186 and 4,433,326 (both of which were issued to Howel) teach carrier PLC that is transmitted via the ground and neutral wires of the AC power source. This approach is most suitable for loads in a building that is wired to accommodate grounding connections the loads, which is generally present in building that include electronic ballasts. An advantage of this approach, in comparison with approaches that utilize the hot and neutral wires to transmit a carrier signal, is that the carrier frequency source (transmitter) is not as affected by the 60 Hz high voltage that is provided between the hot and neutral wires.
U.S. Pat. No. 6,842,668 (issued to Carson) disclosed a remotely accessible power controller for building lighting. A major disadvantage of this type of controller is that it requires an isolated interface having an isolated auxiliary power supply (operating directly from the hot and neutral wires of the AC power source), as well as additional band pass filters.
U.S. Pat. No. 5,475,360 (issued to Guidette et al) and U.S. Patent Application 2003/0189495 (filed by Pettler et al) disclose a PLC approach for lighting systems that includes carrier signal receivers (responders) as separate control devices that interface/communicate with one or more ballasts having dimming capabilities.
The main drawback of the aforementioned approaches is that the carrier signal receivers and processors are not integrated within the controlled device (e.g., ballasts). For example, in a PLC system for controlling a lamp dimming ballast, the signal receiver is generally referenced to the neutral wire, while the circuitry within the ballast is generally referenced to the negative terminal of bridge rectifier within the ballast. Consequently, additional means are required for providing for signal decoupling, amplifying, and filtering. Accordingly, a relatively expensive and physically large auxiliary AC/DC power supply (that is referenced to the neutral wire of the AC power source) must be provided for the ballast, which makes it very difficult (if not impossible) to mechanical integrate the PLC receiver within the housing of a standard ballast. Consequently, existing PLC systems for lighting applications are generally plagued by high cost and complexity, as well as substantial physical space requirements.
Toward the goal of reducing the size and cost of the PLC receiver, PLC approaches often employ carrier frequencies in excess of 100 kilohertz. Unfortunately, high carrier frequencies are often problematic due to the significant signal attenuation that is caused by the distributed inductances and capacitances that is typically present in the AC wiring of a building. In particular, the distributed inductances and capacitances in the AC wiring places limits upon the maximum permissible physical distance between the control station and the receiver. High frequency carrier approaches have the additional constraint that they must not interfere with operation of AM/FM radios or other PLC systems within the building. These limitations are especially problematic in industrial buildings, where the presence of potentially high levels of noise on the AC power line (i.e., in the voltage between the hot and neutral wires of the AC power source) can seriously compromise the ability to detect and recover high frequency carrier control signals.
Yet another challenge to successfully placing a PLC receiver within a power supply or electronic ballasts is the requirement that the PLC receiver must be compatible with the other circuitry within the power supply or ballast. More particularly, power supplies and electronic ballasts often include active power factor correction (PFC) and inverter circuitry that operates at high frequencies (i.e., in excess of 20 kilohertz) and that, consequently, generates a wide spectrum of noise. A PLC receiver that is mechanically and electrically integrated within a power supply or electronic ballast must be capable of reliably operating is such noisy environments.
Power line communication approaches that utilize a Digital Addressable Lighting Interface (DALI) communication line have become more commonplace in recent years. DALI systems (which are defined in the EN 60929 standard) are intended to provide two-way communication between a power supply/ballast and a control station at the AC power source. A major drawback of DALI approaches is that power supplies and ballasts that utilize DALI require individual supply cables consisting of three power wires (hot, neutral, and ground), as well as two dedicated low voltage signal wires that must be electrically isolated from the main circuitry within the power supply or ballast. The extensive wiring that is required for DALI systems is a major cost impediment to implementing those systems, especially in retrofit applications.
Therefore, a need still exists for reliable PLC methods and circuits that can be readily implemented within existing power supplies and electronic ballasts in a cost-effective and space-efficient manner. Such methods and circuits would represent a significant advance over the prior art.
The present invention relates to power line communication (PLC) methods and circuits for use with power supplies and electronic ballasts. In particular, the present invention relates to PLC methods and circuits that provide one-way communication from an AC power source to a power supply or electronic ballast (i.e., without providing feedback messages from the power supply or ballast to a control station within the AC power source). The present invention is generally applicable to AC line powered power supplies or electronic ballasts for commercial, industrial, and/or residential wiring that utilizes neutral and ground connections, and in which the power supplies or ballasts include an electromagnetic interference (EMI) filter and, preferably, a power factor correction circuit.
Specific preferred embodiments of the present invention related to arrangements that include controllable (dimmable) electronic ballasts for powering gas discharge lamps. Specific applications of the present invention provide a communication system between an AC power source and electronic ballasts in which the AC source includes a control station for transmitting commands along the AC power wires, and in which the ballasts include circuitry for detecting the commands and controlling the amount of power provided to the lamps in accordance with the commands. Such ballasts may be used in remotely controlled lighting systems in offices or industrial buildings, or in outdoor environment, without any need for additional dedicated control wiring to the ballasts.
The present invention provides a cost-effective alternative to approaches that utilize a Digital Addressable Lighting Interface (DALI) communication line. Power supplies and electronic ballasts according to present invention do not require individual supply cables or dedicated low voltage signal wires. Thus, the present invention provides a significant advantage (especially with regard to installation cost/complexity) over DALI systems, especially for those applications in which two-way communication is not needed and for retrofitting lighting systems in a building.
The PLC methods and circuits of the present invention may be used for individual or group control of electronic ballasts. For example, one of the more basic applications of the present invention is to provide load shed functionality for a lighting system that includes one or more electronic dimming ballasts. In that particular application, the PLC method need only be capable of transmitting a single bit of information (i.e., either an “on/off” or a “dim” command) from the AC power source to the ballast(s).
The preferred embodiments of the present invention are now described in detail with reference to
AC power source 910 includes a hot wire 10, a neutral wire 12, a ground wire 14, a conventional AC voltage source 912, and a control station 914. Conventional AC voltage source 912 provides a typical AC power line voltage (e.g., 120 volts rms at a frequency of 60 hertz), VAC, between hot wire 10 and neutral wire 12. Control station 914, which is coupled between neutral wire 12 and ground wire 14, includes a series arrangement of a power line carrier control signal generator 916 and a switch means 918 (depicted as an electrical switch in
As described in
EMI filter 930 is coupled to hot, neutral, and ground wires 10,12,14 of AC power source 910. EMI filter 930 has an effective common-mode resonant frequency, fRES. The periodic control voltage, VCONTROL, provided by power line carrier control signal generator 916 is selected to have a fundamental frequency that is approximately equal to either the effective common-mode resonant frequency, fRES, of EMI filter 930, or a harmonic of fRES. Preferred structures for realizing EMI filter 930 are described in further detail herein (i.e., with reference to
Power processing circuitry 940 is coupled between EMI filter 930 (via output connections 932,934,936 of EMI filter 930) and load 960 (via output connections 16,18 of power supply 920). The function of power processing circuitry 940 is to provide a conditioned and controlled source of power for load 960. In certain applications, such as in electronic ballasts for gas discharge lamps, it is common for power processing circuitry 940 to include a combination of a power factor correcting AC-to-DC converter (e.g., a full-wave bridge rectifier followed by a boost converter) and a high frequency DC-to-AC converter (e.g., an inverter followed by a resonant output circuit).
Power line communication (PLC) circuit 950 is coupled to EMI filter 930 (via input connection 952) and power processing circuitry 940 (via at least one output connection 956). Optionally, PLC circuit 950 may also be coupled to output terminals 932,934 of EMI filter 930 (via optional input connections 955,954, respectively). During operation, PLC circuit 950 detects if a power line carrier control signal is present; if so, PLC circuit 950 directs power processing circuitry 940 to control the power, PLOAD, provided to load 960 in dependence on the detected power line carrier control signal.
Optionally, PLC circuit 950 may be configured to be capable of directing power processing circuitry 940 to control PLOAD in dependence not only on the detected power line carrier control signal, but also in dependence on the timing of the power line carrier control signal with respect to the phase of VAC. More specifically, if the power line carrier control signal occurs during a positive half cycle of VAC, then PLC circuit 950 directs power processing circuitry 940 to control the power to load 960 in a first manner; conversely, if the power line carrier control signal occurs during a negative half cycle of VAC, then PLC circuit 950 directs power processing circuitry 940 to control the power to load 960 in a second manner. This optional feature of PLC circuit 200 is implemented, for example, in the preferred embodiment described in
In several of the specific preferred embodiments described in further detail herein (i.e., with reference to
Arrangement 900 operates according to a method that is now described with reference to
Preferably, the step of directing (1060) includes directing the power processing circuitry to control the load power in dependence on both: (i) the detected power line carrier control signal; and (ii) timing of the detected power line carrier control signal with respect to a phase of the voltage, VAC, provided by the AC power source between the hot wire and the neutral wire. More specifically, if the power line carrier control signal occurs during a positive half cycle of VAC, then the PLC circuit directs the power processing circuitry to control the load power in a first manner; conversely, if the power line carrier control signal occurs during a negative half cycle of VAC, then the PLC circuit directs power processing circuitry to control the load power in a second manner. This optional feature of method 1000 is implemented, for example, in the preferred embodiment described in
Method 1000 is advantageously implemented in an arrangement wherein the circuit for supplying power to the load is an electronic ballast, and in which the load consists of at least one gas discharge lamp.
Preferred embodiments in which arrangement 900 and method 1000 are realized by electronic ballast circuits are now described with reference to
EMI filter 100 has first, second, and third input connections 10,12,14 and first and second output connections 102,104. First input connection 10 is adapted for coupling to a hot wire of an alternating current (AC) power line voltage, such as that which is ordinarily provided by an electric utility (e.g., 120 volts rms at 60 hertz). Second input connection 12 is adapted for coupling to a neutral wire of the AC power source, while third input connection 14 is adapted for coupling to a ground wire of the AC power source. EMI filter 100 optionally includes a third output connection 106 (denoted by dashed lines in
Full-wave rectifier 120 is coupled to the first and second output connections 102,104 of EMI filter 100. Optionally, when EMI filter 100 includes a third output connection 106, full-wave rectifier 120 is also coupled to third output connection 106. During operation, full-wave rectifier receives the sinusoidal AC voltage provided between output connections 102,104 and provides a full-wave rectified AC voltage across capacitor 130, which functions as a high frequency filtering capacitor.
Power factor correction (PFC) circuit 140 is coupled to full-wave rectifier 120 and capacitor 130. During operation, PFC circuit 140 receives the full-wave rectified AC voltage from full-wave rectifier 120 and provides a substantially direct current (DC) voltage across capacitor 150. Capacitor 150 functions as a low frequency filtering capacitor for minimizing any low frequency (e.g., 120 hertz) ripple in the voltage provided by PFC circuit 140; although depicted in
Inverter 160 is coupled to PFC circuit 140 and capacitor 150. Inverter 160 has first and second output connections 16,18 that are adapted for coupling to lamp(s) 180. Although depicted in
Power line communication (PLC) circuit 200 includes a first input terminal 202 and a first output terminal 206. First input terminal 202 is coupled to the ground wire of the AC power source via third input connection 14 of EMI filter 100. First output terminal 206 is coupled to inverter 160; more specifically, in practice, first output terminal 206 is coupled to the drive circuitry (not shown in
During operation, PLC circuit 200 is capable of controlling operation of inverter 160 in accordance with a power line carrier control signal that is applied (e.g., by the electric utility company) between the neutral and ground wires of the AC power source. For example, in response to a power line carrier control signal corresponding to a load shed command, PLC circuit 200 directs inverter 160 to reduce the illumination level of the lamp(s) 180 from a full light output level (e.g., 100% of rated light output) to a predetermined reduced output level (e.g., 65% of rated light output).
Advantageously, PLC circuit 200 utilizes an effective common-mode resonant frequency, fRES, of EMI filter 100 to detect and amplify the power line carrier control signal. To provide this benefit, the fundamental frequency, fCONTROL, of the power line carrier control signal, VCONTROL, is selected to be approximately equal to the effective common-mode resonant frequency, fRES, of EMI filter 100; for reference, fRES typically ranges between 10,000 hertz and 25,000 hertz. Consequently, PLC circuit 200 may be realized with a relatively modest number of components and in a highly cost-effective and space-efficient manner.
EMI filter 100 comprises first, second, and third input connections 10,12,14, first and second output connections 102,104, first and second inductors 110,112 (commonly collectively referred to as a “common mode inductor”) and first and second capacitors 114,116 (commonly referred to as “Y-capacitors”). First, second, and third input connections 10,12,14 are adapted for coupling, respectively, to the hot, neutral, and ground wires of the AC power source. First and second output connections are coupled to full-wave rectifier 120. First inductor 110 is coupled between first input connection 10 and first output connection 102. Second inductor 112 is coupled between second input connection 12 and second output connection 104, and is magnetically coupled to first inductor 110. Inductors 110,112 are orientated, with respect to each other, as indicated by the dots shown in
Full-wave rectifier 120 is preferably realized by a diode bridge comprising first, second, third, and fourth diodes 122,124,126,128 connected in the manner described in
Referring to
Referring again to
During operation, when an appropriate power line carrier control signal is applied between the neutral and ground wires of the AC power source, signal detector circuit 310 provides a predetermined voltage (i.e., corresponding to a logic “1”) at output 314. EMI filter 100 prevents signals (i.e., common-mode noise that occurs within ballast 30) with frequencies other than the fundamental frequency of the power line carrier control signal from developing a significant voltage across resistor 318.
As described in
During operation, phase detector circuit 330 functions as a near zero-crossing detector that provides an output signal in dependence on the phase (i.e., positive half cycle or negative half cycle) of the voltage, VAC, between the hot and neutral wires of the AC power source. Within phase detector circuit 300, inverting input 344 of op amp 340 sees a scaled-down (via the voltage divider action provided by resistors 332,334) version of the half-wave rectified AC voltage that is present between the neutral wire of the AC source and circuit ground 90, while non-inverting input 342 of op amp 340 sees a scaled-down (via the voltage divider action provided by resistors 336,338) version of VREF. The output 346 of op amp 340 is low (i.e., at about zero volts) when the voltage at inverting input 344 is higher than the voltage at non-inverting input 342; conversely, the output 346 of op amp 340 is high (e.g., at about +5 volts or so) when the voltage at non-inverting input 342 is higher than the voltage at inverting input 344. During the positive half cycles of VAC, approximately zero volts are present at second input terminal 304, so the voltage at inverting input 344 is likewise approximately zero; conversely, during the negative half cycles of VAC, the voltage at second input terminal 304 is positive and nonzero, so the voltage at inverting input 344 exceeds the voltage at non-inverting input 342 for most of the duration of the negative half cycles. Thus, the output 346 of op amp 340 is high (i.e., at about +5 volts) during positive half cycles of the AC power line voltage, and is low (i.e., at about zero volts) during negative half cycles of the AC power line voltage. In this way, phase detector circuit 330 provides an output signal that is indicative of the phase of VAC.
Referring again to
In a second specific preferred embodiment of the present invention, as described in
EMI filter 100′ comprises first, second, and third input connections 10,12,14, first, second, and third output connections 102,104,106, first and second magnetically coupled inductors 110,112 (commonly collectively referred to as a “common mode inductor”), and a capacitor 118 (commonly referred to as a “Y-capacitor”). First, second, and third input connections 10,12,14 are adapted for coupling, respectively, to the hot, neutral, and ground wires of the AC power source. First, second, and third output connections are coupled to full-wave rectifier circuit 120. First inductor 110 is coupled between first input connection 10 and first output connection 102. Second inductor is coupled between second input connection 12 and second output connection 104, and is magnetically coupled to first inductor 110. Inductors 110,112 are orientated, with respect to each other, as indicated by the dots shown in
Full-wave rectifier 120 is preferably realized by a diode bridge comprising first, second, third, and fourth diodes 122,124,126,128 connected in the manner described in
PLC circuit 400 comprises an input terminal 402, an output terminal 406, 15, a signal detector circuit 410, and a comparator circuit 440. Input terminal 402 is coupled to the ground wire of the AC power source via third input connection 14 of EMI filter 100′. Output terminal 406 is coupled to inverter 160.
Referring again to
During operation, signal detector circuit 410 functions as a charge pump circuit that provides a predetermined voltage at output 414 when a suitable power line carrier control signal is applied between the neutral and ground wires of the AC power source. More specifically, signal detector circuit 410 rectifies and filters the voltage at input 402 which, when a power line carrier control signal is present, consists of an amplified control signal combined with a common-mode noise signal. Stated another way, signal detector circuit 410 provides an output voltage (at output 414) which is approximately proportional to the high frequency current which flows to circuit ground 90. However, EMI filter 100′ provides a high Q factor (e.g., 8-10, or so) at the fundamental frequency of the power line carrier control signal (which follows from the fact that the fundamental frequency, fCONTROL, of the power line carrier control signal, VCONTROL, is approximately equal to an effective common-mode resonant frequency of EMI filter 100′); consequently, in the signal provided to input 412 of signal detector circuit 410, the portion of the signal that is attributable to the power line carrier control signal is substantially greater than the portion that is attributable to the common-mode noise signal.
As described in
During operation, comparator circuit 440 provides a logic signal (i.e., a logic “0” or a logic “1”) at output terminal 406 in accordance with the power line carrier control signal as detected by signal detector circuit 410. More specifically, if a power line carrier control signal of sufficient amplitude (e.g., 1-1.5 volts rms) is applied between the neutral and ground wires of the AC power source, the voltage at inverting input 464 exceeds the voltage at non-inverting input 462; consequently, a step signal is generated at output 466 of comparator 460, which causes inverter 160 to reduce the current supplied to lamp(s) 180. Conversely, in the absence of a power line carrier control signal of sufficient amplitude, the voltage at non-inverting input 462 exceeds the voltage at inverting input 464; consequently, a reverse step signal is present at output 466 of comparator 460, which causes inverter 160 to apply full current to lamp(s) 180. Positive feedback, which is provided by way of resistor 446, allows comparator circuit 440 to operate with rapid switching and with hysteresis. Resistor 448 and capacitor 450 together function as an integrator circuit which protects against false tripping (i.e., the output 466 of op amp 460 incorrectly transitioning from a logic “1” to a logic “0”) due to low frequency noise/transients in the AC power line voltage and/or other occurrences of noise within ballast 40.
Preferred nominal values for certain components and signals in ballast 40 are now recited as follows. Within EMI filter 100′, inductors 110,112 preferably have an inductance of 15 millihenries, and capacitor 118 preferably has a capacitance of 3300 picofarads. Within signal detector circuit 410, capacitor 416 preferably has a capacitance of 470 picofarads, resistor 434 preferably has a resistance of 51 kilohms, and capacitor 436 preferably has a capacitance of 0.1 microfarad. Within comparator circuit 440, resistor 448 preferably has a resistance of 1 megohms, and capacitor 450 preferably has a capacitance of 1 microfarad. VREF and the resistances of resistors 442,444 are preferably set such that the voltage at non-inverting input 462 of op amp 460 is at about 8.3 volts.
It should be appreciated that, in ballast 40, a considerable amount of common-mode noise (attributable to operation of PFC circuit 140 and inverter 160) is encountered by signal detector circuit 410. That noise, which may produce a voltage on the order of several volts at the output 414, is readily accepted by capacitor 416. Moreover, the common-mode noise attributable to operation of PFC circuit 140 is not evenly distributed throughout the cycles of the AC voltage, VAC, provided between the hot and neutral wires of the AC power source; rather, that common-mode noise has a significant burst at those points where VAC passes through zero (commonly referred to as the “zero crossings” of VAC). As a result, the output of signal detector circuit 410 may be somewhat distorted. While distortion due to common-mode noise does not appear to unfavorably affect the operation of comparator circuit 440, it does constitute a significant potential problem for a ballast in which multi-bit power line communication (as opposed to single bit power line communication, as in ballast 40) is desired or required.
EMI filter 100′ and full-wave rectifier 120 are preferably realized with the same structures previously described with reference to
PLC circuit 500 comprises first and second input terminals 502,504, first and second output terminals 506,508, a signal detector circuit 510, a comparator circuit 540, a phase detector circuit 570, and a logic circuit 600. First input terminal 502 is coupled to the ground wire of the AC power source via third input connection 14 of EMI filter 100′. Second input terminal 504 is coupled to second output connection 104 of EMI filter 100′. First and second output terminals 506,508 are coupled to inverter 160.
Referring to
As described in
During operation, comparator circuit 540 provides a logic signal in accordance with the power line carrier control signal. Like comparator circuit 440 (in
As described in
Referring again to
EMI filter 100′ and full-wave rectifier 120 are preferably realized with the same structures previously described with reference to
PLC circuit 700 comprises first, second, and third input terminals 702,704,705, first and second output terminals 706,708, a signal detector circuit 710, a comparator circuit 740, a phase detector circuit 770, and a logic circuit 800. First input terminal 702 is coupled to the ground wire of the AC power source via third input connection 14 of EMI filter 100′. Second input terminal 704 is coupled to the second output connection 104 of EMI filter 100′. Third input terminal 705 is coupled to the first output connection 102 of EMI filter 100′. First and second output connections 706,708 are coupled to inverter 160.
Referring to
During operation, signal detector circuit 710 provides a predetermined output voltage at output 714 when a power line carrier control signal is applied between the neutral and ground wires of the AC power source. Within signal detector circuit 710, first capacitor 716 and first resistor 738 function as a high pass filter that suppresses any low frequency (e.g., 60 hertz) noise that is present in the voltage at input 712.
Referring again to
As described in
During operation, phase detector circuit 770 generates output signals (which are then provided to logic circuit 800) in dependence on the phase of the voltage, VAC, that is present between the hot and neutral wires of the AC power source. More particularly, phase detector circuit 770 operates to generate sampling time intervals corresponding to the positive and negative half cycles of VAC, including “dead time” intervals (during which the outputs of both op amps 780,790 are at a logic “0” level) around the times that VAC passes through zero (commonly referred to as the “zero crossings” of VAC). Internal common-mode noise problems (attributable to operation of PFC circuit 140) are especially problematic around the zero crossings of VAC. Thus, by generating these sampling time intervals, phase detector circuit 770 (operating in conjunction with logic circuit 800) helps to overcome internal noise problems (which are especially pronounced around the zero crossings of VAC) that otherwise interfere with effective multi-bit data transmission. By generating “dead time” intervals during the zero crossings of VAC, phase detector circuit 770 ensures that, even if signal detector circuit 710 responds to noise, no resulting “false” signals will be allowed to pass through to output terminals 706,708.
Referring again to
Advantageously, PLC circuit 700 is capable of quickly responding to a power line carrier control signal and of receiving data at a rate that is on the order of about 120 bits per second.
Preferred nominal values for certain components in ballast 80 are as follows. Within EMI filter 100′, capacitor 118 has a capacitance of 3300 picofarads. Within signal detector circuit 710, capacitors 716 and 739 each have a capacitance of 1 nanofarad, resistor 738 has a resistance of 100 kilohms, resistor 734 has a resistance of 51 kilohms, and capacitor 736 has a capacitance of 10 nanofarads.
Although the present invention has been described with reference to certain preferred embodiments, numerous modifications and variations can be made by those skilled in the art without departing from the novel spirit and scope of this invention.
