Patent Application
20210359245
The present invention relates to a field of display technologies, especially to an array substrate and a display panel.
Active-matrix organic light-emitting diode (AMOLED) display panels gradually become a display technology of new generation because of characteristics of high contrast, wide color gamuts, and low power consumption.
However, as a dimension of the AMOLED display panel gradually becomes greater and display resolution becomes higher, a length of a power cable of the display panel increases, a width thereof decreases, and a resistance of the cable increases. When a drive circuit transmits signals to a light-emitting unit, and voltage drop on the cable also increases, which results in different strengths of signals acquired by the light-emitting units with different distances from the drive circuit such that the display panel luminates unevenly.
Because the power cable of the display panel has the decreased width and increased resistance, voltage drop also increases when the drive circuit transmits signals to the light-emitting units, the light-emitting units with different distances from the drive circuit acquires signals from the drive circuit with different strengths such that the display panel luminates unevenly.
An embodiment of the present invention provides an array substrate and a display panel that are able to improve luminous uniformity of the array substrate and the display panel.
In a first aspect, an embodiment of the present invention provides an array substrate, comprising: a base layer, a thin film transistor, an auxiliary electrode, and an additional electrode;
the thin film transistor, auxiliary electrode and the additional electrode disposed on the base layer, the auxiliary electrode disposed between the thin film transistor and the additional electrode, and the auxiliary electrode connected to the additional electrode by an electrical connecting structure.
In the array substrate provided by an embodiment of the present invention, the base layer comprises a base substrate and an inorganic insulation layer, the inorganic insulation layer is disposed on the base substrate.
In the array substrate provided by an embodiment of the present invention, the electrical connecting structure is covered and disposed in the inorganic insulation layer.
In the array substrate provided by an embodiment of the present invention, the array substrate further comprises:
a planarization layer, the planarization layer disposed on the thin film transistor, the auxiliary electrode, and the base layer, and a via hole defined in the planarization layer and exposing the auxiliary electrode; and
an anode layer, the anode layer disposed on the planarization layer and connected to the auxiliary electrode through the via hole.
In the array substrate provided by an embodiment of the present invention, the anode layer further comprises an anode extension portion; and
the anode extension portion is disposed on a side of the anode layer near the additional electrode and extends along a direction toward the additional electrode, and the anode extension portion covers the base layer and the additional electrode.
In the array substrate provided by an embodiment of the present invention, the anode extension portion is formed integrally with the anode layer and forms the electrical connecting structure.
In the array substrate provided by an embodiment of the present invention, the array substrate further comprises a crack detecting circuit; and
the crack detecting circuit is disposed on the base layer and is configured to detect whether the array substrate has a crack.
In the array substrate provided by an embodiment of the present invention, the additional electrode is disposed between the crack detecting circuit and the auxiliary electrode.
In the array substrate provided by an embodiment of the present invention, the array substrate further comprises a first blocking wall;
the first blocking wall is disposed on a side of the additional electrode near the crack detecting circuit and/or on a side of the additional electrode near the auxiliary electrode.
In the array substrate provided by an embodiment of the present invention, a thickness of the first blocking wall is greater than a thickness of the additional electrode.
In the array substrate provided by an embodiment of the present invention, the array substrate further comprises a second blocking wall;
the second blocking wall is disposed on a side of the anode layer toward the additional electrode or on a side of the anode extension portion near the additional electrode.
In the array substrate provided by an embodiment of the present invention, the thin film transistor is located on an edge of the base layer.
In a second aspect, an embodiment of the present invention provides a display panel, comprising: an array substrate; and
the array substrate comprising a base layer, a thin film transistor, an auxiliary electrode, and an additional electrode, the thin film transistor, auxiliary electrode and the additional electrode disposed on the base layer, the auxiliary electrode disposed between the thin film transistor and the additional electrode, and the auxiliary electrode connected to the additional electrode by an electrical connecting structure.
In a display panel provided by an embodiment of the present invention, the base layer comprises a base substrate and an inorganic insulation layer, and the inorganic insulation layer is disposed on the base substrate.
In a display panel provided by an embodiment of the present invention, the electrical connecting structure is covered and disposed in the inorganic insulation layer.
In a display panel provided by an embodiment of the present invention, the array substrate further comprises:
a planarization layer, the planarization layer disposed on the thin film transistor, the auxiliary electrode, and the base layer, and a via hole defined in the planarization layer and exposing the auxiliary electrode; and
an anode layer, the anode layer disposed on the planarization layer and connected to the auxiliary electrode through the via hole.
In a display panel provided by an embodiment of the present invention, the array substrate further comprises an anode extension portion; and
the anode extension portion is disposed on a side of the anode layer near the additional electrode and extends along a direction toward the additional electrode, and the anode extension portion covers the base layer and the additional electrode.
In a display panel provided by an embodiment of the present invention, the anode extension portion is formed integrally with the anode layer and forms the electrical connecting structure.
In a display panel provided by an embodiment of the present invention, the array substrate further comprises a crack detecting circuit; and
the crack detecting circuit is disposed on the base layer and is configured to detect whether the array substrate has a crack.
In a display panel provided by an embodiment of the present invention, the additional electrode is disposed between the crack detecting circuit and the auxiliary electrode.
Advantages
An array substrate provided by an embodiment of the present invention comprises: a base layer, a thin film transistor, an auxiliary electrode and an additional electrode, the thin film transistor, the auxiliary electrode, and the additional electrode are disposed on the base layer, and the auxiliary electrode is disposed between the thin film transistor and the additional electrode, the auxiliary electrode is electrically connected to the additional electrode by an electrical connecting structure. The present solution can reduce reduces the voltage drop on the auxiliary electrode and increases luminous uniformity of the array substrate.
The technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are merely some embodiments of the present invention instead of all embodiments. According to the embodiments in the present invention, all other embodiments obtained by those skilled in the art without making any creative effort shall fall within the protection scope of the present invention.
An embodiment of the present invention provides an array substrate and a display panel, which will be described respectively as follows.
With reference to
The thin film transistor 102, the auxiliary electrode 103 and the additional electrode 104 are disposed on the base layer 101. The auxiliary electrode 102 is disposed between the thin film transistor 102 and the additional electrode 104.
It should be note that the thin film transistor 102 is disposed on an edge of the base layer 101. The thin film transistor can be a low temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, a solid phase crystallization thin film transistor, or other known thin film transistor often used for display technologies.
The auxiliary electrode 103 is a VSS signal wire. A typical value of the auxiliary electrode 103 is about 100 microns. It should be noted that the additional electrode 102 is a newly added VSS signal wire for preventing the issue of uneven luminescence of the array substrate 10 resulting from increased voltage drop due to the decreased width of the auxiliary electrode 103. It should be understood that to achieve the above technical effect, electrically connecting the auxiliary electrode 103 to the additional electrode 104 is necessary. Therefore, an electrical connecting structure 90 can be disposed to electrically connect the auxiliary electrode 103 to the additional electrode 104 by the electrical connecting structure 90.
The planarization layer 20 is disposed on the thin film transistor 102, the auxiliary electrode 103, and the base layer 101. Furthermore, a via hole 201 is defined in the planarization layer 20 and exposes the auxiliary electrode 102.
The anode layer 30 is disposed on the planarization layer 20 and is connected to the auxiliary electrode 103 through the via hole 201 in the planarization layer 20.
In some embodiments, with reference to
In an embodiment of the present invention, the array substrate 10 can further comprise a crack detecting circuit 105. The crack detecting circuit 105 is disposed on the base layer, and can be configured to detect whether the array substrate 10 has a crack. With reference to
To prevent the above circumstance, the additional electrode 104 can be disposed between the crack detecting circuit 105 and the auxiliary electrode 103. In other words, the thin film transistor 102, the auxiliary electrode 103, and the additional electrode 104 are disposed on a side, the crack detecting circuit 105 is disposed on another side, as shown specifically in
It should be noted that sides of the additional electrode 104 and the anode layer 30 are easily corroded. Therefore, a blocking wall can be disposed on the sides of the additional electrode 104 and the anode layer 30. Specifically, with reference
In some embodiments, with reference to
It can be understood that because the side of the additional electrode 104 near the auxiliary electrode 103 is covered by the anode extension portion 30a, there is no need to dispose a blocking wall on the side. Therefore, the first blocking wall 1041 can be disposed on the side of the additional electrode 104 near the crack detecting circuit 105, and the second blocking wall 1042 can be disposed on the side of the anode extension portion 30a near the additional electrode 104 to prevent the sides of the anode extension portion 30a and the additional electrode 104 from corrosion, as shown in
In an embodiment of the present invention, the array substrate 10 can further comprise a cathode layer 40, a pixel definition layer 301, an AMOLED functional layer 50, a first encapsulation layer 60, a second encapsulation layer 70, and a third encapsulation layer 80.
The cathode layer 40 is disposed on the planarization layer 20 and the anode layer 30. The pixel definition layer 301 is disposed on the anode layer 30. The AMOLED functional layer 50 covers the cathode layer 40 and a portion of the anode layer 30. The first encapsulation layer 60 covers the AMOLED functional layer 50, the pixel definition layer 301, the anode layer 30, the additional electrode 104, and the base layer 101. The second encapsulation layer 70 is disposed on the first encapsulation layer 60. The third encapsulation layer 80 covers the second encapsulation layer 70, the first encapsulation layer 60, and the base layer 101.
It should be noted that the first encapsulation layer 60 and the third encapsulation layer 80 are inorganic encapsulation layers. The second encapsulation layer 70 is an organic encapsulation layer.
As described above, an array substrate provided by an embodiment of the present invention 10, by adding an additional electrode 104 on the base layer 101 of the array substrate and electrically connecting the auxiliary electrode 103 and the additional electrode 104 through an electrical connecting structure 90, can prevent difference of luminous uniformity of the array substrate 10 resulting from due to voltage drop caused by the decreased width of the auxiliary electrode 104 such that luminous uniformity of the array substrate 10 is improved.
The array substrate 10 provided by the above embodiment can be included in a display panel 1. With reference to
In the above embodiments focuses on description of each embodiment. Description omitted in some embodiment can refer to related description in other embodiment.
As described above, an array substrate provided by an embodiment of the present invention has been introduced in details. In the specification, the specific examples are used to explain the principle and implementation of the present invention. The above description is only used to help understand the technical solution of the present invention and the core spirit thereof. A person having ordinary skill in the art should understand that he/her can still modify the technical solutions described in the foregoing embodiments, or replace some of the technical features with equivalents. Such modification or replacement would not make the nature of corresponding technical solution depart from the scope of the technical solution of each embodiment of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201910540560.9 | Jun 2019 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2019/112177 | 10/21/2019 | WO | 00 |
