ARRAY SUBSTRATE, BACKLIGHT MODULE AND DISPLAY PANEL

Information

  • Patent Application
  • 20240038946
  • Publication Number
    20240038946
  • Date Filed
    March 30, 2021
    3 years ago
  • Date Published
    February 01, 2024
    3 months ago
Abstract
The present invention provides an array substrate, a backlight module, and a display panel, by locating two second conductive pads connected to a second wire on the same side of a first wire, the present invention prevents an overlap between the first wire and the second wire connected to the two second conductive pad.
Description
FIELD OF INVENTION

The present invention relates to a field of display technologies, especially relates to an array substrate, a backlight module, and a display panel.


BACKGROUND OF INVENTION

Micro-light emitting diode (Micro-LED) display development has become one of hot spots of future display technologies. Compared to conventional liquid crystal display panels and organic light emitting diode display devices, Micro-LEDs display panel have advantages of fast response, high color gamut, high resolution, low power consumption, etc. However, technical difficulties are many and technologies, especially the key technology mass transfer technologies, are complicated, the miniaturization of light emitting diode (LED) particles has become a technical bottleneck. A mini-light emitting diode (Mini-LED), serving as a product combining the Micro-LED and the backplate, has advantages such as high contrast, high color rendering ability which are comparable to OLED, has a cost slightly which is higher than the cost of the LCD and is only 60% of the cost of the OLED, and is easier to implement than the OLED. Therefore, the Mini-LED becomes a layout hotspot for display panel manufacturers.


With reference to FIG. 1, FIG. 1 is a schematic view of conventional driver chips bonded on a backplate and connected to Mini-LEDs. Each of the driver chips 1 comprises a first pin VCC, a second pin VSS, a third pin Di, a fourth pin Out, and a fifth pin GND, and a first signal line 2, a second signal line 3, a third signal line 4, a fourth signal line 5, and a power line 6 are disposed on the backplate. The first signal line 1 is electrically connected to the first pin VCC of the driver chips 1 to transmit a carrier signal to the driver chip 1. The second signal line 3 is electrically connected to the second pin VSS on the driver chips 1. The third signal line 4 is electrically connected to the third pins Di and the fourth pins Out on two of the driver chips 1 to implement signal transmission between the two driver chips 1. The fourth signal line 5 is electrically connected to the fifth pins GND of the driver chips 1 to input a grounding signal. One end of the LED is connected to the fourth pins Out, another end of the LED is connected to the power line 6, an overlap is defined between the third signal line 4 and the second signal line 3.


Therefore, it is necessary to set forth a technical solution to solve the issue of the overlapped third signal line and second signal line electrically to the driver chips in the conventional technologies which disadvantages the layout.


SUMMARY OF INVENTION
Technical Problems

An objective of the present invention is to provide an array substrate, a backlight module and a display panel, to solve an overlapping issue of signal lines electrically to driver chips in the conventional technologies.


Solutions to Problems
Technical Solutions

A backlight module, the backlight module comprises:

    • a substrate comprising at least two first bonding regions;
    • at least one first conductive pad in each of the first bonding regions of the substrate;
    • at least two second conductive pads disposed in each of the first bonding regions of the substrate;
    • first wires disposed on the substrate and each of which is connected to at least two of the first conductive pad in the first bonding regions;
    • a second wire disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; and
    • driver chips connected to the first conductive pad and the second conductive pads in each of the first bonding regions;
    • wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.


A display panel, the display panel comprises:

    • a substrate, the substrate comprises at least two first bonding regions;
    • at least one first conductive pad disposed in each of the first bonding regions on the substrate;
    • at least two second conductive pads disposed in each of the first bonding regions on the substrate;
    • first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions;
    • a second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; and
    • driver chips connected to the first conductive pad and the second conductive pads in each of the first bonding regions;
    • wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.


An array substrate, the array substrate comprises:

    • a substrate, the substrate comprises at least two first bonding regions;
    • at least one first conductive pad disposed in each of the first bonding regions on the substrate;
    • at least two second conductive pads disposed in each of the first bonding regions on the substrate;
    • first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions; and
    • a second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively;
    • wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.


BENEFICIAL EFFECTS OF INVENTION
Beneficial Effects

The present invention provides an array substrate, a backlight module, and a display panel, by locating two second conductive pads connected to a second wire on the same side of first wires, avoids an overlap between the first wires and the second wire, which advantages disposing the second wire, the second conductive pads connected to the second wire, the first wires, and the first conductive pad connected to the first wires on the same metal layer. A number of metal film layers are decreased while layout is simplified, which facilitates improving a yield rate and lowering a cost.





BRIEF DESCRIPTION OF DRAWINGS
Description of Drawings


FIG. 1 is a schematic view of conventional driver chips bonded on a backplate and connected to Mini-LEDs;



FIG. 2 is a schematic cross-sectional view a backlight module of a first embodiment of the present invention;



FIG. 3 is a first schematic plan view the backlight module of the first embodiment of the present invention;



FIG. 4 is a first schematic partially enlarged view of the backlight module shown in FIG. 3;



FIG. 5 is a first schematic plan view of the backlight module of a second embodiment of the present invention;



FIG. 6 is a first schematic partially enlarged view of the backlight module shown in FIG. 5;



FIG. 7 is a second schematic partially enlarged view of the backlight module shown in FIG. 5;



FIG. 8 is a first schematic partially enlarged view of the backlight module of a third embodiment of the present invention;



FIG. 9 is a second schematic partially enlarged view of the backlight module shown in FIG. 3;



FIG. 10 is a schematic partially enlarged view the backlight module of a fourth embodiment of the present invention;



FIG. 11 is a schematic partially enlarged view of the backlight module of a fifth embodiment of the present invention;



FIG. 12 is a schematic partially enlarged view of the backlight module of a sixth embodiment of the present invention;



FIG. 13 is a schematic partially enlarged view of the backlight module of a seventh embodiment of the present invention;



FIG. 14 is a schematic partially enlarged view of the backlight module of an eighth embodiment of the present invention;



FIG. 15 is a schematic partially enlarged view of the backlight module of a ninth embodiment of the present invention;



FIG. 16 is a schematic partially enlarged view of the backlight module of a tenth embodiment of the present invention;



FIG. 17 is a schematic partially enlarged view of the backlight module of an eleventh embodiment of the present invention; and



FIG. 18 is a schematic partially enlarged view of the backlight module of a twelfth embodiment of the present invention.





EMBODIMENTS OF INVENTION
Embodiments of Invention

The technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are merely some embodiments of the present invention instead of all embodiments. According to the embodiments in the present invention, all other embodiments obtained by those skilled in the art without making any creative effort shall fall within the protection scope of the present invention.


With reference to FIGS. 2 and 3, FIG. 2 is a schematic cross-sectional view of a backlight module of a first embodiment of the present invention, FIG. 3 is a first schematic plan view of the backlight module of the first embodiment of the present invention. The backlight module 100 comprises a substrate 10, at least one first conductive pad 11, at least two second conductive pads 12, at least one third conductive pad 13, a first wires 14, a second wire 15, a third wire 16, a fourth wire 17, driver chips 18, a flexible printed circuit board 19, and light emitting units 20.


In the present embodiment, the substrate 10 is a glass substrate. It can be understood that the substrate 10 can also be a flexible substrate. The first conductive pad 11, the second conductive pads 12, the third conductive pad 13, the first wires 14, the second wire 15, the third wire 16, and the fourth wire 17 are disposed on the substrate 10. The first conductive pad 11, the second conductive pads 12, the third conductive pad 13, the first wires 14, the second wire 15, the third wire 16, and the fourth wire 17 are disposed on the same metal layer. The metal layer is located on the substrate 10 to reduce a number of the metal layer of the backlight module, simplify manufacturing processes of the backlight module, and lower a manufacturing cost of the backlight module. It can be understood that each of the first conductive pad 11, the second conductive pads 12, the third conductive pad 13, the first wires 14, the second wire 15, third wire 16, and the fourth wire 17 can be disposed on two or more metal layers. Material for manufacturing the metal layer comprises at least one of molybdenum, aluminum, titanium, or copper.


In the present embodiment, the substrate 10 comprises at least two first bonding regions 100a. Specifically, the substrate 10 comprises a plurality of first bonding regions 100a. The first bonding regions 100a are arranged in rows and columns on the substrate 10. One of the driver chips 18 is fixed on one of the first bonding regions 100a, and correspondingly, driver chips 18 are arranged in rows and columns. A first conductive pad 11, second conductive pads 12, and a third conductive pad 13 are disposed on each of the first bonding regions 100a of the substrate 10, one of the driver chips 18 is connected to one of the first conductive pad 11, the second conductive pads 12, and the third conductive pad 13 of the first bonding regions 100a. Each of the driver chips 18 comprises a first pin 181 connected to one of the first conductive pad 11 respectively, a second pin 182 connected to one of the second conductive pads 12, and a third pin 183 connected to one of the third conductive pads 13. Each of the driver chips 18 can further comprise a redundant pin and a test pin. The redundant pin is not supplied with an electrical signal, the test pin a pin configured to test whether the driver chips work normally and is not configured to signal transmission. Electrical connection between the first conductive pad 11a and the first pin 181, between the second conductive pad 12 and the second pin 182, or between the third conductive pad 13 and the third pin 183 can be implemented through solder paste or conduction adhesive. With reference to FIG. 4, FIG. 4 is a first schematic partially enlarged view of the backlight module shown in FIG. 3. The driver chips 18 are rectangular, for example, the driver chips 18 are square, an orthographic projection of each of the driver chips 18 on the substrate 10 comprises a first parallel edge 18a parallel to an extension direction of the first wires 14 and a second parallel edge 18b parallel to the extension direction of the first wires 14, a first perpendicular edge 18c, and a second perpendicular edge 18d. The first parallel edge 18a is opposite to the second parallel edge 18b, the first perpendicular edge 18c is opposite to the second perpendicular edge 18d, the first perpendicular edge 18c is perpendicular to the first parallel edge 18a, and the second perpendicular edge 18d is perpendicular to the first parallel edge 18a. The driver chips 18 can also be irregularly shaped.


In the present embodiment, the substrate 10 comprises second bonding regions 100b, each of the second bonding regions 100b is located on a side of each of the first bonding regions 100a. Light emitting units 20 are fixed in the second bonding regions 100b respectively, each of the light emitting units 20 comprises rows of light emitting devices 201 in series, the rows of the light emitting devices 201 are electrically connected, a number of each row of the light emitting devices 201 in series is greater than 2, and the light emitting devices 201 are mini-light emitting diodes (mini-LEDs). One end of each of the light emitting units 20 is electrically connected to the driver chip 18 through the third wire 16, another end of the light emitting unit 20 is connected to the fourth wire 17, and the fourth wire 17 is a power line. It can be understood that the light emitting devices 201 can also be micro-light emitting diodes (Micro-LEDs).


In the present embodiment, with reference to FIG. 3, the flexible printed circuit board 19 is mounted securely on the substrate 10, the flexible printed circuit board 19 is electrically connected to the first wires 14, the second wire 15 and the fourth wire 17 to input corresponding electrical signals into the first wires 14, the second wire 15, and the fourth wire 17. The flexible printed circuit board 19 is disposed on an end of the substrate 10 and are on the same surface of the substrate 10 with the first wires 14. The first wires 14 extends to a region fixing the flexible printed circuit board 19. The fifth wire 151 is connected to a portion between the first one of the driver chips 18 near the flexible printed circuit board 19 and the flexible printed circuit board 19, outputs the signal outputted from the flexible printed circuit board 19 to the driver chips 18, and is connected to adjacent two of the driver chips 18 through the second wire 15 to implement signal transmission between the driver chips 18. One end of the fourth wire 17 to a position on which the flexible printed circuit board 19 is located and is electrically connected to the flexible printed circuit board 19. It can be understood that flexible printed circuit board 19 can also be fixed on a rear surface of the substrate 10 on which the first wires 14 is disposed. The flexible printed circuit board 19 plural and each of the flexible printed circuit boards 19 is electrically connected to the first wires 14, the second wire 15, and the fourth wire 17 in some regions. The flexible printed circuit board 17 can also be fixed on two ends of the substrate 10.


In the present embodiment, the first wires 14 are configured to transmit the same signal to the first conductive pad 11s in at least two first bonding regions 100a transmitting the same signal, and input the signal into the driver chips 18 through the first pin 181 connected to the first conductive pad 11. The first wires 14 is connected to at least two of the first conductive pads 11 in the first bonding regions 100a. One first conductive pad 11 transmitting the same signal is disposed on each of the first bonding regions 100a, and the at least one first conductive pad 11 of each of the first bonding regions 100a is connected correspondingly to the at least one first wire 14. Namely, each of the first conductive pad 11 is only connected to one first wire 14 transmitting corresponding signals. Accordingly, to prevent an overlap of the first conductive pads 11 transmitting different signals when the first conductive pads 11 are disposed along the first parallel edge 18a and the second parallel edge 18b, at most two of the first conductive pads 11 are disposed along the first parallel edge 18a, and/or, at most two of the first conductive pads 11 are disposed along the second parallel edge 18b. Namely, at most two of the first conductive pads 11 transmitting different signals are disposed along one of the first parallel edge 18a and the second parallel edge 18b. It can be understood that two or more first conductive pads 11 transmitting the same signal can also be disposed on each of the first bonding regions 100a. The first wires 14 are straight wires and disposed along a column direction.


In the present embodiment, second wire 15 is configured to transmit a signal required for addressing of each of the driver chips 18, and is also configured to output a signal required for working of the driver chips 18. The second wire 15 are connected to two second conductive pads 12 in two of the first bonding regions 100a such that signal are transmitted in cascade between two of the driver chips 18. At least two second conductive pads 12 are disposed on each of the first bonding regions 100a is disposed with, the second conductive pad 12 of one of the first bonding regions 100a is connected to the second conductive pad 12 of another of the first bonding regions 100a through the second wire 15, one of the second conductive pads 12 inputs the signal outputted from one of the driver chips 18 to the other of the driver chips 18, another one of the second conductive pads 12 inputs the signal outputted from one of the driver chips 18 to one of the driver chips 18. Namely, the at least two second conductive pads 12 comprises first type second conductive pads and second type second conductive pads, the first type second conductive pads output signals from the driver chips 18, the second type second conductive pads input signals into the driver chips 18. Furthermore, the second wire 15 connected to two of the second conductive pads 12 and the two second conductive pads 12 connected to the second wire 15 constitute a set of cascade unit to transmit a cascade signal between the two driver chips 18. Multiple sets of cascade units can be adopted to transmit various cascade signals. The second wire 15 extends along a column direction, namely, the extension directions of the first wires 14 and the second wire 15 are the same. The second wire 15 is straight and is parallel to the first wires 14.


In the present embodiment, in each of the first bonding regions 100a, at least one second conductive pad 12 and at most one first conductive pad 11 connected to the second wire 15 are disposed along the second parallel edge 18b; and/or, in each of the first bonding regions 100b, at least one second conductive pad 12 and at most two of the first conductive pads 11 connected to the second wire 15 are disposed along the first parallel edge 18a. At most two of the first conductive pads 11 disposed along the first parallel edge 18a are located on disposed on a side of the at least one second conductive pad 12 away from the second wire 15 connected to the second conductive pad 12 along the first parallel edge 18a or the second parallel edge 18b. The at most one first conductive pad disposed along the second parallel edge 18b is located on a side of the at least one second conductive pad 12 disposed along the first parallel edge or the second parallel edge away from the second wire 15 connected to the second conductive pads.


Furthermore, with reference to FIG. 4, two of the second conductive pads 12 (the second conductive pad 12a and the second conductive pad 12b) connected to the second wire 15 are located on the same side of each of the first wires 14 such that when two second conductive pads 12 are connected through the second wire 15, the second wire 15 would not overlap with the first wires 14, which prevents shorting risks resulted from the overlapped second wire 15 and the first wires 14, optimizes layout design of the backlight module such that the first wires 14, the first conductive pad 11, the second wire 15, and the second conductive pads 12 can be disposed in the same layer to reduce a number of metal layers required by the backlight module and lower manufacturing processes while simplifying the manufacturing processes of the backlight module.


In the present embodiment, the third wire 16 transmits the signal in the driver chip 18 to the light emitting unit 20, an end of the third wire 16 is connected to the third conductive pad 13, another end of the third wire 16 is connected to an end of the light emitting unit 20, the third wire 16 extends from a position of the third conductive pad 13 to a side of the second parallel edge 18b away from the first parallel edge 18a. The first wire 14 is located on a side of the second parallel edge near the first parallel edge 18a. In each of the first bonding regions 100a, at least one third conductive pad 13 is disposed on a side of the first wires 14 near the second parallel edge 18b.


With reference to FIGS. 3 and 4, a plurality of first conductive pads 11 are disposed on each of the first bonding regions 100a, the first conductive pads 11 in each of the first bonding regions 100a can transmit the same signal, and can transmit different signals. The first conductive pads 11 comprises a first type first conductive pad 11a and a second type first conductive pad 11b. The first type first conductive pad 11a and the second type first conductive pad 11b transmit different signals. The first wires 14 are plural and the first wires 14 comprise a first wires 14a and a first wires 14b. The first wire 14a is connected to a column of first type first conductive pads 11a in first bonding region 100a. The first wires 14b are connected to a column of second type first conductive pads 11b in the first bonding regions 100a. The first wire 14a can be a GND transmission line, and the first wire 14b can be a transmission line for transmitting voltage required for working of the driver chip 18 and the light emitting unit 20. The first wire 14b can also be a GND transmission line, and the first wire 14a can be a transmission line for transmitting voltage required for working of the driver chip 18 and the light emitting unit 20.


With reference to FIGS. 4 and 6 to 8, in each of the first bonding regions 100a, the first type first conductive pad 11a and the second type first conductive pad 11b are disposed on different edges of an orthographic projection of the driver chips 18 on the substrate 10 respectively.


With reference to FIG. 4, a first type first conductive pad 11a is disposed along the first parallel edge 18a, a second type first conductive pad 11b is disposed along the second parallel edge 18b, and the first type first conductive pad 11a and the second type first conductive pad 11b are arranged abreast along a row direction. One first type first conductive pad 11a is connected to the first wire 14a, and one second type first conductive pad 11b is connected to the first wire 14b. The first wire 14a connected to one first type first conductive pad 11a is located on a side of the first parallel edge 18a away from the second parallel edge 18b. The first wire 14b connected to one second type first conductive pad 11b is located between the first parallel edge 18a and the second parallel edge 18b.


With reference to FIGS. 5 and 6, FIG. 5 is a first schematic plan view of the backlight module of a second embodiment of the present invention, FIG. 6 is a first schematic partially enlarged view of the backlight module shown in FIG. 5. The backlight module shown in FIG. 6 is substantially the same as the backlight module shown in FIG. 4, and a difference thereof is that the first wire 14a connected to the first type first conductive pad 11a and the first wire 14b connected to the second type first conductive pad 11b are located between the first parallel edge 18a and the second parallel edge 18b. The first wire 14a connected to the first type first conductive pad 11a is disposed near the first parallel edge 18a, the first wire 14b connected to the second type first conductive pad 11b is disposed near the second parallel edge 18b. The first wire 14a is parallel to the first wire 14b. The backlight module shown in FIG. 6 is different from the backlight module shown in FIG. 4 in difference of positions of the first wires 14a, which results in different sizes of the driver chips 18 of the backlight module.


With reference to FIG. 7, FIG. 7 is a second schematic partially enlarged view of the backlight module shown in FIG. 5. The backlight module shown in FIG. 7 is substantially the same as the backlight module shown in FIG. 6, and a difference thereof is that a first type first conductive pad 11a is disposed along the first perpendicular edge 18c, and a second type first conductive pad 11b is disposed along the second parallel edge 18b.


With reference to FIG. 8, FIG. 8 is a first schematic partially enlarged view of the backlight module of a third embodiment of the present invention. The backlight module shown in FIG. 8 is substantially the same as the backlight module shown in FIG. 4, and a difference thereof is that the backlight module shown in FIG. 8 further comprises a third type first conductive pad 11c and a fourth type first conductive pad 11d. The third type first conductive pad 11c is disposed along the first perpendicular edge 18c and is connected to the first wire 14c. The fourth type first conductive pad 11d is disposed along the second perpendicular edge 18d and is connected to the first wire 14d. The first wire 14a is disposed on a side of the first parallel edge 18a away from the first conductive pad 11a. The first wire 14b, the first wire 14c, and the first wire 14d are disposed between the first parallel edge 18a and the second parallel edge 18b, and the first wire 14d is disposed between the first wire 14b and the first wire 14c. The first wire 14b is disposed near the second parallel edge 18b. The first wire 14a, the first wire 14b, the first wire 14c and the first wires 14d are parallel to each other. It can be understood that the third type first conductive pad 11c can also be disposed on the first parallel edge 18a. the signal transmitted by the third type first conductive pad 11c and the signals transmitted by the first type first conductive pad 11a and the second type first conductive pad 11b are different.


As described above, the first conductive pad 11 can be disposed along at least one of the first parallel edge 18a, the second parallel edge 18b, the first perpendicular edge 18c, and the second perpendicular edge 18d, and can be disposed along different edges. When the third conductive pad 13 is disposed along the second parallel edge 18b, at most two of the first conductive pads 11 are disposed along the first parallel edge 18a, and at most one first conductive pad 11 is along the second parallel edge 18b. Furthermore, the first conductive pad 11 can be disposed along at least one of the first perpendicular edge 18c and the second perpendicular edge 18d. However, when the first conductive pad 11 are disposed along at least one of the first perpendicular edge 18c and the second perpendicular edge 18d. It should be noted to prevent an overlap between the first wire 14 connected to the first conductive pad 11 and the third wire 16 connected to the third conductive pad 13. For example, when the first conductive pad 11 and the third conductive pad 13 simultaneously disposed along at least one of the first perpendicular edge 18c and the second perpendicular edge 18d, the first conductive pad 11 is disposed on a side of the third conductive pad 13 away from an extension direction of the third wire 16 connected to the third conductive pad 13.


Furthermore, in each of the first bonding regions, at least one third conductive pad is disposed along at least one of the first perpendicular edge and the second perpendicular edge, and/or, the at least one first conductive pad is disposed along at least one of the first perpendicular edge and the second perpendicular edge.


In FIGS. 4, 6, 7, and 8, in each of the first bonding regions 100a, at least two second conductive pads 12 are disposed along the second parallel edge 18b, and the at least two second conductive pads 12 disposed along the second parallel edge 18b are located respectively on two opposite sides of the second type first conductive pad 11b to prevent the second wire 15 connected to two of the second conductive pads 12 respectively in two of the first bonding regions 100a from overlapping with the first wire 14b connected to the second type first conductive pad 11b. Specifically, a first type second conductive pad 12b and a second type second conductive pad 12a are disposed on each of the first bonding regions 100a. The first type second conductive pad 12b outputs a signal from the driver chip 18, the second type second conductive pad 12a inputs a signal into the driver chip 18. The first type second conductive pad 12b in one of the first bonding regions 100a is connected to the second type second conductive pad 12a in another of the first bonding regions 100a through the second wire 15 to achieve transmission of a cascade signal between two of the driver chips 18.


Furthermore, with reference to FIGS. 4 to 8, one of the driver chips 18 is electrically connected to one of the light emitting unit 20 or light emitting units 20 through the third wire 16. A number of the light emitting units 20 driven by one of the driver chips 18 depends on a number of the third conductive pads 13 and a number of third input pins 183 on the driver chip 18 in one of the first bonding regions 100a. The more the number of the third conductive pad 13 in one of the first bonding regions 100a, the more the number of the light emitting units 20 driven by a corresponding one of the driver chips 18.


With reference to FIGS. 9 to 12, in each of the first bonding regions 100a, the first type first conductive pad 11a and the second type first conductive pad 11b are disposed along the same edge of an orthographic projection of the driver chip 18 on the substrate.


With reference to FIG. 9, FIG. 9 is a second schematic partially enlarged view of the backlight module shown in FIG. 3. Each of the first bonding regions 100a, the first type first conductive pad 11a, and the second type first conductive pad 11b are disposed along the first parallel edge 18a. The first wire 14a connected to the first type conductive pad 11a and the first wire 14b connected to the second type first conductive pad 11b are located on two sides of the first parallel edge 18a respectively. Furthermore, With reference to FIG. 9, in each of the first bonding regions 100a, at least two second conductive pads 12 are disposed along the second parallel edge 18b, one second conductive pad 12 of the at least two second conductive pads 12 is connected to the light emitting unit 20 through the third wire 16, namely, one second conductive pad 12 is multiplexed as the third conductive pad 13. The first conductive pad 12 transmits signals to the light emitting unit 20 and to other driver chips 18 by time division multiplexing. The at least two second conductive pads 12 comprises a first type second conductive pads 12b and a second type second conductive pads 12a, the first type second conductive pads 12b and the second type second conductive pads 12a are disposed along the second parallel edge 18b. The first type second conductive pads 12b is the third conductive pad 13 outputting a signal to the light emitting units 20 by time division multiplexing. The first type second conductive pad 12b in one of the first bonding regions 100a is connected to the second type second conductive pad 12a in another of the first bonding regions 100a through the second wire 15. When the second type second conductive pads 12a outputs a signal to other driver chips 18, the first type second conductive pads 12b outputs a signal from the driver chip 18, the second type second conductive pads 12a inputs the signal into the driver chip 18.


With reference to FIG. 10, FIG. 10 is a schematic partially enlarged view the backlight module of a fourth embodiment of the present invention. The backlight module shown in FIG. 10 is substantially the same as the backlight module shown in FIG. 19, and a difference thereof is that in each of the first bonding regions 100a, at least two second conductive pads 12 are disposed along the second parallel edge 18b. Specifically, the at least two second conductive pads 12 comprises a first type second conductive pads 12b, a second type second conductive pads 12a, a third type second conductive pads 12c, and a fourth type second conductive pads 12d. In the first bonding region 100a, the first type second conductive pad 12b and the second type second conductive pad 12a are located two sides of the third type second conductive pad 12c and the fourth type second conductive pads 12d, the third type second conductive pad 12c is disposed near the first type second conductive pad 12b, and the fourth type second conductive pad 12d is disposed near the second type second conductive pads 12. The first type second conductive pad 12b in one of the first bonding regions 100a is connected to the second type second conductive pad 12a in another of the first bonding regions 100a through the second wire 15a. The fourth type second conductive pad 12d in one of the first bonding regions 100a is connected to the third type second conductive pad 12c in another of the first bonding regions 100a through the second wire 15b. The second wire 15a is parallel to the second wire 15b. The third type second conductive pad 12c and the first type second conductive pad 12b output signals from the driver chip 18, signals transmitted by the third type second conductive pad 12c and the first type second conductive pad 12b are different. The second type second conductive pad 12a and the fourth type second conductive pad 12d receive signals externally and transmit the signals to the driver chip 18. The signals transmitted by the second type second conductive pad 12a and the fourth type second conductive pad 12d are different.


With reference to FIG. 11, FIG. 11 is a schematic partially enlarged view of the backlight module of a fifth embodiment of the present invention. The backlight module shown in FIG. 11 is substantially similar to the backlight module shown in FIG. 9, and a difference thereof is that in each of the first bonding regions 100a, at least two second conductive pads 12 are disposed along the first parallel edge 18a, the first type first conductive pad 11a and the second type first conductive pad 11b are disposed between adjacent two second conductive pads 12. Specifically, the first type first conductive pad 11a and the second type first conductive pad 11b are disposed between the two second conductive pads 12, the two second conductive pads 12 are the same as the two second conductive pads 12 (the first type second conductive pads and the second type second conductive pads) previously described, and would not be described herein. Furthermore, a plurality of third conductive pads 13 are disposed on the second parallel edge 18b, the third conductive pads 13 comprises a third conductive pad 13a, a third conductive pad 13b, a third conductive pad 13c, and a third conductive pad 13d.


With reference to FIG. 12, FIG. 12 is a schematic partially enlarged view of the backlight module of a sixth embodiment of the present invention. The backlight module shown in FIG. 12 is substantially the same as the backlight module shown in FIG. 11, and a difference thereof is that the backlight module shown in FIG. 12 further comprises a third type first conductive pad 11c, the third type first conductive pad 11c is disposed on the second perpendicular edge 18d and is connected to the first wires, the first wires connected to the third type first conductive pad 13c are parallel to the first wires 14a.


With reference to FIG. 13, FIG. 13 is a schematic partially enlarged view of the backlight module of a seventh embodiment of the present invention. The backlight module shown in FIG. 13 is substantially the same as the backlight module shown in FIG. 11, and a difference thereof is that the third conductive pad 13a is disposed along the first perpendicular edge 18a, and the third conductive pad 13d is disposed along the second perpendicular edge 18d.


With reference to FIG. 14, FIG. 14 is a schematic partially enlarged view of the backlight module of an eighth embodiment of the present invention. The backlight module shown in FIG. 14 is substantially the same as the backlight module shown in FIG. 9, and a difference thereof is that the second conductive pads are not multiplexed as third conductive pads 13. In each of the first bonding regions 100a, the two second conductive pads 12 connected to the second wire 15 are disposed along the first perpendicular edge 18a and the second perpendicular edge 18b respectively, and one third conductive pad 13 is disposed along the second parallel edge 18b.


With reference to FIGS. 15 to 18, at least one third conductive pad 13 is disposed along the first parallel edge 18a. One first conductive pad 11 is disposed on each of the first bonding regions 100a, and the first conductive pad 11 is disposed along the first parallel edge 18a to prevent an overlap between the first wires 14 connected to the first conductive pad 11 and the third wire 16 connected to the third conductive pad 13. Furthermore, at least one third conductive pad 13 can also be disposed on the second parallel edge 18b, the first perpendicular edge 18c, and the second perpendicular edge 18d. The third conductive pad 13, when disposed along the first parallel edge 18a, can be staggered with the third conductive pad 13 of the second parallel edge 18b such that the third wire 16 connected to the third conductive pad 13 disposed along the first parallel edge 18a can extend through a gap between two adjacent two of the third conductive pads 13 disposed along the second parallel edge 18b. Furthermore, when the third conductive pad 13 is disposed along the first perpendicular edge 18c and the second perpendicular edge 18d, the third wire 16 connected to the third conductive pad 13 extend toward a side (upward or downward) and then extends along a side of the second parallel edge 18b away from the first parallel edge 18a.


The present invention further provides a display panel, wherein the display panel comprises: a substrate, the substrate comprises at least two first bonding regions; at least one first conductive pad disposed in each of the first bonding regions on the substrate; at least two second conductive pads disposed in each of the first bonding regions on the substrate; first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions;

    • a second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; and driver chips connected to the first conductive pad and the second conductive pads in each of the first bonding regions; wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires. The technical solution of the above backlight module is also applied to the display panel, which would not be described in detail herein.


The present invention further provides an array substrate, wherein the array substrate comprises: a substrate, the substrate comprises at least two first bonding regions; at least one first conductive pad disposed in each of the first bonding regions on the substrate; at least two second conductive pads disposed in each of the first bonding regions on the substrate; first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions; and a second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.


The description of the above embodiments is only for assisting understanding of the technical solutions of the present application and the core ideas thereof. Those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments are or equivalently replace some of the technical features. These modifications or replacements do not depart from the essence of the technical solutions of the embodiments of the present application.

Claims
  • 1. A backlight module, wherein the backlight module comprises: a substrate comprising at least two first bonding regions;at least one first conductive pad in each of the first bonding regions of the substrate;at least two second conductive pads disposed in each of the first bonding regions of the substrate;first wires disposed on the substrate and each of which is connected to at least two of the first conductive pad in the first bonding regions;a second wire disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; anddriver chips connected to the first conductive pad and the second conductive pads in each of the first bonding regions;wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.
  • 2. The backlight module as claimed in claim 1, wherein the driver chips are disposed in each of the first bonding regions respectively, an orthographic projection of each of the driver chips on the substrate comprises a first parallel edge and a second parallel edge that are parallel to an extension direction of each of the first wires, and the first parallel edge are opposite to the second parallel edge; the at least one first conductive pad in each of the first bonding regions is connected to at least one of the first wires respectively;wherein at most two of the first conductive pads are disposed along the first parallel edge, and/or, at most two of the first conductive pads are disposed along the second parallel edge.
  • 3. The backlight module as claimed in claim 2, wherein the substrate further comprises second bonding regions, the backlight module further comprises: at least one third conductive pad disposed in each of the first bonding regions of the substrate, the at least one third conductive pad is connected to the driver chips;light emitting units disposed in each of the second bonding regions of the substrate; anda third wire, an end of the third wire is connected to the third conductive pad, another end of the third wire is connected to an end of the light emitting units, and the third wire extends from a position on which the third conductive pad is located to a side of the second parallel edge away from the first parallel edge;wherein each of the first wires is located on a side of the second parallel edge near the first parallel edge, and in each of the first bonding regions, the at least one third conductive pad is disposed on a side of each of the first wires near the second parallel edge.
  • 4. The backlight module as claimed in claim 3, wherein in each of the first bonding regions, at least one of the second conductive pads connected to the second wire and at most one of the first conductive pad are disposed along the second parallel edge; and/or, in each of the first bonding regions, at least one of the second conductive pads connected to the second wire and at most two of the first conductive pads are disposed along the first parallel edge;wherein at most two of the first conductive pads disposed along the first parallel edge are located on a side of at least one of the second conductive pads disposed along the first parallel edge or the second parallel edge away from the second wire connected to the second conductive pads, at most one of the first conductive pad disposed along the second parallel edge is located on a side of at least one of the second conductive pads disposed along the first parallel edge or the second parallel edge away from the second wire connected to the second conductive pads.
  • 5. The backlight module as claimed in claim 3, wherein the first conductive pads comprise a first type first conductive pad and a second type first conductive pad; in each of the first bonding regions, the first type first conductive pad and the second type first conductive pad are disposed along the same edge of an orthographic projection of each of the driver chips on the substrate; orin each of the first bonding regions, the first type first conductive pad and the second type first conductive pad are disposed along different edges of the orthographic projection of each of the driver chips on the substrate respectively.
  • 6. The backlight module as claimed in claim 5, wherein under a condition that the first type first conductive pad and the second type first conductive pad are disposed along the same edge of an orthographic projection of each of the driver chips on the substrate, the first type first conductive pad and the second type first conductive pad are disposed along the first parallel edge, and one of the first wires connected to the first type conductive pad and one of the first wires connected to the second type first conductive pad are located on two sides of the first parallel edge respectively.
  • 7. The backlight module as claimed in claim 6, wherein in each of the first bonding regions, the at least two second conductive pads are disposed along the first parallel edge, the first type first conductive pad and the second type first conductive pad are disposed between adjacent two of the second conductive pads.
  • 8. The backlight module as claimed in claim 6, wherein in each of the first bonding regions, the at least two second conductive pads are disposed along the second parallel edge.
  • 9. The backlight module as claimed in claim 8, wherein one of the at least two second conductive pads is connected to the light emitting units through the third wire.
  • 10. The backlight module as claimed in claim 6, wherein the orthographic projection of each of the driver chips on the substrate further comprises a first perpendicular edge and a second perpendicular edge that opposite to each other, the first perpendicular edge is perpendicular to the first parallel edge, and the second perpendicular edge is perpendicular to the first parallel edge; and in each of the first bonding regions, two of the second conductive pads connected to the second wire are disposed along the first perpendicular edge and the second perpendicular edge respectively.
  • 11. The backlight module as claimed in claim 6, wherein in each of the first bonding regions, the at least one third conductive pad is disposed along the second parallel edge.
  • 12. The backlight module as claimed in claim 5, wherein under a condition that the first type first conductive pad and the second type first conductive pad are disposed along different edges of the orthographic projection of each of the driver chips on the substrate respectively, the first type first conductive pad is disposed along the first parallel edge, and the second type first conductive pad is disposed along the second parallel edge.
  • 13. The backlight module as claimed in claim 12, wherein the first wire connected to the first type first conductive pad is located on a side of the first parallel edge away from the second parallel edge, the first wire connected to the second type first conductive pad is located between the first parallel edge and the second parallel edge.
  • 14. The backlight module as claimed in claim 12, wherein the first wire connected to the first type first conductive pad and the first wire connected to the second type first conductive pad are located between the first parallel edge and the second parallel edge, the first wire connected to the first type first conductive pad is located near the first parallel edge, and the first wire connected to the second type first conductive pad is located near the second parallel edge.
  • 15. The backlight module as claimed in claim 12, wherein the first conductive pad in the first bonding regions further comprise a third type first conductive pad, and the third type first conductive pad is disposed along the first parallel edge; in each of the first bonding regions, the at least two second conductive pads are disposed along the second parallel edge, the at least two second conductive pads disposed along the second parallel edge are located on two opposite sides of the second type first conductive pad respectively.
  • 16. The backlight module as claimed in claim 3, wherein the at least one third conductive pad is disposed along the first parallel edge, the first conductive pad disposed in each of the first bonding regions is one, and the first conductive pad is disposed along the first parallel edge.
  • 17. The backlight module as claimed in claim 3, wherein the orthographic projection of each of the driver chips on the substrate further comprises a first perpendicular edge and a second perpendicular edge that opposite to each other, the first perpendicular edge is perpendicular to the first parallel edge, and the second perpendicular edge is perpendicular to the first parallel edge; and in each of the first bonding regions, the at least one third conductive pad is disposed along at least one of the first perpendicular edge and the second perpendicular edge, and/or, the at least one first conductive pad is disposed along at least one of the first perpendicular edge and the second perpendicular edge.
  • 18. The backlight module as claimed in claim 3, wherein each of the driver chips comprises a first pin connected to one of the first conductive pads, a second pin connected correspondingly to one of the second conductive pads, and a third pin connected to one of the third conductive pads; another end of each of the light emitting units is connected to a fourth wire;the first conductive pad, the first wires, the second conductive pads, the second wire, the third conductive pad, and the third wire are in the same metal layer.
  • 19. A display panel, wherein the display panel comprises: a substrate, the substrate comprises at least two first bonding regions;at least one first conductive pad disposed in each of the first bonding regions on the substrate;at least two second conductive pads disposed in each of the first bonding regions on the substrate;first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions;a second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively; anddriver chips connected to the first conductive pad and the second conductive pads in each of the first bonding regions;wherein two of the second conductive pads connected to the second wire are located on the same side of each of the first wires.
  • 20. An array substrate, wherein the array substrate comprises: a substrate, the substrate comprises at least two first bonding regions;at least one first conductive pad disposed in each of the first bonding regions on the substrate;at least two second conductive pads disposed in each of the first bonding regions on the substrate;first wires disposed on the substrate and each of which is connected to at least two of the first conductive pads in the first bonding regions; anda second wire disposed on the substrate disposed on the substrate and connected to two of the second conductive pads located in two of the first bonding regions respectively;
Priority Claims (1)
Number Date Country Kind
202110185649.5 Feb 2021 CN national
PCT Information
Filing Document Filing Date Country Kind
PCT/CN2021/083842 3/30/2021 WO