Patent Application
20250098307
The present disclosure relates to display technologies, and more particularly, to an array substrate, a display panel, and a display device.
A Liquid Crystal Display (LCD) generally includes a backlight module and a liquid crystal dimming box. The liquid crystal dimming box includes a thin film transistor (TFT) backplane and a color filter substrate. For a picture displayed by the liquid crystal dimming box, the brightness and the display effect of the picture depend to a large extent on the transmittance of backlight, which is emitted by the backlight module, by the liquid crystal dimming box.
Therefore, how to improve the transmittance of the backlight by the liquid crystal dimming box is a technical problem to be solved.
An object of the present disclosure includes providing an array substrate, a display panel, and a display device, so as to improve transmittance of the array substrate to light and stability of a thin film transistor on the array substrate, thereby improving the display effect of the display panel and the display device.
According to one or more embodiments of the present disclosure, an array substrate includes:
In one or more embodiments, the ratio of the refractive index of the first buffer layer to the refractive index of the base is greater than or equal to 1.02 and less than or equal to 1.15.
In one or more embodiments, a material of the first buffer layer and a material of the second buffer layer are same.
In one or more embodiments, the refractive index of the second buffer layer is less than the refractive index of the base.
In one or more embodiments, both the material of the first buffer layer and the material of the second buffer layer comprise silicon oxide, and the base comprises a glass base.
In one or more embodiments, the refractive index of the base is greater than or equal to 1.45 and less than or equal to 1.55, the refractive index of the first buffer layer is greater than or equal to 1.5 and less than or equal to 1.7, and the refractive index of the second buffer layer is greater than or equal to 1.4 and less than or equal to 1.55.
In one or more embodiments, a thickness of the first buffer layer is greater than a thickness of the second buffer layer.
In one or more embodiments, the buffer layer further includes:
In one or more embodiments, the material of the third buffer layer comprises silicon oxide.
In one or more embodiments, a thickness of the first buffer layer is greater than a thickness of the third buffer layer.
In one or more embodiments, a thickness of the first buffer layer is greater than or equal to 1500 angstroms and less than or equal to 2500 angstroms, and a thickness of the third buffer layer is greater than or equal to 300 angstroms and less than or equal to 600 angstroms.
According to one or more embodiments of the present disclosure, a display panel, including:
According to one or more embodiments of the present disclosure, a display device, including:
The buffer layer is disposed on the base and includes the first buffer layer and the second buffer layer. The first buffer layer is disposed between the second buffer layer and the substrate. The refractive index of the first buffer layer is greater than the refractive index of the base and the refractive index of the second buffer layer. The ratio of the refractive index of the first buffer layer to the refractive index of the substrate is less than or equal to 1.25. By such a configuration, the ratio of the refractive index of the first buffer layer to the refractive index of the base is small, the refractive index of the first buffer layer is similar to the refractive index of the base, and the refractive index of the first buffer layer is greater than the refractive index of the second buffer layer. A transmittance of the backlight sequentially passing through the base, the first buffer layer, and the second buffer layer is high, thereby improving the transmittance of the array substrate to light. Meanwhile, the refractive index of the first buffer layer is greater than that of the base, and the first buffer layer is denser. The first buffer layer has a good barrier performance to ions in the substrate, thereby improving a problem of threshold voltage drift due to diffusion of ions to the thin film transistor. Therefore, the array substrate according to the present disclosure can balance the transmittance of the backlight and the stability of the thin film transistor, thereby improving the transmittance of the display panel to the backlight, improving the operation stability of the display panel, and improving the display effect of the display device.
The technical solution in the embodiments of the present disclosure will be clearly and completely described with reference to the accompanying drawings. It will be apparent that the described embodiments are only part of the embodiments of the present disclosure, and not all embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without involving any inventive effort are within the scope of the present disclosure.
Referring to
As shown in
As shown in
The base 111 and the opposing base 121 are both light-transmitting to improve the transmittance of the base 111 and the opposing base 121 to the backlight. In one or more embodiments, both the base 111 and the opposing base 121 include a transparent glass base, which is not limited herein. It will be appreciated that both base 111 and opposing base 121 may also include a transparent organic base. The refractive indices of the base 111 and the opposing base 121 are both greater than or equal to 1.45 and less than or equal to 1.55. For example, the refractive indices of the base 111 and the opposing base 121 are 1.45, 1.48, 1.50, 1.51, 1.52, or 1.55.
The thin film transistor T includes a gate 114, an active layer 113, a source 1151, and a drain 1152.
In one or more embodiments, the thin film transistor T includes a top-gate thin film transistor. In a case that the thin film transistor T is a top-gate thin film transistor, the active layer 113 is provided on a surface of the buffer layer 112 away from the base 111. The gate 114 is disposed on a side of the active layer 113 away from the base 111. The source 1151 and the drain 1152 are disposed on a side of the active layer 113 away from the base 111 and are in contact with the active layer 113. A gate insulating layer 116 is provided between the active layer 113 and the gate 114. The gate insulating layer 116 includes a silicon oxide layer. A refractive index of the gate insulating layer 116 is greater than or equal to 1.4 and less than or equal to 1.55. An interlayer insulating layer 117 is provided between the gate 114 and each of the source 1151 and the drain 1152. The interlayer insulating layer 117 includes at least one of a silicon oxide layer or a silicon nitride layer.
In one or more embodiments, the active layer 113 includes at least one of polysilicon, amorphous silicon, monocrystalline silicon, or a metal oxide. In one or more embodiments, the active layer 113 comprises polysilicon.
In one or more embodiments, the thin film transistor T may also include a bottom-gate thin film transistor. In this case, the gate 114 is disposed on the buffer layer 112. The active layer 113 is disposed on a side of the gate 114 away from the base 111. The gate insulating layer 116 is disposed between the active layer 113 and the gate 114. The source 1151 and the drain 1152 are disposed on a side of the active layer 113 away from the base 111 and are in contact with the active layer 113. The interlayer insulating layer 117 may also be disposed between the active layer 113 and each of the source 1151 and the drain 1152.
The buffer layer 112 is disposed on and in direct contact with the base 111. The buffer layer 112 serves to block ions in the base 111, such as Na+, K+, from diffusing into the active layer 113 of the thin film transistor T, so as to improve a problem of threshold voltage drift of the thin film transistor T due to ion diffusion into the thin film transistor T. Since the backlight is incident on the display panel 10, it needs to pass through the array substrate 11, the liquid crystal layer 13, and the opposing substrate 12 before being emitted from the display panel 10. Therefore, the backlight needs to pass through the buffer layer 112, which also affects the transmittance of the display panel 10 to the backlight.
It should be noted that, generally, it has been found through experimental analysis that, larger a refractive index of a film layer, lower an etching rate of the film layer, and higher density of the film layer. Higher the density of the film layer, better barrier performance of the film layer to ions. Moreover, more refractive indices of two adjacent film layers tend to be same, higher transmittances of the two film layers to light. According to one or more embodiments of the present disclosure, the barrier performance of the buffer layer 112 to ions is ensured while the transmittance of the buffer layer 112 to the backlight is improved, thereby improving stability of performance of the thin film transistor T.
The first buffer layer 1121 acts as a barrier against the diffusion of ions in the base 111 into the active layer 113 of the thin film transistor T. The first buffer layer 1121 is denser than the second buffer layer 1122. Accordingly, the etching rate of the first buffer layer 1121 is lower than the etching rate of the second buffer layer 1122.
The second buffer layer 1122 acts as thermal insulation to ensure better crystallization of the active layer 113. Thus, the performance of the thin film transistor T is more stable.
A refractive index of the first buffer layer 1121 is greater than a refractive index of the base 111 and a refractive index of the second buffer layer 1122. A ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is less than or equal to 1.25. By such a configuration, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is small, the refractive index of the first buffer layer 1121 is similar to the refractive index of the base 111, and the refractive index of the first buffer layer 1121 is greater than the refractive index of the second buffer layer 1122. A transmittance of the base 111 to the backlight, a transmittance of the first buffer layer 1121 to the backlight, and a transmittance of the second buffer layer 1122 to the backlight are all great, thereby improving the transmittance of the array substrate 11 to the backlight. Moreover, the refractive index of the first buffer layer 1121 is greater than the refractive index of the base 111, and the first buffer layer 1121 is denser than the base 111. The first buffer layer 1121 has a good barrier performance to ions in the base 111, thereby improving a problem of stability of the thin film transistor T due to diffusion of ions to the thin film transistor T.
Therefore, by the above-described buffer layer 112, the array substrate 11 according to the present disclosure can balance the transmittance to the backlight and the stability of the thin film transistor, thereby improving the transmittance of the display panel 10 to the backlight, improving operation stability of the display panel 10, and improving the display effect of the display device 100.
In one or more embodiments, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is greater than or equal to 1.02 and less than or equal to 1.15. By such a configuration, the first buffer layer 1121 has a greater refractive index, and the first buffer layer 1121 has a higher density. The first buffer layer 1121 has a better barrier performance to ions in the base 111, further improving a problem of the stability of the thin film transistor T due to diffusion of ions of the thin film transistor T. Moreover, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is small, the transmittance of the base 111 to the backlight and the transmittance of the first buffer layer 1121 to the backlight are higher, and the transmittance of the array substrate 11 to the backlight is further improved.
Alternatively, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is greater than or equal to 1.03 and less than or equal to 1.18. Alternatively, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is greater than or equal to 1.05 and less than or equal to 1.15. Alternatively, the ratio of the refractive index of the first buffer layer 1121 to the refractive index of the base 111 is greater than or equal to 1.08 and less than or equal to 1.12.
In one or more embodiments, the first buffer layer 1121 and the second buffer layer 1122 are made of a same material. By such a configuration, in a case that the refractive index of the first buffer layer 1121 is greater than the refractive index of the second buffer layer 1122, a difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is reduced, and the refractive index of the first buffer layer 1121 is similar to the refractive index of the second buffer layer 1122, thereby improving the transmittance of the buffer layer 112 to the backlight and further improving the transmittance of the array substrate 11 to the backlight. In a case that the first buffer layer 1121 and the second buffer layer 1122 are made of a same material, formation conditions of the first buffer layer 1121 and the second buffer layer 1122 are controlled, so that the first buffer layer 1121 and the second buffer layer 1122 can be continuously formed, thereby simplifying a process for manufacturing the array substrate 11.
In one or more embodiments, in a case that the first buffer layer 1121 and the second buffer layer 1122 are made of a same material, the refractive index of the first buffer layer 1121 is greater than the refractive index of the second buffer layer 1122. By such a configuration, the first buffer layer 1121 is denser than the second buffer layer 1122, and the first buffer layer 1121 has a better barrier performance to ions in the base 111. The second buffer layer 1122 is relatively sparse and is less difficult to manufacture.
In one or more embodiments, in a case that the first buffer layer 1121 is denser than the second buffer layer 1122, the first buffer layer 1121 may be formed by at least one of chemical vapor deposition or atomic deposition to produce a dense first buffer layer 1121. The second buffer layer 1122 may be formed by chemical vapor deposition. In one or more embodiments, both the first buffer layer 1121 and the second buffer layer 1122 are formed by chemical vapor deposition to facilitate continuous preparation of the first buffer layer 1121 and the second buffer layer 1122, thereby simplifying the manufacturing process of the array substrate 11.
In one or more embodiments, a difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is greater than 0 and less than or equal to 0.35. Thus, the difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is small, so that the transmittance of the buffer layer 112 to the backlight is further improved, and the transmittance of the array substrate 11 to the backlight is further improved. Alternatively, the difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is greater than 0.05 and less than or equal to 0.3. Alternatively, the difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is greater than 0.08 and less than or equal to 0.2. Alternatively, the difference between the refractive index of the first buffer layer 1121 and the refractive index of the second buffer layer 1122 is greater than 0.09 and less than or equal to 0.15.
In one or more embodiments, the refractive index of the second buffer layer 1122 is less than the refractive index of the base 111. Thus, the second buffer layer 1122 can be prepared by a conventional process, thereby reducing manufacturing difficulty of the second buffer layer 1122.
In one or more embodiments, the first buffer layer 1121 has a refractive index greater than or equal to 1.5 and less than or equal to 1.7. Alternatively, the first buffer layer 1121 has a refractive index greater than or equal to 1.52 and less than or equal to 1.65. Alternatively, the first buffer layer 1121 has a refractive index greater than or equal to 1.55 or more and less than or equal to 1.6 or.
In one or more embodiments, the second buffer layer 1122 has a refractive index greater than or equal to 1.4 and less than or equal to 1.55. Alternatively, the second buffer layer 1122 has a refractive index greater than or equal to 1.42 and less than or equal to 1.52. Alternatively, the second buffer layer 1122 has a refractive index greater than or equal to 1.45 and less than or equal to 1.5.
In one or more embodiments, both a material of the first buffer layer 1121 and a material of the second buffer layer 1122 include silicon oxide, that is, both the first buffer layer 1121 and the second buffer layer 1122 include a silicon oxide layer, which is not limited herein. Thus, the buffer layer 112 employs a double-layer silicon oxide structure. Refractive indices of the first buffer layer 1121 and the second buffer layer 1122 tend to be same as the refractive index of the base 111, thereby facilitating improvement of the transmittance of the array substrate 11 to the backlight. Also, the material of the second buffer layer 1122 includes silicon oxide. The second buffer layer 1122 has a good thermal insulating performance to facilitate crystallization of the active layer 113 under the thermal insulating effect of the second buffer layer 1122. It will be appreciated that the materials of the first buffer layer 1121 and the second buffer layer 1122 may also be other materials other than silicon oxide, as long as the above requirements for refractive index and thermal insulation are satisfied.
It should be noted that in the related art, in a case that the buffer layer includes a silicon nitride layer, transmittance of the silicon nitride layer to light is approximately 98.5%. In one or more embodiments of the present disclosure, in a case that the buffer layer 112 includes the first buffer layer 1121, the light transmittance of the first buffer layer 1121 to light is about 99.99%. Therefore, the first buffer layer 1121, which has a great refractive index and high density, can not only significantly improve the transmittance of the buffer layer 112 to light, but also have a good barrier performance to ions. Both the first buffer layer 1121 and the second buffer layer 1122 include a silicon oxide layer, and the refractive index of the first buffer layer 1121 is greater than the refractive index of the second buffer layer 1122. By such a configuration, the transmittance of the buffer layer 112 to the backlight can be significantly improved, a good barrier performance to ions in the base 111 is ensured, and it is ensured that the active layer 113 can be better crystallized.
In one or more embodiments, a thickness of the first buffer layer 1121 is greater than a thickness of the second buffer layer 1122. Thus, the thickness of the first buffer layer 1121 is greater, and the first buffer layer 1121 has a better barrier performance to ions in the base 111, thereby further improving a problem of stability of the thin film transistor T due to diffusion of ions in the base 111 to the thin film transistor T.
In one or more embodiments, the thickness of the first buffer layer 1121 is greater than or equal to 1500 angstroms and less than or equal to 2500 angstroms. Alternatively, the first buffer layer 1121 has a thickness greater than or equal to 1600 angstroms and less than or equal to 2200 angstroms. Alternatively, the thickness of the first buffer layer 1121 is greater than or equal to 1800 angstroms and less than or equal to 2100 angstroms. In a case that the first buffer layer 1121 is too thin, it is not conducive to improving the barrier performance of the buffer layer 112. In a case that the first buffer layer 1121 is too thick, the manufacturing difficulty of the first buffer layer 1121 is increased.
In one or more embodiments, the thickness of the second buffer layer 1122 is greater than or equal to 300 angstroms and less than or equal to 1200 angstroms. Alternatively, the thickness of the second buffer layer 1122 is greater than or equal to 400 angstroms and less than or equal to 1000 angstroms. Alternatively, the thickness of the second buffer layer 1122 is greater than or equal to 450 angstroms and less than or equal to 800 angstroms. In a case that the second buffer layer 1122 is too thin, it is no conductive to ensuring the thermal insulation performance of the second buffer layer 1122. In a case that the second buffer layer 1122 is too thick, a time length for manufacturing the second buffer layer 1122 is increased.
The array substrate 11 further includes a pixel electrode 118 connected to the drain 1152 of the thin film transistor T. The pixel electrode 118 is provided at a side of the source 1151 and the drain 1152 away from the base 111, and a passivation layer 119 is provided between the pixel electrode 118 and each of the source 1151 and the drain 1152. A material of the pixel electrode 118 includes a transparent conductive material. A material of the passivation layer 119 includes at least one of silicon oxide, silicon nitride, or silicon oxynitride.
The opposing substrate 12 also includes a filter layer 122 and a common electrode layer 123. In one or more embodiments, the filter layer 122 is disposed on a surface of the opposing base 121 close to the base 111, and the filter layer 122 is disposed between the common electrode layer 123 and the opposing base 121. The filter layer 122 includes a color filter layer and a black matrix layer. The color filter layer includes multiple color resistance units of different colors. The black matrix layer includes multiple openings, and multiple color resistance units are disposed in the multiple openings, respectively. In one or more embodiments, both the filter layer 122 and the common electrode layer 123 may be disposed on the array substrate 11.
In one or more embodiments of the present disclosure, based on that the buffer layer 112 includes the first buffer layer 1121 and the second buffer layer 1122, the third buffer layer 1123 is added between the first buffer layer 1121 and the base 111, the third buffer layer 1123 and the first buffer layer 1121 are made of a same material, and the refractive index of the third buffer layer 1123 is less than the refractive index of the first buffer layer 1121. By such a configuration, the third buffer layer 1123 having a relatively small refractive index may be formed first, and then the first buffer layer 1121 having a relatively large refractive index may be formed. A load of the film forming device is adjusted to a film forming condition corresponding to the third buffer layer 1123, and then is adjusted to a film forming condition of the first buffer layer 1121, so that the load of the film forming device can be more easily controlled, thereby improving stability of the device for manufacturing the first buffer layer 1121. Therefore, the performance of the first buffer layer 1121 having a greater refractive index manufactured by the device is more controllable, the first buffer layer 1121 has a better barrier performance, and a problem of the stability of the first buffer layer 1121 due to ion diffusion to the thin film transistor T is further improved.
It should be noted that the first buffer layer 1121 is a film layer having a relatively high density and is difficult to manufacture. When the first buffer layer 1121 is formed, if the load of the device for manufacturing the first buffer layer 1121 is directly adjusted to the film forming condition corresponding to the first buffer layer 1121, the load of the apparatus is difficult to manage. A third buffer layer 1123 is provided between the first buffer layer 1121 and the base 111, the third buffer layer 1123 and the first buffer layer 1121 are made of a same material, and the refractive index of the third buffer layer 1123 is less than the refractive index of the first buffer layer 1121. By such a configuration, the load of the device for manufacturing the first buffer layer 1121 can be gradually increased, the film forming load of the device can be effectively improved, stability of a production line device can be effectively improved, and the performance of the thin film transistor T can be improved.
In one or more embodiments, the thickness of the first buffer layer 1121 is greater than the thickness of the third buffer layer 1123. By such a configuration, the thickness of the first buffer layer 1121 is greater, and the first buffer layer 1121 has a better barrier performance to ions in the base 111, further improving a problem of the stability of the thin film transistor T due to diffusion of ions in the base 111 to the thin film transistor T. Further, the thickness of the third buffer layer 1123 is small, and the manufacturing time of the third buffer layer 1123 is shortened.
In one or more embodiments, the thickness of the third buffer layer 1123 is greater than or equal to 300 angstroms and less than or equal to 600 angstroms. Alternatively, the thickness of the third buffer layer 1123 is greater than or equal to 400 angstroms and less than or equal to 550 angstroms. Alternatively, the thickness of the third buffer layer 1123 is greater than or equal to 450 angstroms and less than or equal to 520 angstroms. In a case that the third buffer layer 1123 is too thin, it is not constructive to a gradual increase of the load of the device. In a case that the second buffer layer 1122 is too thick, the time for manufacturing the third buffer layer 1123 is too long, and the display panel 100 is too thick.
In one or more embodiments, the material of the third buffer layer 1123 includes silicon oxide, i.e., the third buffer layer 1123 also includes a silicon oxide layer. The third buffer layer 1123 has a refractive index greater than or equal to 1.4 and less than or equal to 1.55. Alternatively, the third buffer layer 1123 has a refractive index greater than or equal to 1.42 and less than or equal to 1.52. Alternatively, the third buffer layer 1123 has a refractive index greater than or equal to 1.45 and less than or equal to 1.5.
In one or more embodiments, the refractive index of the third buffer layer 1123 may be same as the refractive index of the second buffer layer 1122. In one or more embodiments, the thickness of the third buffer layer 1123 may be same as the thickness of the second buffer layer 1122.
In one or more embodiments, the refractive index of the third buffer layer 1123 is same as the refractive index of the second buffer layer 1122. Thus, the third buffer layer 1123 and the second buffer layer 1122 may be formed under a same condition, thereby simplifying the manufacturing process of the array substrate 11. In one or more embodiments, the refractive index of the third buffer layer 1123 may also be different from the refractive index of the second buffer layer 1122. For example, the refractive index of the third buffer layer 1123 may also be greater than the refractive index of the second buffer layer 1122, so that the density of the third buffer layer 1123 is higher than the density of the second buffer layer 1122, further improving the barrier performance of the buffer layer 112.
In one or more embodiments, the first buffer layer 1121, the second buffer layer 1122, and the third buffer layer 1123 all include a silicon oxide layer. The refractive index of the first buffer layer 1121 is greater than the refractive index of the second buffer layer 1122 and the refractive index of the third buffer layer 1123, and correspondingly, the density of the first buffer layer 1121 is greater than the density of the second buffer layer 1122 and the density of the third buffer layer 1123. Therefore, the buffer layer 112 includes three silicon oxide layers, the refractive index of the third buffer layer 1123 is similar to the refractive index of the base 111, the first buffer layer 1121 has a great density and a great refractive index, and the second buffer layer 1122 has a small refractive index.
In one or more embodiments, the buffer layer 112 further includes a fourth buffer layer provided between the third buffer layer 1123 and the base 111, the fourth buffer layer and the third buffer layer 1123 are made of a same material, and the refractive index of the fourth buffer layer is less than the refractive index of the third buffer layer 1123. By such a configuration, the load of the device for manufacturing the first buffer layer 1121 is gradually increased, so that the film forming load of the device can be effectively improved, the stability of the production line device can be effectively improved, and the performance of the thin film transistor T can be improved. In one or more embodiments, the fourth buffer layer includes a silicon oxide layer.
It will be appreciated that, based on the refractive index of the first buffer layer 1121, the third buffer layer 1123 and the fourth buffer layer may be provided, or two or more silicon oxide layers may be provided. In a direction of the base 111 pointing towards the first buffer layer 1121, the refractive index of each of silicon oxide layers between the first buffer layer 1121 and the base 111 increases.
Following Table 1,
In embodiment 1, the buffer layer employs above-described double-layer silicon oxide structure. The buffer layer includes a first buffer layer 1121 and a second buffer layer 1122, and the first buffer layer 1121 is disposed between the base 111 and the second buffer layer 1122. The first buffer layer 1121 is a dense silicon oxide layer, and the refractive index of the first buffer layer 1121 is 1.57. The second buffer layer 1122 is a sparse silicon oxide layer, and the refractive index of the second buffer layer 1122 is 1.45. The refractive index of the base was 1.51.
In Embodiment 2, the buffer layer employs a three-layer silicon oxide structure. The buffer layer includes the first buffer layer 1121, the second buffer layer 1122, and the third buffer layer 1123. The first buffer layer 1121 is disposed between the second buffer layer 1122 and the third buffer layer 1123. The third buffer layer 1123 is disposed between the base 111 and the first buffer layer 1121. The second buffer layer 1122 is disposed on a side of the first buffer layer 1121 away from the base 111. The first buffer layer 1121 is a dense silicon oxide layer, and the refractive index of the first buffer layer 1121 is 1.57. The second buffer layer 1122 is also a silicon oxide layer, and the refractive index of the second buffer layer 1122 is 1.45. The refractive index of the base is 1.51. The third buffer layer 1123 is also a silicon oxide layer, and the refractive index of the third buffer layer 1123 is 1.45.
In comparative example 1, the buffer layer includes a silicon nitride layer 31 and a silicon oxide layer 32. As shown in
In addition, a test result of the threshold voltage of the thin film transistor changing over time is a drift characteristic curve obtained when a Bias stress (BS) is applied to the gate and the source of the thin film transistor. A threshold voltage drift value is equal to a difference between a threshold voltage of the thin film transistor at time of 2 h and a threshold voltage at time of 0s.
Table 1 a test result of the transmittance and the threshold voltage drift value of embodiment 1, embodiment 2, and comparative example 1
As can be seen from Table 1, compared with comparative example 1, the buffer layers of Embodiment 1 and Embodiment 2 of the present disclosure are designed so that the transmittance of the array substrate to the backlight is increased by at least 1%. After test and verification, in a case that the transmittance is increased by at least 1% during display of the display device, display brightness of the display device can be increased by at least 7%. Therefore, by increasing the transmittance of the array substrate to the backlight, the display effect of the display device can be significantly improved.
In addition, compared with comparative example 1, using the buffer layer according to Embodiment 2 of the present disclosure, under the action of a vertical electric field (an electric field generated by gate loaded bias) and a horizontal electric field (an electric field generated by source loaded bias), a problem that the threshold voltage of the thin film transistor drifts over time is significantly improved. Moreover, compared with Embodiment 1, the buffer layer in Embodiment 2 employs a three-layer silicon oxide structure, and the threshold voltage of the thin film transistor is significantly improved.
Therefore, in related art, the design of the buffer layer only takes into account its barrier properties but ignores its influence on the display brightness of the display device. According to the technical solution of the present disclosure, the improvement of the film layer of the buffer layer ensures that the stability of the thin film transistor can be improved while the transmittance of the backlight through the display panel is increased, transmittance to backlight and device stability are balanced, and the display effect of the display device is improved.
It should be noted that the array substrate 11 may be applied to other display panels, such as an organic light-emitting diode display panel, a sub-millimeter light-emitting diode display panel, a micro light-emitting diode display panel, and a quantum dot display panel. The above-mentioned design of the array substrate 11 may also be applied to a spliced display panel. When applied to the display panel, the array substrate 11 includes at least a base 111, a buffer layer 112, and a thin film transistor T.
The above description of the embodiments is merely intended to assist in understanding the technical solution of the present disclosure and the core concepts thereof. It will be appreciated by those skilled in the art that modifications may still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions may be made to some of the technical features therein. These modifications or substitutions do not depart the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202311221647.2 | Sep 2023 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2023/121353 | 9/26/2023 | WO |
