Asynchronous digital time-division multiplexing system with distributed bus

Information

  • Patent Grant
  • 4849965
  • Patent Number
    4,849,965
  • Date Filed
    Tuesday, July 7, 1987
    37 years ago
  • Date Issued
    Tuesday, July 18, 1989
    35 years ago
Abstract
The system comprises a first unidirectional packet bus having a bit rate D, each packet including an e-bit identifier and a b-bit package, sources having differing bit rates d.sub.i such that d.sub.m .ltoreq.d.sub.i .ltoreq.d.sub.M <D, and access means for introducing packets from the sources into the first bus. An allocator located at the receiving end of the first bus builds up frames of identifiers identifying active sources. Each frame has a length T=b/d.sub.m and is shared into N=d.sub.M /d.sub.m time slots. Each time slot has a period .theta.=b/d.sub.M and includes a source identifier. The identifier for a same active source having a bit rate d.sub.i is repeated in the frame n.sub.i times such that n.sub.i =d.sub.i /d.sub.m when d.sub.i /d.sub.m is an integer, or such that n.sub.i =1+ integer part of (d.sub.i /d.sub.m) otherwise. The identifier frames are transmitted from the allocator into a second unidirectional bus distributed to all the access means. The access means of each source transmits a packet in the first bus whenever a b-bit package delivered from the source is received and an identifier of the source is detected in the second bus after package reception.
Description
Claims
  • 1. An asynchronous digital time-division multiplexing system, comprising
  • (a) plural data sources each having active and inactive states and being identified by respective identifiers, each active source supplying data bits with a corresponding bit rate, and said corresponding bit rates of said active sources being different therebetween;
  • (b) plural access means associated with said data sources, respectively, for linking each associated data source to an identifier bus and to a packet bus, each access means transmitting a packet into said packet bus in response to each identifier of said associated data source detected on said identifier bus, and each transmitted packet consisting of said identifier and a group of data bits delivered by said associated data source; and
  • (c) allocating means linked to said identifier bus for constituting identifier frames and transmitting said frames into said identifier bus; and wherein
  • (d) each said identifier frame has a determined length and is composed of said identifiers corresponding to said active sources; and
  • (e) each identifier is repeated in said identifier frame a number of times approximately proportional to said bit rate of said active source corresponding to said identifier.
  • 2. The system defined in claim 1, wherein said data sources have bit rates between a minimum bit rate d.sub.m and a maximum bit rate N.d.sub.m less than a predetermined bit rate D of said packet bus, where N is an integer, each identifier frame has a length equal to b/d.sub.m and is split into N time slots, where b is a number of bits of said data bit group, each time slot has a period equal to b/(N.d.sub.m) and includes one identifier, and further wherein each identifier has a bit rate d.sub.i and is repeated in said frame n.sub.i times such that n.sub.i =d.sub.i /d.sub.m and n.sub.i =l+(integer part of (d.sub.i /d.sub.m)) when d.sub.i /d.sub.m is equal to and different from an integer, respectively.
  • 3. The system defined in claim 2, wherein said length of each frame time slot is equal to (e+b)/D increased by an amount equal to twice a bit propagation time in said identifier and packet buses between one of said access means nearest said allocating means and one of said access means farthest from said allocating means, where e is a number of bits of said identifier.
  • 4. The system defined in claim 2, wherein said access means associated with said respective data source comprises means for detection said data source identifier in said identifier bus, means for assembling said data bits supplied progressively from said data source into said data bit groups, means for detecting each of said assembled data bit groups to deliver a triggering signal in response to each detected data source identifier following said data bit group assembly, and means for transmitting a packet made up of said data source identifier and said assembled data bit group into said packet bus in response to said triggering signal.
  • 5. The system claimed in claim 4, wherein said assembling means in said access means comprises a first-in first-out (FIFO) buffer having a capacity equal at least to 2b bits.
  • 6. An asynchronous digital time-division multiplexing system, comprising
  • (a) plural data sources each having active and inactive states and being identified by respective identifiers, each active source supplying data bits with a corresponding bit rate, and said corresponding bit rates of said active sources being different therebetween;
  • (b) plural access means associated with said data sources, respectively, for linking each associated data source to an identifier bus and to a packet bus, each access means transmitting a packet into said packet bus in response to each identifier of said associated data source detected on said identifier bus, and each transmitted packet consisting of said identifier and a group of data bits delivered by said associated data source; and
  • (c) allocating means, linked to said identifier bus for constituting identifier frames and transmitting said frames into said identifier bus, each identifier having a determined length and being composed of said identifiers corresponding to said active sources; and wherein
  • (d) said data sources have bit rates between a minimum rate d.sub.m and a maximum bit rate N.d.sub.m less than a predetermined bit rate D of said packet bus, where N is an integer, each identifier frame has a length equal to b/d.sub.m and is split into N time slots, where b is a number of bits of said data bit group, each time slot has a period equal to b/(N.d.sub.m) and includes one identifier, and further wherein each identifier has a bit rate d.sub.i and is repeated in said frame n.sub.i times such that n.sub.i =d.sub.i /d.sub.m and n.sub.i =1+(integer part of (d.sub.i /d.sub.m)) when d.sub.i /d.sub.m is equal to and different from an integer, respectively; and
  • (e) said allocating means comprises means for storing identifiers in N memory-cells to constitute one frame, means for systematically providing N cell addresses to read said stored identifiers during first half-periods of said time slots in said frame, thereby to insert said read identifiers in said second bus during second half-periods of said frame time slots, respectively, and means for selectively providing an identifier writing address during one of the second half-periods of said frame time slots to write said identifier in said storing means during the second half-period of a following time slot.
  • 7. The system defined in claim 6, wherein said length of each frame time slot is equal to (e+b)/D increased by an amount equal to twice a bit propagation time in said identifier and packet buses between one of said access means nearest said allocating means and one of said access means farthest from said allocating means, where e is a number of bits of said identifier.
  • 8. The system defined in claim 6, wherein said access means associated with said respective data source comprises means for detecting said data source identifier in said identifier bus, means for assembling said data bits supplied progressively from said data source into said data bit groups, means for detecting each of said assembled data bit groups to deliver a triggering signal in response to each detected data source identifier following said data bit group assembly, and means for transmitting a packet made up of said data source identifier and said assembled data bit group into said packet bus in response to said triggering signal.
  • 9. The system claimed in claim 8, wherein said assembling means in said access means comprises a first-in first-out (FIFO) buffer having a capacity equal at least to 2b bits.
  • 10. The system claimed in 6, wherein said identifier bus further comprises a digital transmission line for transmiting pulses synchronous with said frame identifiers inserted during said second half-periods of said time slots and provided from said N-reading address providing means.
Priority Claims (2)
Number Date Country Kind
83 16365 Oct 1983 FRX
PCT/FR84/00230 Oct 1984 WOX
BACKGROUND OF THE INVENTION

This application is a continuation of application Ser. No. 740,838 filed May 21, 1985, abandoned. 1. Field of the Invention The present invention relates to an asynchronous digital time-division multiplexing system with distributed bus. 2. Description of the Prior Art The multiplexing mode in an asynchronous digital time-division multiplexing system is mid-way between the packet mode and the circuit mode. In an asynchronous time-division system, the digital paths from various sources are time-multiplexed after having been assemblied into packets, as in the conventional packet-mode technique. Each packet consists of an identifier identifying the digital source path and an information package delivered from the source. Moreover, in accordance with the circuit-mode multiplexing technique, each packet carries a constant number of bits, and the packets are multiplexed in frame time slots; no error or flow check is carried out. The asynchronous time-division multiplexing technique is particularly intended for the design of a integrated service digital network on the subject of which the article by Jean-Pierre Coudreuse may be cited, entitled "Les reseaux temporels asynchrones: du transfert de donnees a l'image animee" (Asynchronous time-division networks: from data to moving pictures) published in Echo des RECHERCHES, No. 112, 2nd quarter 1983, pages 33 to 48. More particularly, this invention deals with an asynchronous time-division multiplexing system for concentrating and multiplexing digital source paths having differing bit rates. These sources are linked along an interconnection bus, as briefly described on pages 47 and 48 of the aforementioned article under the title "PRELUDE: les bases d'un reseau experimental" (PRELUDE: the bases of an experimental network"). The object of the present invention is to provide an asynchronous digital time-division multiplexing system with distributed bus in which the introduction of a packet from an active source does not require an access request from the source in order to avoid a signal exchange between the source and a packet concentrator for each packet transmission and, as a corollary thereto, in order to permit a high rate operation of the packet transmitting the bus. The packet multiplexing mode does not make use of the inactivity times of sources to multiplex a greater number of packets. Accordingly, an asynchronous digital time-division multiplexing system comprising a first unidirectional bus having a predetermined bit-rate D for transmitting packets each including a source identifier having e bits and a package having b source bits, plural sources respectively delivering digital signals having different bit rates lying between a minimum bit rate d.sub.m and a maximum bit rate d.sub.M less than the predetermined bit rate D in the first bus, and plural access means linking the sources along the first bus for introducing packets into the first bus from the sources respectively, is characterized in that it comprises allocating means located at the receiving end of the first bus for constituting frames of identifiers identifying the sources, each frame having a length T equal to b/d.sub.m and being split into a number N of time slots equal to d.sub.M /d.sub.m, each time slot having a period .theta. equal to b/d.sub.M and including a source identifier, each identifier of the same source having a bit rate d.sub.i being repeated in the frame T n.sub.i times such that n.sub.i =d.sub.i /d.sub.m when the ratio d.sub.i /d.sub.m is an integer, or such as n.sub.i =1+ integer part of (d.sub.i /d.sub.m) when the ratio d.sub.i /d.sub.m is not an integer, in that the identifier frames are transmitted from the allocating means into a second unidirectionel bus distributed to all the access means, and in that the access means of each source transmits a packet into the first bus whenever a b-bit package from the source is received and an identifier of the source is detected in the second bus after package reception.

US Referenced Citations (4)
Number Name Date Kind
3755782 Haas et al. Aug 1973
4000378 Caplan Dec 1976
4016369 Pedersen Apr 1977
4426697 Petersen et al. Jan 1984
Continuations (1)
Number Date Country
Parent 740838 May 1985