The present invention relates to an audio amplifier with reduced noises. The audio amplifier has low stand-by current, and there is no surge noise during power ON/OFF operation.
In view of the abovementioned drawback, as shown in
The same applicant of U.S. Pat. No. 5,642,074 also obtains U.S. Pat. Nos. 5,648,742; 5,703,529; 5,939,938 and 6,346,854 under the same or similar spirit, with similar circuit structures.
However, the above prior art circuits have not totally solved the issue of surge noises. More specifically, the gain of the first stage amplifier 11 is decided by the ratio of the resistors RF1 and RI1 (RF1/RI1). In integrated circuit applications, the gain is determined by a user, usually in the range from 1 to 10 (RF1/RI1=1˜10). It is only when the gain is 1 that the above prior art circuits result in a smooth waveform as shown in
Besides the above drawback, in the stand-by mode, there is still a power consumption path from the supply voltage V+ through resistors R5 and R6 to ground; moreover, the comparator 130 can not be shut down, or else the switch 122 will not be under accurate control. Hence when the audio amplifier is in the stand-by mode, its power consumption control is not optimum. As is well known, low power consumption is very important to portable products.
In view of the foregoing, it is desirous, and thus an object of the present invention, to provide an audio amplifier with reduced noises and low stand-by current which solves the issues in the prior art circuits.
In accordance with the foregoing and other aspects of the present invention, and as disclosed by one embodiment of the present invention, an audio amplifier comprises: a first stage and a second stage amplifiers each respectively providing an output to a speaker; a first resistor electrically connected in parallel with the first stage amplifier; a second resistor electrically connected in series with an input of the first stage amplifier; a third resistor electrically connected in parallel with the second stage amplifier; a fourth resistor electrically connected in series with an input of the second stage amplifier, and also electrically connected in series with an output of the first stage amplifier; and a variable resistor electrically connected in parallel with the first resistor, the variable resistor and the first resistor forming a variable resistance parallel circuit. The variable resistor has a resistance that is changeable among at least three states, i.e., three different resistances, and preferably, it has a resistance that is variable continuously. At the initial power ON stage, the variable resistor has a low resistance; when (at the same time or after) the supply voltage enters the normal operation mode, the resistance of the variable resistor increases so that the parallel circuit has a resistance that is approximately or substantially equal to the resistance of the first resistor.
In one preferred embodiment, the variable resistor includes a switch and a variable resistor device electrically connected in series. In one preferred embodiment, the audio amplifier further comprises a comparator, whose output is stored in a latch circuit, and the output of the latch circuit controls the switch. Thus, the comparator may be shut down during the stand-by mode. In one preferred embodiment, the output of the comparator is obtained from comparison between two signals: one of which is a dividend voltage of the supply voltage, and the other of which is another dividend voltage of the supply voltage plus a voltage across a capacitor.
It is to be understood that both the foregoing general description and the following detailed description are provided as examples, for illustration rather than limiting the scope of the invention.
These and other features, aspects, and advantages of the present invention will become better understood with reference to the following description, appended claims, and accompanying drawings where:
The drawings as referred to throughout the description of the present invention are for illustration only, but not drawn according to actual scale.
The present invention will first be explained with respect to its concept. Referring to
There are many ways to embody the variable resistor 71 and the control signal 72. One embodiment will be shown and explained in more detail with reference to
Referring to
In the embodiment shown in
Now referring to the lower part of the figure, the output of the comparator 75 is sent to the setting terminal (S) of a flip-flop 761, to thereby latch the output of the comparator 75 in the flip-flop 761. The input voltages of the comparator 75 are Va and Vb, respectively; the voltage Va is a dividend voltage of the supply voltage V+, and the voltage Vb is another dividend voltage of the supply voltage V+ plus a voltage across a capacitor CB. By proper design of the resistances of the resistors R01-R05, and the capacitance of the capacitor CB, it may be arranged so that in the beginning of the power ON stage, the voltage Va is lower than the voltage Vb, but thereafter along with the charging of the capacitor CB, the voltage Va increases and finally crosses over the voltage Vb. Thus, the output of the comparator 75 changes its state, and the switch 711 is turned OFF. The relationships among the voltage Va, the voltage Vb and the operation of the switch 711 are shown in
By proper design of the resistances of the resistors R01-R03, it may be arranged so that the resistance of the PMOS transistor 712 is far more greater than the resistance of the resistor RF1 when the gate voltage of the PMOS transistor 712 equals to (V+) (R02+R03)/(R01+R02+R03) (wherein V+ is the voltage value when the supply voltage is in normal operation). In other words, at the time point when the switch 711 switches OFF, the resistance of the parallel circuit 73 is near or equal to the resistance of the resistor RF1. Thus, when the switch 711 switches OFF, the gain of the first stage amplifier 11 does not change, or only changes slightly.
Moreover, please note that during the stand-by mode, the comparator 75 itself, and the signal generation paths for its input voltages Va and Vb, can all be shut down. As shown in the figure, the stand-by control signal 78 not only shuts down the comparator 75, but also shuts down the path from the supply voltage V+ to the resistors R01-R03, and the path from the supply voltage V+ to the resistors R01, R04, R05 and CB. Therefore, in comparison with the abovementioned prior art, the present invention further reduces unnecessary power consumption.
The spirit of the present invention has been explained in the foregoing with reference to its preferred embodiments, but it should be noted that the above is only for illustrative purpose, to help those skilled in this art to understand the present invention, not for limiting the scope of the present invention. Within the same spirit, various modifications and variations can be made by those skilled in this art. For example, the comparator 75 may be replaced by a hysteretic comparator; additional devices may be interposed between any two devices shown in the drawing, without affecting the primary function of the circuit; the devices for dividing the supply voltage are not necessarily resistors, but may be replaced by other devices such as various kinds of diodes, and so on. In view of the foregoing, it is intended that the present invention cover all such modifications and variations, which should interpreted to fall within the scope of the following claims and their equivalents.