Patent Application
20240236572
The disclosure relates to audio processing, and more particularly to an audio latency calibration method, electronic device and computer-readable storage medium.
Data transmission technology in audio transmission is well developed. However, the audio applications have increased, and requirements of audio synchronization have correspondingly increased. Thus, accuracy of audio latency becomes more important.
Many aspects of the present disclosure can be better understood with reference to the following figures. The components in the figures are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views. Implementations of the present technology will now be described, by way of embodiments, with reference to the attached figures, wherein:
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
Several definitions that apply throughout this disclosure will now be presented.
The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
T1 represents the time that MCU 111 transmits an audio signal to the Wi-Fi router 130. T2 represents the time that the audio signal is transmitted from the Wi-Fi router 130 to the slave device 150 and played by the trumpet 159. T3 represents the time that the audio signal is transmitted from the trumpet 159 to the microphone 117. T3′ represents the time that the audio signal is transmitted from the trumpet 119 to the microphone 117. T4 represents the time that the MCU 111 obtains the audio signal from the microphone 117. T5 represents the time the MCU 111 transmits the audio signal to the trumpet 119 via the codec 155.
The master device 110 transmits the audio signal to the slave device 150 via the Wi-Fi router 130, thereby obtaining latency time period T1+T2. The slave device 150 transmits the audio signal to the microphone 117, thereby obtaining latency time period T3+T4. The master device 110 transmits the audio signal to the slave device 150 and the trumpet 119 obtains the audio signal via the trumpet 159, thereby obtaining latency time period TL=T1+T2+T3+T4. The microphone 117 obtains the audio signal transmitted by the master device 110, thereby obtaining latency time period of the master device 110, TLint=T3′+T4+T5.
When the master device 110 and the slave device 150 are located at a separation distance from each other, T3≃T3′ is obtained and TL−TLint=(T1+T2+T3+T4)−(T3′+T4+T5)=T1+T2+T5. Therefore, the latency time period that the audio signal is transmitted from the master device 110 to the slave device 150 via the Wi-Fi router 130 is T1+T2=TL−TLint+T5. TL, TLint and T5 can be calculated using prior methods so that the result of T1+T2 can be obtained and audio signal synchronization can be achieved according to T1+T2.
The memory 220 stores a computer program, such as the audio latency calibration system 230, which is executable by the processor 210. When the processor 210 executes the audio latency calibration system 230, the blocks in one embodiment of the booting mode configuration method applied in the electronic device 200 are implemented, such as blocks S11 to S17 shown in
It will be understood by those skilled in the art that
The processor 210 may be a central processing unit (CPU),or other general-purpose processors, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a Field-Programmable Gate Array (FPGA), or another programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. The processor 210 may be a microprocessor or other processor known in the art.
The memory 220 can be used to store the audio latency calibration system 230 and/or modules/units by running or executing computer programs and/or modules/units stored in the memory 220. The memory 220 may include a storage program area and a storage data area. In addition, the memory 220 may include a high-speed random access memory, a non-volatile memory such as a hard disk, a plug-in hard disk, a smart memory card (SMC), and a secure digital (SD) card, flash card, at least one disk storage device, flash device, or another volatile solid state storage device.
The audio latency calibration system 230 can be partitioned into one or more modules/units that are stored in the memory 220 and executed by the processor 210. The one or more modules/units may be a series of computer program instructions capable of performing particular functions of the audio latency calibration system 230.
The electronic device 200, a first speaker, for example, comprises a wireless communication module 310, a control module 320, a voice receiving module 330 and a first voice playing module 340.
As the first speaker and a second speaker, namely a pairing electronic device, are located at a separation distance from each other, the wireless communication module 310 implements a pairing process to the second speaker via a Wi-Fi router.
As the pairing process is completed, the control module 310 transmits an audio signal to the second speaker via the Wi-Fi module 310, thereby obtaining latency time period T1. The second speaker transmits the audio signal to a second voice playing module (not shown) of the second speaker, thereby obtaining latency time period T2.
The voice receiving module 330 receives the audio signal transmitted from a second voice playing module (not shown) of the second speaker, thereby obtaining latency time period T3.
The first voice playing module 340 receives and transmits the audio signal to control module 320, thereby obtaining latency time period T4.
The control module 320 transmits the audio signal to the first voice playing module 340 via a first codec (not shown) of the first speaker, thereby obtaining latency time period T5.
The first voice playing module 340 transmits the audio signal to the voice receiving module 330, thereby obtaining latency time period T3′. As the first speaker and the second speaker are located at the separation distance from each other, T3≃T3′.
The latency time period TL=T1+T2+T3+T4 of the audio signal passing through the second trumpet (not shown) of the second speaker and received by the first voice playing module 340, the latency time period TLint=T3′+T4+T5 of the first speaker itself and TL−TLint=(T1+T2+T3+T4)−(T3′+T4+T5)=T1+T2+T5 are calculated according to the described received latency time period parameters using the control module 320. Thus, the latency time period T1+T2 referring to the first speaker transmitting the audio signal to the second speaker via the Wi-Fi router is equal to TL−TLint−T5. TL, TLint and T5 can be calculated using prior methods so that the result of T1+T2 can be obtained
The control module 320 implements audio signal synchronization between the first speaker and the second speaker according to the latency time period T1+T2.
It is to be understood, however, that even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
