1. Field of the Invention
The present invention relates to signal transmission circuits, and particularly to an audio signal transmission circuit.
2. Description of Related Art
Many conventional multimedia computers include a two-channel (stereo) multimedia computer audio system. Typically, a conventional two-channel multimedia computer audio system includes a rear audio interface typically used for headphones, lineout, or microphone, and two wide-band audio transducers or speakers as a front audio. Once a user plugs into the rear audio interface jack, the front audio (audio transducers or speakers) should be muted so that users do not hear anything from the front audio.
An exemplary audio signal transmission circuit includes a codec to provide analog and digital audio signals; an amplifier connected to the codec to receive the analog audio signals; a control circuit connected to the codec to receive the digital audio signals and connected to the amplifier to selectively turn off the amplifier; a front audio port connected to the amplifier to receive an amplified analog audio signal generated by the amplifier; and a rear audio port connected to the amplifier and the control circuit to selectively receive the amplified analog audio signal or the digital audio signal, wherein the control circuit and the front audio port are turned off when the rear audio port is connected to an analog system, and the amplifier and the front audio port are turned off when the rear audio port is connected to a digital system.
Other advantages and novel features will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which:
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The control circuit includes an XNOR gate U1, an AND gate U2, and four transistors Q1˜Q4 functioning as four electric switches. In this embodiment, the transistors Q1, Q2, and Q4 are NPN transistors, and the transistor Q3 is a MOSFET. The XNOR gate U1 has a first input terminal connected to a power source VCC, a second input terminal connected to the power source VCC and the first feedback terminal 5 of the rear audio port 17, and an output terminal connected to the AND gate U2. The AND gate U2 has a first input terminal connected to the output terminal of the XNOR gate U1, a second input terminal connected to the codec 12 to receive the digital audio signal SO, and an output terminal connected to the data terminal 7 of the second interface 173 of the rear audio port 17. A base of the transistor Q1 is connected to the power source VCC and the second feedback terminal 1 of the rear audio port 17, an emitter of the transistor Q1 is grounded, and a collector of the transistor Q1 is connected to the first input terminal of the XNOR gate U1. A base of the transistor Q2 is connected to the first feedback terminal 5 of the rear audio port 17, an emitter of the transistor Q2 is grounded, and a collector of the transistor Q2 is connected to the power source VCC and the control terminal HP of the amplifier 14. A gate of the MOSFET Q3 is connected to the power source VCC, a source of the MOSFET Q3 is connected to the power source VCC, and a drain of the MOSFET Q3 is connected to the power terminal 6 of the second interface 173 of the rear audio port 17. A base of the transistor Q4 is connected to the output terminal of the XNOR gate U1, an emitter of the transistor Q4 is grounded, and a collector of the transistor Q4 is connected to the gate of the MOSFET Q3.
When the rear audio port 17 is idle, the transistor Q2 is turned on to ground the control terminal HP of the amplifier 14. Therefore, the voltage of the output feedback terminals RO− and LO− of the amplifier 14 are in a low level to form two audio signal loops with the output terminals RO+ and LO+ of the amplifier 14 for providing the amplified analog audio signal to the front audio port16. At this time, the transistor Q1 is turned on, the XNOR gate U1 outputs a low level signal to turn off the transistor Q4, and the MOSFET Q3 is turned off. Therefore, the power terminal 6 of the second interface 173 is in a low level for safety.
When the first interface 172 of the rear audio port 17 is connected to the analog system, the first and the second feedback terminals 5 and 1 of the rear audio port 17 are elastically deformed by the plug of the analog system to contact the reference terminal 2 of the rear audio port 17. Therefore, the transistor Q2 is turned off raising the voltage of the control terminal HP of the amplifier 14, the voltage of the output feedback terminals RO− and LO− of the amplifier 14 are high level to disable the front audio port 16. The amplified analog audio signal is transmitted to the input terminals 3 and 4 of the first interface 172. At this time, the transistor Q1 is turned off, the XNOR gate U1 outputs a low level signal to turn off the transistor Q4, and the MOSFET Q3 is turned off. Therefore, the power terminal 6 of the second interface 173 is low level for safety. The front audio port 16 is muted and the rear audio port 17 outputs analog audio signals.
When the second interface 173 of the rear audio port 17 is connected to the digital system, The first feedback terminal 5 of the rear audio port 17 is elastically deformed by the plug of the digital system to contact the reference terminal 2 of the rear audio port 17. Therefore, the transistor Q2 is turned off raising the voltage of the control terminal HP of the amplifier 14, the voltage of the output feedback terminals RO− and LO− of the amplifier 14 are high to disable the front audio port 16. The transistor Q1 is turned on, the XNOR gate U1 outputs a high level signal to turn on the transistor Q4, the MOSFET Q3 is turned on to provide power to the power terminal 5 of the second interface 173. Then, the digital audio signal SO is transmitted to the data terminal 7 of the second interface 173 via the AND gate U2. The front audio port 16 is muted and the rear audio port 17 outputs digital audio signals. The first interface 172 of the rear audio port 17 is idle and do not outputs analog audio signal.
The foregoing description of the exemplary embodiments of the invention has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to explain the principles of the invention and their practical application so as to enable others skilled in the art to utilize the invention and various embodiments and with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those skilled in the art to which the present invention pertains without departing from its spirit and scope. Accordingly, the scope of the present invention is defined by the appended claims rather than the foregoing description and the exemplary embodiments described therein.
Number | Date | Country | Kind |
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200710200604.0 | May 2007 | CN | national |