The present invention relates to an authentication system, a generation device, a generation method, and a generation program.
Malware (e.g. Mirai) invades not only information and communication technology (ICT) devices such as personal computers (PCs) but also Internet of Things (IoT) devices and the like that do not have hardware such as a secure element and causes the devices to participate in a botnet, which causes widespread damage to the devices.
However, the related art cannot effectively verify integrity of IoT devices. This is because, although a physical root of trust such as a security chip is generally used to ensure security of ICT devices, the physical root of trust is frequently not mounted in a dedicated device such as an IoT device or a communication device.
In a case where the physical root of trust is not mounted, the related art needs to generate individual firmware incorporating different random numbers for each device. Therefore, the same firmware cannot be used in the same model. Further, in the above related art, an IoT gateway also needs to manage different types of firmware data for each integrity verification target device, and, when the number of devices increases, an amount of data managed by the IoT gateway increases. Furthermore, in the above related art, a hash value of an entire memory image is taken, and thus a device having a variable portion in a memory is excluded.
The present invention has been made in view of the above, and an object thereof is to provide an authentication system, a generation device, a generation method, and a generation program capable of effectively verifying integrity of IoT devices.
In order to solve the above problem and achieve the object, an authentication system according to the present invention is an authentication system including a generation device that generates firmware, a verifier device that verifies integrity, and a prover device that proves the integrity, in which: the generation device includes a firmware generation unit that generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware; the verifier device includes a challenge generation unit that generates a challenge for the prover device on the basis of the model common firmware held by the verifier device; and the prover device includes a response generation unit that generates a response to the verifier device on the basis of the model common firmware held by the prover device.
In order to solve the above problem and achieve the object, a generation device according to the present invention includes a firmware generation unit that generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware.
A generation method according to the present invention is a generation method performed by a generation device, the generation method including a firmware generation step of generating model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware.
A generation program according to the present invention causes a computer to execute a firmware generation procedure of generating model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware.
The present invention can effectively verify integrity of IoT devices by using model common firmware.
Hereinafter, embodiments of a firmware generation device (generation device), a firmware generation method (generation method), and a firmware generation program (generation program) according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments described below.
Hereinafter, a configuration of an authentication system 100 according to a first embodiment, a configuration of each device of the authentication system 100, a specific example of each kind of processing, and a flow of authentication processing will be described in this order, and, finally, effects of the first embodiment will be described.
The configuration of the authentication system 100 according to the first embodiment will be described in detail with reference to
As illustrated in
The firmware generation device 10 is a device (computer) that generates firmware that is a program to be installed in the prover device 30 such as the IoT device. The firmware generation device 10 receives an operation from an administrator of the firmware generation device 10, such as a device manufacturer M. The firmware generation device 10 is implemented by, for example, a dedicated device for manufacturing IoT devices, a server device, or a desktop PC. In the example of
The verifier device 20 is a device (computer) that verifies the integrity of the IoT device. The verifier device 20 has an integrity verification program (verifier) that verifies whether or not memory information of the IoT device or the like is falsified. In the example of
The prover device 30 is a device (computer) that proves the integrity and is a small information device manufactured by the device manufacturer M or the like on the premise of connection to the Internet. The prover device 30 has specific information (e.g. media access control (MAC) address and device serial number) for uniquely identifying the IoT device or the like. The prover device 30 has an integrity verification program (prover) that proves whether or not the memory information of the IoT device or the like is falsified. In the example of
The user operator terminal 40 is a device (computer) that updates firmware of the prover device 30 or registers firmware in the verifier device 20. The user operator terminal 40 is a terminal used by a user operator (simply referred to as “user” as appropriate) U. The user operator terminal 40 is implemented by, for example, a smartphone, a tablet terminal, a laptop personal computer (PC), a desktop PC, a mobile phone, or a personal digital assistant (PDA). In the example of
Hereinafter, firmware generation processing (step S1), firmware update/registration processing (steps S2 to S4), formal registration processing (steps S5 to S6), challenge transmission processing (steps S7 to S8), and response transmission processing (steps S9 to S10) will be described as processing of the authentication system 100. The following steps S1 to S10 can be performed in different orders. Among the following steps S1 to S10, part of the processing may be omitted.
First, the firmware generation device 10 generates firmware (model common firmware) used for challenge-response authentication by writing a random number (hereinafter, “predetermined random number”) generated by a predetermined procedure and index information in a free space of the firmware (step S1). Details of the firmware generation processing will be described later in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-2. Hash Calculation Processing).
Next, the user operator terminal 40 acquires the firmware of the prover device 30 generated by the firmware generation device 10 (step S2). Then, the user operator terminal 40 updates (firmware update) the prover device 30 such as the IoT device (step S3). Further, the user operator terminal 40 uses the firmware generated by the firmware generation device 10 to register the firmware in the verifier device 20 such as the IoT gateway (step S4). Details of the firmware update/registration processing will be described later in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-4. Authentication Processing) (3-4-2. Specific Example of Device Registration).
Then, the prover device 30 issues a formal registration request of the device or the like to the verifier device 20 such as the IoT gateway (step S5). Further, the verifier device 20 formally registers the device or the like (step S6). Details of the formal registration processing will be described later in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-4. Authentication Processing)
Then, the verifier device 20 generates a challenge on the basis of the model common firmware held by the verifier device 20 (step S7). Further, in order to verify the integrity of the IoT device or the like, the verifier device 20 transmits the generated challenge to the prover device 30 (step S8). Details of the formal registration processing will be described later in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-4. Authentication Processing) (3-4-3. Specific Example of Integrity Verification).
Then, the prover device 30 generates a response on the basis of the model common firmware included in the prover device 30 (step S9). Further, in order to prove the integrity of the IoT device or the like, the prover device 30 transmits the generated response to the verifier device 20 (step S10). Details of the formal registration processing will be described later in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-4. Authentication Processing) (3-4-3. Specific Example of Integrity Verification).
Hereinafter, effects of the authentication system 100 will be described in detail by describing problems of Trusted platform module enabled Program Integrity Verification (TPIV) as a reference technique.
First, TPIV will be described as a reference technique. A technique using TPIV prevents malware from being hidden in a free space of firmware by filling the free space with random number data that is difficult to compress. The above technique is used to share information between the IoT gateway (verifier device) and the IoT device (prover device) by using a hash value of the entire firmware in which random numbers are embedded as a common key. At this time, the following two advantages are expected by using the firmware. A first advantage is that the above technique can prevent spoofing at the time of initial registration by using the firmware. That is, the firmware can be used as a unique ID for the IoT gateway to verify whether or not a target device is authentic. A second advantage is that the above technique can prevent falsification by using the firmware. That is, the firmware can be used as target data of hash calculation for verifying the integrity.
However, the technique using TPIV has the following three problems. A first problem is that the above technique needs to generate individual firmware incorporating different random numbers for each device, and thus the same firmware cannot be used in the same model. A second problem is that, in the above technique, the IoT gateway also needs to manage different types of firmware data for each integrity verification target device, and, when the number of devices increases, an amount of data managed by the IoT gateway increases. A third problem is that, in the above technique, a hash value of an entire memory image is taken, and thus a device having a variable portion in a memory is excluded.
In the authentication system 100, the firmware generation device 10 generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware, the verifier device 20 that verifies the integrity generates a challenge for the prover device 30 on the basis of the model common firmware held by the verifier device 20, and the prover device 30 that proves the integrity generates a response to the verifier device 20 on the basis of the model common firmware installed in the prover device 30.
Further, in the authentication system 100, the firmware generation device 10 generates the model common firmware by generating the predetermined random number common to each model of the prover device 30 and the index information including a head address and size of a memory area to be subjected to hash calculation and writing the predetermined random number and the index information in the free space of the firmware. The verifier device 20 reads target data of hash calculation by using the index information included in the model common firmware held by the verifier device 20, executes hash calculation by using information specific to the prover device 30 and the target data, and generates the challenge. The prover device 30 reads target data of hash calculation by using the index information included in the model common firmware held by the prover device 30, executes hash calculation by using information specific to the prover device 30 and the target data, and generates the response.
Therefore, the authentication system 100 contributes to solving the above problems of the technique using TPIV. For the first problem, because the authentication system 100 uses a common random number for the same model, the device manufacturer does not need to create different types of firmware for each device. For the second problem, because the authentication system 100 uses the common random number for the same model, an amount of data managed by the IoT gateway is reduced by sharing the same firmware data. For the third problem, the authentication system 100 causes firmware of a device to include index information indicating a memory range used for hash creation and excludes variable data from a hash target, thereby allowing a device having a variable portion in its memory to be a target of integrity verification.
From the above, the authentication system 100 can verify the integrity as software even for a device that does not have the physical root of trust such as a secure element and add a security function at low cost, that is, can achieve “expansion of target devices”. In addition, in an actual device manufacturing site, it is difficult to incorporate different kinds of software for each individual device to distribute and manage the devices in terms of cost and operation. The authentication system 100 can use the same software for the same model at a manufacturing stage, that is, can achieve “lowering an introduction barrier”. That is, the authentication system 100 verifies the integrity of IoT devices by using model common firmware and thus can effectively verify the integrity of the IoT devices.
Configuration examples of the firmware generation device 10, the verifier device 20, and the prover device 30 according to the first embodiment will be described in detail with reference to
The configuration example of the firmware generation device 10 according to the first embodiment will be described in detail with reference to
The communication unit 11 is implemented by using, for example, a network interface card (NIC). The communication unit 11 is connected to a predetermined communication network in a wired or wireless manner and transmits/receives information to/from various devices.
The input unit 12 is implemented by, for example, a keyboard or a mouse. The input unit 12 receives various operations from the administrator or the like of the firmware generation device 10.
The output unit 13 is implemented by, for example, a liquid crystal display. The output unit 13 displays various types of information.
The storage unit 14 is implemented by, for example, a semiconductor memory element such as a random access memory (RAM) or a flash memory or a storage device such as a hard disk or an optical disc. The storage unit 14 stores various types of information referred to when the control unit 15 operates and stores various types of information acquired when the control unit 15 operates.
The control unit 15 controls the entire firmware generation device 10. The control unit 15 includes a receiving unit 15a, a firmware generation unit 15b, and a transmission unit 15c. The control unit 15 is, for example, an electronic circuit such as a central processing unit (CPU) or a micro processing unit (MPU) or an integrated circuit such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA).
The receiving unit 15a receives various types of information regarding firmware. For example, the receiving unit 15a receives a firmware download request from the user U who is the administrator of the authentication system 100.
The firmware generation unit 15b generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware. For example, the firmware generation unit 15b generates the model common firmware by generating the random number common to each model of the prover device and the index information including a head address and size of a memory area to be subjected to hash calculation and writing the random number and the index information in the free space.
Meanwhile, the firmware generation unit 15b stores the generated model common firmware in the storage unit 14.
The transmission unit 15c transmits various types of information regarding firmware. For example, the transmission unit 15c transmits the generated firmware in response to the firmware download request from the user U who is the administrator of the authentication system 100.
A configuration example of the verifier device 20 according to the first embodiment will be described in detail with reference to
The communication unit 21 is implemented by, for example, an NIC. The communication unit 21 is connected to a predetermined communication network in a wired or wireless manner and transmits/receives information to/from various devices.
The input unit 22 is implemented by, for example, a keyboard or a mouse. The input unit 22 receives various operations from an administrator or the like of the verifier device 20.
The output unit 23 is implemented by, for example, a liquid crystal display. The output unit 23 displays various types of information.
The storage unit 24 is implemented by, for example, a semiconductor memory element such as a RAM or a flash memory or a storage device such as a hard disk or an optical disc. The storage unit 24 stores various types of information referred to when the control unit 25 operates and stores various types of information acquired when the control unit 25 operates.
The control unit 25 controls the entire verifier device 20. The control unit 25 includes a receiving unit 25a, a challenge generation unit 25b, a transmission unit 25c, and a response verification unit 25d. The control unit 25 is, for example, an electronic circuit such as a CPU or an MPU or an integrated circuit such as an ASIC or an FPGA.
The receiving unit 25a receives various types of information. For example, the receiving unit 25a receives the model common firmware and the information specific to the prover device 30 and stores the received firmware and information in the storage unit 24. The receiving unit 25a also receives a registration request and a response from the prover device 30.
The challenge generation unit 25b generates a challenge for the prover device 30 on the basis of the model common firmware held by the verifier device 20. For example, the challenge generation unit 25b reads target data of hash calculation by using the index information included in the model common firmware held by the verifier device 20, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, and generates a challenge.
The transmission unit 25c transmits various types of information. For example, the transmission unit 25c transmits the generated challenge to the prover device 30.
The response verification unit 25d verifies the response received from the prover device 30. For example, the response verification unit 25d verifies the response by a method described in [3. Specific Example of Each Kind of Processing in Authentication System 100] (3-1. Integrity Verification Processing) (3-1-6. Integrity Verification Processing of IoT Gateway) described later.
A configuration example of the prover device 30 according to the first embodiment will be described in detail with reference to
The communication unit 31 is implemented by, for example, an NIC. The communication unit 31 is connected to a predetermined communication network in a wired or wireless manner and transmits/receives information to/from various devices.
The input unit 32 is implemented by, for example, a keyboard or a mouse. The input unit 32 receives various operations from an administrator or the like of the prover device 30.
The output unit 33 is implemented by, for example, a liquid crystal display. The output unit 33 displays various types of information.
The storage unit 34 is implemented by, for example, a semiconductor memory element such as a RAM or a flash memory or a storage device such as a hard disk or an optical disc. The storage unit 34 stores various types of information referred to when the control unit 35 operates and stores various types of information acquired when the control unit 35 operates.
The control unit 35 controls the entire prover device 30. The control unit 35 includes a receiving unit 35a, a response generation unit 35b, and a transmission unit 35c. The control unit 35 is, for example, an electronic circuit such as a CPU or an MPU or an integrated circuit such as an ASIC or an FPGA.
The receiving unit 35a receives various types of information. For example, the receiving unit 35a receives the model common firmware. The receiving unit 35a also receives the challenge from the verifier device 20.
The response generation unit 35b generates a response to the verifier device 20 on the basis of the model common firmware held by the prover device 30. For example, the response generation unit 35b reads target data of hash calculation by using the index information included in the model common firmware installed in the prover device 30, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, and generates a response to the verifier device 20.
The transmission unit 35c transmits various types of information. For example, the transmission unit 35c transmits a registration request and the generated response to the verifier device 20.
A specific example of each kind of processing in the authentication system 100 according to the first embodiment will be described with reference to
A specific example of the integrity verification processing in the authentication system 100 will be described with reference to
First, in a case where KAnew is not set, the IoT gateway extracts PA from firmware data of the node A. At this time, in a case where the IoT gateway fails, the IoT gateway ends as a malicious cluster head (see (1) in
The IoT gateway transmits, as a challenge, IDA, CHv, the encrypted Nv, and the PRF of {Nv, IDA, CHv} calculated by using KA as keys (see (6) in
First, in a case where KAnew is set, the IoT device sets KAnew as KA. At this time, in a case where KAnew is not set, the IoT device extracts PA from memory data of the node A, combines PA and UA, and calculates KA (see (7) in
Then, the IoT device calculates a hash of {PA, Nv, IDA, CHv} and sets the hash as KAnew (see (10) in
The IoT device transmits, as a response, the PRF of Nv calculated by using KA as a key and the PRF of {IDA, CHv} calculated by using KAnew as a key (see (13) in
The IoT gateway calculates a PRF of Nv by using KA as a key and compares the PRF with a value of the response (see (14) in
A specific example of the hash calculation processing in the authentication system 100 will be described with reference to
Hereinafter, hash calculation methods of the firmware generation device 10, the IoT gateway serving as the verifier device 20, and the IoT device serving as the prover device 30 according to the first embodiment will be described in this order.
The firmware generation device 10 fills a free space of firmware with a random number (processing A1). At this time, it is difficult to input different random number values for each device in terms of operation, and thus a common random number is used for the same model. Further, the firmware generation device 10 causes the firmware to include index information indicating a memory range used for hash creation (processing A2).
The IoT gateway registers in advance firmware of an IoT device to be connected (processing B1). Next, when receiving a registration request from the IoT device, the IoT gateway accesses the index information in the firmware and grasps a range of data to be subjected to hash calculation (processing B2). At this time, a position of the index information itself is described in an integrity verification program (verifier). Then, the IoT gateway accesses a file position to be subjected to hash calculation on the basis of the range of the data acquired in the processing B2, thereby acquiring data (processing B3). Then, the IoT gateway calculates a hash by adding information specific to the device (e.g. MAC address and device serial number) to the data acquired in the processing B3 (processing B4).
When receiving a challenge from the IoT gateway, the IoT device accesses the index information in the memory and grasps a range of the memory to be subjected to hash calculation (processing C1). At this time, a position of the index information itself is described in an integrity verification program (prover). Next, the IoT device accesses a memory area to be subjected to hash calculation on the basis of the range of the memory acquired in the processing C1, thereby acquiring data (processing C2). Then, the IoT device calculates a hash by adding the information specific to the device (e.g. MAC address and device serial number) to the data acquired in the processing C2 (processing C3).
Hereinafter, specification of the hash calculation target according to the first embodiment in a case where a DFRobot DRF0478 is used as an example of the IoT device will be described in the following order: a memory image, a firmware image, the area to be subjected to hash calculation, and the index information.
As illustrated in (1) in
As illustrated in (2) in
As illustrated in (3) in
As illustrated in (4) in
A specific example of the communication network in the authentication system 100 will be described with reference to
The overview of the communication network in the authentication system 100 will be described with reference to
A specific example of the communication network in the authentication system 100 will be described with reference to
A specific example of the authentication processing in the authentication system 100 will be described with reference to
The overview of the authentication processing in the authentication system 100 will be described with reference to
A specific example of device registration in the authentication system 100 will be described with reference to
First, the user U procures (purchases) an IoT device from the device manufacturer M (see (1) in
The user U installs an IoT device (prover) 30 that proves the integrity (see (5) in
A specific example of the integrity verification in the authentication system 100 will be described with reference to
First, the user U can set a monitoring execution condition for the IoT gateway (device management) 20B (see (1) in
The user U immediately executes integrity verification of the IoT gateway (device management) 20B (see (2) in
A flow of the authentication processing in the authentication system 100 according to the first embodiment will be described with reference to
First, the firmware generation device 10 generates model common firmware (step S101). For example, the firmware generation device 10 generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware.
Second, the firmware generation device 10 updates and registers the model common firmware (step S102). For example, the firmware generation device 10 updates and registers the model common firmware by transmitting the model common firmware to the verifier device 20 and the prover device 30.
Third, the verifier device 20 formally registers the prover device 30 (step S103). For example, the verifier device 20 formally registers the prover device 30 by challenge-response authentication using the information specific to the prover device 30 and the firmware.
Fourth, the verifier device 20 transmits a challenge to the prover device 30 (step S104). For example, the verifier device 20 reads target data of hash calculation by using the index information included in the model common firmware held by the verifier device 20, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, generates a challenge for the prover device 30, and transmits the challenge.
Fifth, the prover device 30 transmits a response to the verifier device 20 (step S105). For example, the prover device 30 reads target data of hash calculation by using the index information included in the model common firmware held by the prover device 30, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, generates a response to the verifier device 20, and transmits the response.
Finally, effects of the first embodiment will be described. Hereinafter, effects 1 to 4 of the processing according to the first embodiment will be described.
In the above first embodiment, the firmware generation device 10 generates model common firmware used for challenge-response authentication by writing a predetermined random number and index information indicating an area to be subjected to hash calculation in a free space of the firmware, the verifier device 20 generates a challenge for the prover device 30 on the basis of the model common firmware held by the verifier device 20, and the prover device 30 generates a response to the verifier device 20 on the basis of the model common firmware installed in the prover device 30. This makes it possible to effectively verify the integrity of IoT devices by using the model common firmware.
In the above first embodiment, the firmware generation device 10 generates the model common firmware by generating the predetermined random number common to each model of the prover device 30 and the index information including a head address and size of a memory area to be subjected to hash calculation and writing the predetermined random number and the index information in the free space. Therefore, because the effective model common firmware is generated, it is possible to more effectively verify the integrity of the IoT devices by using the model common firmware.
In the above first embodiment, the verifier device 20 reads target data of hash calculation by using the index information included in the model common firmware held by the verifier device 20, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, and generates a challenge for the prover device 30. Therefore, because the effective challenge is generated, it is possible to more effectively verify the integrity of the IoT devices by using the model common firmware.
In the above first embodiment, the prover device 30 reads target data of hash calculation by using the index information included in the model common firmware installed in the prover device 30, executes hash calculation by using the information specific to the prover device 30 and the target data of hash calculation, and generates a response to the verifier device 20. Therefore, because the effective response is generated, it is possible to more effectively verify the integrity of the IoT devices by using the model common firmware.
Each component of each illustrated device according to the above embodiments is functionally conceptual and does not necessarily need to be physically configured as illustrated. That is, a specific form of distribution and integration of each device is not limited to the illustrated form, and all or a part thereof can be functionally or physically distributed and integrated in any unit according to various loads, usage conditions, and the like. Further, all or some of the processing functions performed in each device can be implemented by a CPU and a program analyzed and executed by the CPU or can be implemented as hardware by wired logic.
In the processing described in the above embodiments, all or part of the processing described as being automatically performed can be manually performed, or all or part of the processing described as being manually performed can be automatically performed by a known method. Further, the processing procedures, the control procedures, the specific names, and the information including various kinds of data and parameters described in the above specification and drawings can be arbitrarily changed, unless otherwise specified.
It is also possible to create a program in which the processing executed by the firmware generation device 10 described in the above embodiments is written in a language that can be executed by a computer. In this case, when the computer executes the program, it is possible to obtain effects similar to those of the above embodiments. Further, the program may be recorded in a computer-readable recording medium, and the program recorded in the recording medium may be read and executed by the computer, thereby implementing processing similar to that of the above embodiments.
As illustrated in
The hard disk drive 1090 stores, for example, an OS 1091, an application program 1092, a program module 1093, and program data 1094 as illustrated in
Various types of data described in the above embodiments are stored as program data in, for example, the memory 1010 and the hard disk drive 1090. The CPU 1020 reads the program module 1093 and the program data 1094 stored in the memory 1010 and the hard disk drive 1090 to the RAM 1012 as necessary and executes various processing procedures.
Note that the program module 1093 and the program data 1094 regarding the program are not limited to being stored in the hard disk drive 1090 and may be stored in, for example, a removable storage medium and read by the CPU 1020 via the disk drive or the like. Alternatively, the program module 1093 and the program data 1094 regarding the program may be stored in another computer connected via a network (e.g. local area network (LAN) or wide area network (WAN)) and be read by the CPU 1020 via the network interface 1070.
The above embodiments and modifications thereof are covered by the technique disclosed in the present application and fall within the scope of the inventions in the accompanying claims and their equivalents.
Filing Document | Filing Date | Country | Kind |
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PCT/JP2022/007420 | 2/22/2022 | WO |