Claims
- 1. A digital feedback circuit for synchronizing an oscillator output frequency with a signal input from a variable Baud Rate Clock in order to maintain a fixed input to output frequency ratio, comprising:
- first binary means connected to a voltage controlled oscillator having an output frequency for counting down at a rate determined by said voltage controlled oscillator output frequency, and having sequentially activated divider outputs for binary division of said output frequency;
- a system clock generating a system clock signal at a preset bit frequency;
- second binary means counting down said system clock signal for a period determined by said Baud Rate Clock period;
- means for registering the count of said second binary counting means
- logic means responsive to said registering means for selecting an output from said first binary counting means;
- means for connecting the output of said voltage controlled oscillator to an output terminal; and
- means for comparing phase differential between said selected output of said first binary counting means and said signal input from said variable Baud Rate Clock and generating a voltage level based upon any phase differential therebetween for adjusting said voltage controlled oscillator output frequency.
- 2. A digital feedback circuit as set forth in claim 1, further comprising:
- means for switching said system clock to said output terminal and
- means for outputting said system clock signal and disenabling said voltage controlled oscillator whenever said second binary means count exceeds a specified limit.
- 3. A digital feedback circuit as set forth in claim 1 wherein said clock generating at said preset bit frequency comprises a crystal oscillator.
- 4. A digital feedback circuit for synchronizing an oscillator output frequency with a signal input from a variable Baud Rate Clock in order to maintain a fixed input to output frequency ratio, comprising:
- first binary means connected to a voltage controlled oscillator having an output frequency voltage for counting down at a rate determined by said controlled oscillator output frequency, and having sequentially activated outputs for binary division of said output frequency;
- a crystal oscillator generating a system clock signal at a preset bit frequency;
- second binary means for counting down said system clock signal for a period determined by said Baud Rate Clock period;
- means registering the count of said second binary counting means
- logic means responsive to said registering means for selecting an output from said first binary counting means;
- means for connecting the output of said voltage controlled oscillator to an output terminal;
- means for comparing phase differential between said selected output of said first binary counting means and said signal input from said variable Baud Rate Clock and generating a voltage level based upon any phase differential therebetween for adjusting said voltage controlled oscillator output frequency; and
- means for switching said system clock signal to said output terminal and disenabling said voltage controlled oscillator whenever said second binary means count exceeds a specified limit.
CROSS REFERENCE TO RELATED APPLICATION
This is a continuation-in-part application of U.S. application Ser. No. 06/137,038 filed Apr. 3, 1980 and now abandoned.
US Referenced Citations (6)
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
137038 |
Apr 1980 |
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