The present application claims priority to Japanese Patent Application No. 2004-356417 filed Dec. 9, 2004, which is hereby expressly incorporated by reference herein in its entirety.
1. Technical Field
The present invention relates to an automatic image correction circuit that automatically performs image correction by detecting resolutions of input image data.
2. Related Art
An automatic image correction circuit that automatically performs image correction on input image data has been known. The automatic image correction circuit is a circuit that calculates statistic values of received image data, such as luminance and chroma, and performs image correction suitable for images, which are being received, based on the statistic values. The automatic image correction circuit enhances images to be displayed through image correction, such as level correction, gamma correction, or contrast correction.
The automatic image correction circuit sometimes performs image data correction by calculating statistic values using resolutions of image data or by changing a set value. In a general automatic image correction circuit, a user inputs resolutions of image data to a register, etc. in advance and the automatic image correction circuit then performs image correction on image data based on the resolutions input in advance. However, the method in which a user inputs resolutions every image data is not preferred in terms of user-friendly aspect and accuracy. Furthermore, this method cannot cope with a case where resolutions of input image data are dynamically changed.
An advantage of some aspects of the invention is that it provides an automatic image correction circuit that detects resolutions of input image data and automatically performs image correction appropriate for the detected resolutions.
According to an aspect of the invention, an automatic image correction circuit is an automatic image correction circuit that automatically performs image correction on received image data. The circuit includes a resolution detection unit that detects resolutions of the image data, a set value calculation unit that calculates a set value to be used in the image correction based on the resolutions, and an image correction unit that performs the image correction on the image data based on the set value.
The automatic image correction circuit is a circuit that receives image data, such as still images or moving images, and automatically performs image correction on these image data. The automatic image correction circuit includes the resolution detection unit that detects resolutions of the received image data, i.e., a horizontal resolution and a vertical resolution. The resolution detection unit can detect resolutions from a clock signal and a data enable signal of the image data. Furthermore, the automatic image correction circuit includes the set value calculation unit. The set value calculation unit can calculate a set value, which is used to perform image correction, from the resolutions detected by the resolution detection unit. The image correction unit performs correction on image data with respect to, e.g., luminance based on the calculated set value. Therefore, a variety of settings, which are needed every resolution in the related art, can be automatically performed.
In the automatic image correction circuit according to the aspect of the invention, preferably, the set value calculation unit calculates a set value of a position of a sampling area, which is a part or the entire of the image data. Therefore, positional information of a region from which statistic values used to perform image correction will be calculated (hereinafter simply referred to as a “sampling area”) can be automatically calculated according to resolutions obtained by the resolution detection unit.
In the automatic image correction circuit according to the aspect of the invention, preferably, the set value calculation unit calculates the position of the sampling area, which is a part or the entire of the image data, on the basis of a horizontal resolution and a vertical resolution so that the sampling area is located at a central region of an image. A viewer generally sees a central region of an image. Therefore, if image data sampled from the central region are used for image correction, it is possible to perform effective image correction.
As a preferred example, the set value calculation unit sets the range of the sampling area, which is a part or the entire of the image data, to on value of the powers of 2. Therefore, it is possible to detect only bits set, and to reduce the size of the circuit.
In the automatic image correction circuit according to the aspect of the invention, preferably, the set value calculation unit calculates a lightness correction coefficient based on a horizontal resolution and a vertical resolution of the image data in a set value for correcting a brightness of the image data. Therefore, image data can be automatically set to an appropriate brightness every resolution.
In the automatic image correction circuit according to the aspect of the invention, preferably, the automatic image correction circuit further includes a storage unit that stores the resolution of a display panel, a resolution comparison unit that compares the resolution of the display panel and the resolutions of the image data, an image magnification process unit that magnifies the image data, and an image reduction process unit that reduces the image data. Further, the image correction unit performs image correction on image data that are obtained by reducing the image data by the image reduction process unit when the resolution of the display panel is smaller than the resolutions of the image data, and performs image correction on image data that are enlarged by the image magnification process unit when the resolution of the display panel is larger than the resolutions of the image data. The automatic image correction circuit further includes the resolution comparison unit. The resolution comparison unit stores the resolution of a display panel in advance and compares the resolution of the display panel with detected resolutions of image data. If the resolutions of the image data are greater than the resolution of the display panel, the image reduction process unit performs a reduction process on image data after a correction process is carried out. Meanwhile, if the resolutions of the image data are smaller than the resolution of the display panel, the image magnification process unit performs a magnification process on image data before a correction process is performed. Therefore, the three kinds of processes, such as the magnification process, the reduction process and the correction process, can be automatically performed on image data according to resolutions.
The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
The invention will now be described in detail in connection with preferred embodiments with reference to the accompanying drawings.
An automatic image correction circuit 100 according to a first embodiment of the invention will be described with reference to
Construction of Automatic Image Correction Circuit
The automatic image correction circuit 100 mainly includes a Low Voltage Differential Signal (LVDS) receiver 11, a resolution detector 25, an enhanced parameter selector 26, statistic value calculation unit 17, image correction blocks 50a and 50b, and a multiplexer 21.
The automatic image correction circuit 100 is a circuit that receives image data of still images or moving images, and automatically performs image correction on these image data on a frame basis. The automatic image correction circuit 100 mainly performs an image correction process for enhancing images to be displayed. Furthermore, the automatic image correction circuit 100 can be mounted in an electronic apparatus, etc., which has an image display unit. For example, in a portable telephone or a portable terminal having a liquid crystal panel, etc. as an image display unit, the automatic image correction circuit 100 can be installed within an image processor that supplies display image data to the image display unit or the driver of the liquid crystal panel.
The LVDS receiver 11 receives image data d1 that must be processed by the automatic image correction circuit 100, a clock signal CLK1 serving as a reference upon processing within the automatic image correction circuit 100, and a data enable signal de1 indicating the valid period of the image data d1 from the outside. The LVDS receiver 11 outputs data whose voltage is controlled as a small swing because EMI (Electroluminance Interference) is generated within the circuit if the image data d1 are output as a full swing voltage when the image data d1 are input at high speed. Furthermore, the received image data d1 are data of RGB form, e.g., data of 24 bits/pixels.
The LVDS receiver 11 divides the received image data d1 into image data d2a and image data d2b, and supplies those data to the image correction block 50a and the image correction block 50b, respectively. The LVDS receiver 11 also supplies a clock signal CLK2a and a clock signal CLK2b to the image correction blocks 50a and 50b, respectively.
The LVDS receiver 11 also supplies the clock signal CLK2b that has been supplied to the image correction block 50b and a data enable signal de1b, which indicates the valid period of the image data d2b, to the resolution detector 25. The data enable signal de1b is also supplied to the image display unit as a data enable signal de_out. In this case, the LVDS receiver 11 can also supply the clock signal CLK2a and the image data d2a, which have been supplied to the image correction block 50a, and a data enable signal of the image data d2a (not shown).
Furthermore, the LVDS receiver 11 can receive image data that have been divided into two groups from two systems. At this time, the LVDS receiver 11 can supply the image data d2a and d2b to the image correction blocks 50a and 50b, respectively, without dividing them. In addition, the automatic image correction circuit 100 is not limited to the construction in which the image data d1 are received by a single LVDS receiver 11, but may have a construction in which image data divided into plural groups are received by a plurality of LVDS receivers.
The resolution detector 25 detects a horizontal resolution and a vertical resolution of the image data d2b from the clock signal CLK2b and the data enable signal de1b, which are received from the LVDS receiver 11. The resolution detector 25 supplies the horizontal resolution and the vertical resolution of the image data d2b to the enhanced parameter selector 26 as resolution data k. Furthermore, the method of detecting a horizontal resolution and a vertical resolution in the resolution detector 25 will be described in detail below.
The enhanced parameter selector 26 generates a set value for image correction in the automatic image correction circuit 100 based on the resolution data k (i.e., the horizontal resolution and the vertical resolution of the image data d2b), which are received from the resolution detector 25. For example, the enhanced parameter selector 26 can calculate positional information of a region from which statistic values, which are used to perform image correction by the image correction blocks 50a and 50b, will be calculated (hereinafter simply referred to as a “sampling area”), from the horizontal resolution and the vertical resolution of the image data d2b. The sampling area is set to a position serving as a central region of an image. The calculated positional information of the sampling area is supplied as sampling area data Dsa_a and Dsa_b from the enhanced parameter selector 26 to the sum total data calculation units 16a and 16b. The enhanced parameter selector 26 can automatically perform a variety of settings, which were needed every resolution.
In another example of data generation of the enhanced parameter selector 26, a set value for correcting brightness is generated using the horizontal resolution and the vertical resolution of the image data d2b. The higher the resolution of an image, the smaller one pixel. It is, however, difficult to miniaturize a TFT element or a circuit for driving pixels accordingly in view of its electrical characteristics. Due to this, the aperture ratio of one pixel is lowered that much. It is therefore necessary to supplement lowered brightness according to a lowered aperture ratio by raising brightness as much as the aperture ratio is lowered. The enhanced parameter selector 26 calculates a coefficient for correcting such brightness (hereinafter simply referred to as a “lightness correction coefficient”), and supplies the generated lightness correction coefficient to correction amount calculation units 19a and 19b as set values Ds2a and Ds2b. Furthermore, the method of generating data in the enhanced parameter selector 26 will be described in detail below.
The automatic image correction circuit 100 performs an image correction process on the two image data groups d2a and d2b through the two blocks: the image correction block 50a and the image correction block 50b, respectively. That is, the automatic image correction circuit 100 performs an image correction process on the received image data d1 using a plurality of blocks. In particular, the image correction block 50a and the image correction block 50b calculate a gray level value histogram, a luminance sum total and a chroma sum total (i.e., “sum total data”) with respect to each of the input image data d2a and d2b and supply the sum total data to the statistic value calculation unit 17. The statistic value calculation unit 17 calculates statistic values of the image data from the sum total data and supplies the calculated statistic value to the image correction blocks 50a and 50b, respectively. In addition, the image correction blocks 50a and 50b find a correction amount based on the statistic value received from the statistic value calculation unit 17 and perform an image correction process on the image data using the correction amount. Image data d6a and d6b, which have experienced the image correction process through the image correction block 50a and the image correction block 50b, are supplied to the multiplexer 21.
The multiplexer 21 generates image data d7 by combining two image data d6a and d6b into one, and outputs the generated image data d7 to an image display unit (not shown) such as a Liquid Crystal Display (LCD) panel. The image display unit (not shown) displays the image data d7 received from the multiplexer 21.
Furthermore, the automatic image correction circuit 100 can output the two image data d6a and d6b to the image display unit without combining them. In this case, the automatic image correction circuit 100 may not include the multiplexer 21, and the image data d6a and d6b respectively output from the image correction blocks 50a and 50b are supplied to the image display unit without change.
An image process that is executed in the image correction blocks 50a and 50b and the statistic value calculation unit 17 will be described in detail below.
The image correction block 50a includes a YUV converter 15a, a sum total data calculation unit 16a, a correction amount calculation unit 18a, an image correction unit 19a, and a RGB converter 20a. In the same manner, the image correction block 50b includes a YUV converter 15b, a sum total data calculation unit 16b, a correction amount calculation unit 18b, an image correction unit 19b, and a RGB converter 20b.
The image data d2a and the clock signal CLK2a are input to the YUV converter 15a. The input image data d2b and the clock signal CLK2b are input to the YUV converter 15b. The YUV converters 15a and 15b convert the RGB type image data d2a and d2b into YUV type image data (YUV conversion). The YUV converters 15a and 15b supply YUV-converted image data d3a and d3b, which are obtained by the YUV conversion, to the image correction units 19a and 19b, respectively, and also supply YUV converted image data d4a and d4b to the sum total data calculation units 16a and 16b, respectively.
The sum total data calculation units 16a and 16b calculate sum total data for the received image data d4a and d4b. In particular, the sum total data calculation units 16a and 16b calculate a sampling area, i.e., a central region of an image from the image data d4a and d4b by using the sampling area data Dsa_a and Dsa_b that are received from the enhanced parameter selector 26. The sum total data calculation units 16a and 16b calculate a luminance sum total and a chroma sum total while generating a gray level value histogram from the data of the sampling area of the image data d4a and d4b. The reason why only a central region of an image not the whole image is used, as described above, is that as a viewer usually sees a central region of an image, it is effective to perform an image correction process based on image data of the central region. Sum total data Sum_a and Sum_b calculated as described above are output to the statistic value calculation unit 17.
The statistic value calculation unit 17 calculates statistic values Sta_a and Sta_b with respect to luminance and chroma of the image data d4a and d4b on the basis of the received sum total data Sum_a and Sum_b. In particular, the statistic value calculation unit 17 calculates statistic values, such as the highest value and the lowest value of luminance, the mean values of luminance and chroma, and standard deviation of luminance.
The statistic values Sta_a and Sta_b calculated as described above are supplied to the correction amount calculation units 18a and 18b. The correction amount calculation units 18a and 18b calculate the intensity of correction for image data (i.e., a correction amount) based on the received statistic values Sta_a and Sta_b, and set values Ds1a and Ds1b, which are received from the enhanced parameter selector 26. In particular, the correction amount calculation units 18a and 18b calculate a level correction coefficient, a gamma correction amount, a contrast correction amount, and a chroma correction amount. Signals Corr_a and Corr_b corresponding to the calculated correction amounts are output to the image correction units 19a and 19b. Furthermore, the correction amount calculation units 18a and 18b perform scene detection on image data, while calculating the correction amount.
The image correction units 19a and 19b are supplied with the set values Ds2a and Ds2b from the enhanced parameter selector 26, the correction amounts Corr_a and Corr_b from the correction amount calculation units 18a and 18b, and the YUV-converted image data d3a and d3b from the YUV converters 15a and 15b. The image correction units 19a and 19b perform an image correction process on the image data d3a and d3b on the basis of the correction amounts Corr_a and Corr_b and the set values Ds2a and Ds2b. In particular, the image correction units 19a and 19b perform correction processes, such as level correction, gamma correction, contrast correction, and chroma correction, on the image data d3a and d3b. Image data d5a and d5b, which have experienced the image correction process, are output to the RGB converters 20a and 20b.
The RGB converters 20a and 20b convert the received image data d5a and d5b of YUV form into data of RGB form (i.e., “RGB conversion”). The RGB converters 20a and 20b supply the RGB-converted image data d6a and d6b to the multiplexer 21. The multiplexer 21 outputs the image data d7 that is obtained by combining the two image data d6a and d6b into one.
As described above, the automatic image correction circuit 100 according to the first embodiment includes the resolution detector 25 and the enhanced parameter selector 26. The resolution detector 25 can detect resolutions of received image data, and the enhanced parameter selector 26 can automatically calculate set values, such as a sampling area and a lightness correction coefficient, based on the detected resolutions. As a result, the automatic image correction circuit 100 can automatically perform a variety of settings, which were needed on a resolution basis in the related art, and can perform an image correction process appropriate for respective image data.
Method of Detecting Horizontal Resolution and Vertical Resolution
A method of detecting a horizontal resolution and a vertical resolution, which is performed in the resolution detector 25, will be described below with reference to
The signals, which are input to and output from the horizontal resolution detection circuit 25h and the vertical resolution detection circuit 25v, will be described in more detail with reference to the timing chart shown in
The horizontal resolution detection circuit 25h counts one line period from the rise to the fall of the data enable signal of (g) of
The vertical resolution detection circuit 25v counts the line end flag Lef received from the horizontal resolution detection circuit 25h by using the vertical counter of (k) of
The horizontal resolution and the vertical resolution can be detected from the data enable signal de1b and the clock signal CLK2b, as described above. Even in the case where the data enable signal de1a and the clock signal CLK2a are used, a horizontal resolution and a vertical resolution can be obtained through this method. Furthermore, the method of detecting a horizontal resolution and a vertical resolution in the resolution detector 25 is not limited to the above method. It is to be understood that the horizontal resolution and the vertical resolution can be detected by other methods. The horizontal resolution and the vertical resolution detected by the resolution detector 25 are supplied to the enhanced parameter selector 26 as the resolution data k.
Method of Calculating Sampling Area
The enhanced parameter selector 26 generates parameter data for performing the setting of image correction in the automatic image correction circuit 100 by using the resolutions detected by the resolution detector 25.
A method of calculating a sampling area in the enhanced parameter selector 26 will be first described.
In
In
In a first embodiment, the highest values of the powers of 2, which do not exceed the values of the horizontal resolution and the vertical resolution received from the resolution detector 25, respectively, are set to the length sh of the sampling area Samp1 in the horizontal direction and the length sv of the sampling area Samp1 in the vertical direction. When the highest values are converted to binary numbers, it is possible to detect only bits having a logic level 1, that is, bits set, and to reduce the size of the circuit. That is why the powers of 2 are used. Furthermore, the reason why the highest values are used is that a greater amount of data needs to be sampled in order to increase detection accuracy in each image.
The relation among the horizontal resolution hsc, the vertical resolution vsc, the length sh of the sampling area Samp1 in the horizontal direction, and the length sv of the sampling area Samp1 in the vertical direction is shown in
The position of the sampling area is then decided. In the first embodiment, the coordinates of the point Sa1a (Sa1a—x, Sa1a—y) and the point Sa1b (Sa1b—x, Sa1b—y), which are defined as two points on the diagonal line of the sampling area on the image G1 can be decided using the following equations.
Sa1a—x=(hsc−sh)/2 (1)
Sa1a—y=(vsc−sv)/2 (2)
Sa1b—x=Sa1a—x+sh (3)
Sa1b—y=Sa1a—y+sv (4)
Equations (1) to (4) are calculation equations for locating a sampling area at a central region of an image. In other words, the method of calculating the position of a sampling area is not limited to the above, but can include any calculation method of enabling a sampling area to be placed at a central region of an image.
In the automatic image correction circuit 100 according to the first embodiment, the LVDS receiver 11 divides the image data d1 into two groups, and two blocks; the image correction block 50a and the image correction block 50b respectively perform an image correction process on the image data d2a and d2b, which are obtained by dividing the image data d1 into two groups. At this time, the LVDS receiver 11 divides the image data d1 into odd-numbered dot clocks and even-numbered dot clocks.
At this time, the resolution detector 25 is supplied with the data enable signal de1b and the clock signal CLK2b of the image data GI2b that are input to the image correction block 50b. Therefore, the image data GI2b become a valid sampling pixel.
By finding the point Sa1a and the point Sa1b from the horizontal resolution hsc, the vertical resolution vsc, the length sh of the sampling area in the horizontal direction, and the length sv of the sampling area in the vertical direction, as described above, the position of the sampling area can be automatically decided. Information on the position of the sampling area obtained as described above is supplied to the sum total data calculation units 16a and 16b as the sampling area data Dsa_a and Dsa_b.
Method of Calculating Lightness Correction Coefficient
A method of calculating a lightness correction coefficient in the enhanced parameter selector 26 will now be described.
Therefore, in a first embodiment, an image correction operation for supplementing decreased brightness, which is incurred by the reduction in the aperture ratio of a pixel in an image with a high resolution, is performed. In particular, a coefficient, i.e., a lightness correction coefficient for supplementing such decrease in brightness using a horizontal resolution and a vertical resolution of image data, which are detected by the resolution detector 25, is calculated.
The lightness correction coefficients calculated in the above-mentioned manner are supplied to the image correction units 19a and 19b as the set values Ds2a and Ds2b. However, the calculated lightness correction coefficients can be supplied to the image correction units 18a and 18b as the set values Ds1a and Ds1b. Therefore, the automatic image correction circuit 100 can automatically correct the brightness of an image according to the lightness correction coefficients, and can display an image at a proper brightness every resolution.
In the first embodiment, the automatic image correction circuit having two image correction blocks has been described. The invention is, however, not limited to the above embodiment. The resolution correction unit and the enhanced parameter selector can be assembled even in an automatic image correction circuit having one image correction block. Furthermore, in the first embodiment, a sampling area and a lightness correction coefficient have been described as enhanced parameters. The invention is, however, not limited to the above example. A user can decide enhanced parameters, such as other image correction coefficients using detected resolutions of image data.
In a second embodiment, the above-described resolution detector is further provided outside the automatic image correction circuit 100 according to the first embodiment so that images can be automatically enlarged or reduced.
The automatic image correction circuit 500 includes the automatic image correction circuit 100 according to the first embodiment, an image magnification processor 110 that enlarges an image, an image reduction processor 120 that reduces an image, an image display device 130, and a resolution detector 25.
The input side of the automatic image correction circuit 100 is connected to the image magnification processor 110. The output side of the automatic image correction circuit 100 is connected to the image reduction processor 120.
The image display device 130 is connected to the image reduction processor 120. The resolution detector 25 is connected to the image magnification processor 110 and the image reduction processor 120.
The resolution detector 25 detects the horizontal resolution and the vertical resolution of received image data d0 from a clock signal CLK0 and a data enable signal de0 of the received image data d0. The resolution detector 25 has the display resolution of the image display unit 130 previously stored therein. If the resolutions are smaller than the display resolution, the resolution detector 25 supplies a control signal S_out1 to the image magnification processor 110 so that the magnification process can be performed. If the resolutions are greater than the display resolution of the image display unit 130, the resolution detector 25 supplies a control signal S_out2 to the image reduction processor 120 so that the reduction process can be performed.
If the control signal S_out1 is received from the resolution detector 25, the image magnification processor 110 performs the image magnification process on the received image data d0 and supplies the processed result to the automatic image correction circuit 100 as image data D_in1.
If the control signal S_out2 is received from the resolution detector 25, the image reduction processor 120 performs the image reduction process on the image data D_out1 received from the automatic image correction circuit 100 and outputs the processed result to the image display apparatus 130 as image data D_out2.
In the case where image data are enlarged or reduced by using the automatic image correction circuit 500, the automatic image correction circuit 100 performs an enhancement process on the image data after the magnification process or before the reduction process. This is because, in the case of the image magnification process, it is appropriate to perform the enhancement process after information of original image data is enlarged. Meanwhile, this is because, in the case of the image reduction process, it is appropriate to perform the reduction process on the image data after the enhancement process is performed. For this reason, in the automatic image correction circuit 500 according to the second embodiment, the image magnification processor 110 is connected to the input side of the automatic image correction circuit 100 and the image reduction processor 120 is connected to the output side of the automatic image correction circuit 100.
The method of enlarging or reducing image data in the image magnification processor 110 or the image reduction processor 120 will be described below in detail. In the case where the magnification process or the reduction process is performed on received image data, image data after the process need to be found by interpolation from image data of a lattice point around the received image data on the received image data. Hereinafter, three kinds of methods including the nearest neighbor interpolation method, the bi-linear interpolation method and the cubic convolution interpolation method will be described as several examples of the method of finding image data after conversion.
It is assumed that coordinates of image data after conversion, i.e., coordinates of points of a pixel to be interpolated are (u, v) and image data after conversion is P. It is also assumed that pixels of image data before conversion are sequentially numbered in order of a X direction and a Y direction, the number of the X direction is i, the number of the Y direction is j, and the positions of the pixels at these points are indicated by Pij.
P=Pij (5)
i=[u+0.5] (6)
j=[v+0.5] (7)
This method is advantageous in that input image data can be kept intact and an algorithm can be simplified although error of a maximum ½ pixel occurs.
This method is advantageous in that an image can be smoothed because of averaging.
This method is advantageous in that an image can be smoothed and sharpened.
The image magnification processor 110 or the image reduction processor 120 uses the above-described method and can thus obtain image data after magnification conversion or reduction conversion from input image data. The invention is, however, not limited to the above method, but can include other methods capable of finding image data after magnification conversion or reduction conversion.
The image magnification/reduction processes will be described below with reference to the flowchart of
Meanwhile, if it is determined that the detected resolutions of the image data d0 are smaller than the display resolution of the image display unit 130 (step S2: No), the resolution detector 25 supplies the control signal S_out1 to the image magnification processor 110 so that the magnification process can be performed. The image magnification processor 110 performs the magnification process on the image data d0 and outputs the processed result to the image correction circuit 100 as the image data D_in1 (step S5). Thereafter, the image data D_in1 are input to the image correction circuit 100 and then undergo the enhancement process (step S6). The image reduction processor 120 receives the image data D_out1, which have experienced the enhancement process, from the image correction circuit 100, and then outputs the image data D_out1 to the image display apparatus 130 as the image data D_out2 without performing any process. As described above, the resolutions of the image data are detected, and the detected resolutions are compared with the resolution of the display panel. It is thus possible to automatically decide which one of the magnification process and the reduction process will be performed.
Electronic Apparatus
Hereinafter, an example of an electronic apparatus to which the automatic image correction circuit 100 or 500 of the invention is applied will be described.
The display information output source 411 includes a memory such as Read Only Memory (ROM) or Random Access Memory (RAM), a storage unit such as a magnetic recording disk or an optical recording disk, and a tuning circuit that outputs a digital image signal in a synchronous manner. The display information output source 411 is constructed to supply display information, such as an image signal of a predetermined format, to the display information processing circuit 412 according to various clock signals generated by the timing generator 414.
The display information processing circuit 412 includes a variety of known circuits, such as a serial/parallel conversion circuit, an amplification/inversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit. The display information processing circuit 412 processes received display information, and supplies the processed image information to the driving circuit 402 along with a clock signal CLK. The driving circuit 402 includes a scanning line driving circuit, a data line driving circuit, and a test circuit. Furthermore, the power supply circuit 413 supplies a predetermined voltage to each of the above-mentioned elements.
Concrete examples of the electronic apparatus to which the invention is applied will be described with reference to
An example in which the automatic image correction circuit 100 or 500 according to the invention is applied to a portable personal computer (so-called a notebook computer) will be described.
An example in which the automatic image correction circuit 100 or 500 according to the invention is applied to a portable telephone will be described below. FIG. 15B is a perspective view illustrating the construction of the portable telephone. As shown in
Furthermore, electronic apparatuses to which the automatic image correction circuit 100 according to the invention can be applied may include a liquid crystal television, a video phone, and so on.
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