Number | Name | Date | Kind |
---|---|---|---|
5452224 | Smith, Jr. et al. | Sep 1995 | A |
5706206 | Hammer et al. | Jan 1998 | A |
5999010 | Arora et al. | Dec 1999 | A |
6009252 | Lipton | Dec 1999 | A |
6212666 | Gohl et al. | Apr 2001 | B1 |
6272664 | Chang et al. | Aug 2001 | B1 |
6467068 | Iyer et al. | Oct 2002 | B1 |
Entry |
---|
“Verification of Circuits Described in VHDL Through Extraction of Design Intent,” Hoskote et al., Proceedings of the Seventh Int'l Conference of VLSI Design, IEEE, Jan. 1994, pp. 417-420. |
“Efficient Net Extraction for Restricted Orientation Designs (VLSI Layout),” Lopez et al., IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Sep. 1996, vol. 15, Issue: 9 ISSN: 0278-0070; pp. 1151-1159. |