Patent Application
20240128392
The invention relates to a backside emitter solar cell structure having a heterojunction, having
A method for producing a solar cell having a heterojunction and a frontside emitter is known from publication EP 2 682 990 A1. In the known method, a layer stack consisting of a frontside amorphous intrinsic semiconductor layer and a frontside amorphous doped semiconductor layer is first deposited on a front side of a semiconductor substrate having a doping of a first conductivity type. The frontside amorphous doped semiconductor layer has a doping of a second conductivity type, which is opposite to the first conductivity type. A layer stack consisting of a backside amorphous intrinsic semiconductor layer and a backside amorphous doped semiconductor layer is then deposited on the back side of the semiconductor substrate. The backside amorphous doped semiconductor layer has a doping of the same conductivity type as the semiconductor substrate.
Then a transparent, electrically conductive layer is deposited on the frontside as an anti-reflection layer without structuring and then an electrically conductive backside coating is applied to the back side via a mask, so that the electrically conductive backside coating is not deposited on the layer stack formed on the substrate edge and therefore no electrically conductive layer electrically contacts on the substrate edge. Finally, frontside and backside contacts are created.
This layer application sequence results in a layer sequence having alternating doping on the edge of the substrate side, that is to say an n−p−n+ or a p−n−p+ sequence, each with an antireflection layer thereon. In the document EP 2 682 990 A1 it is pointed out that the layer deposition sequence described must be adhered to in order to achieve advantageous edge insulation in the solar cell to be formed. In particular, the frontside layer stack, which consists of the frontside amorphous intrinsic semiconductor layer and the frontside amorphous doped semiconductor layer, must be deposited in front of the backside layer stack, which consists of the backside amorphous intrinsic semiconductor layer and the backside amorphous doped semiconductor layer, in order to avoid the occurrence of shunt resistance on the solar cell edge.
To avoid undesirable solar cell edge shunts on a frontside emitter solar cell structure having a heterojunction, the document JP 2001044461 A first suggests the layer stack consisting of a backside amorphous intrinsic semiconductor layer and a backside amorphous doped semiconductor layer only in a region that is smaller than the semiconductor substrate area at a distance from the substrate edge. Only then should the layer stack consisting of a frontside amorphous intrinsic semiconductor layer and a frontside amorphous doped semiconductor layer be deposited on the front side of the substrate.
A similar procedure is also described in US 2017/0207351 A1.
In contrast to the prior art mentioned above, the present invention is based on a heterojunction solar cell structure having a backside emitter. Such solar cells have the advantage over heterojunction solar cells having a frontside emitter that less stringent requirements must be placed on the optoelectric properties of the electrically conductive, transparent frontside conduction layer and on the design of the frontside contact.
In the case of such backside emitter heterojunction solar cells, it is customary in the prior art to first deposit the intrinsic semiconductor layer and the amorphous semiconductor layer doped having the same conductivity type as the semiconductor substrate on the frontside of the substrate intended for incidence of light, and only then to form the intrinsic semiconductor layer and the amorphous semiconductor layer doped differently than the semiconductor on the back side of the substrate.
However, it has been shown that the known shunt resistance and reverse current can assume considerable values in the known backside emitter heterojunction solar cells, and the solar cell characteristic suffers from this.
It is therefore the object of the present invention to improve the electrical solar cell properties of backside emitter heterojunction solar cells.
This object is achieved by a backside emitter solar cell structure having a heterojunction, wherein on one side edge of the backside emitter solar cell structure having heterojunction, on an edge region of a crystalline semiconductor substrate of the backside emitter solar cell structure having heterojunction having a doping of a first conductivity type, there is a layer sequence with a double intrinsic layer formed.
Said backside emitter solar cell structure having a heterojunction is produced by a method for producing a backside emitter solar cell structure having a heterojunction, wherein
Producing the at least one backside intrinsic layer on the backside of the semiconductor substrate;
Surprisingly, this means that in the method according to the invention, first the intrinsic amorphous semiconductor layer on the backside of the substrate, that is to say the backside intrinsic layer, is produced, then the intrinsic amorphous semiconductor layer and the doped amorphous semiconductor layer on the front side of the substrate and only then the amorphous semiconductor layer doped differently than the semiconductor substrate, that is to say the frontside doping layer on which the front side of the substrate is produced, significantly improves the shunt resistance and the reverse current in all solar cells produced according to the invention. Thermographic measurements have also shown that the leakage current over substrate edges is greatly reduced by the sequence of the method according to the invention. In addition, the quality of the passivation of the solar cells produced according to the invention increases, which is shown in a higher open circuit voltage and a better fill factor of the backside emitter heterojunction solar cells. In addition, the solar cell efficiency is increased by the method.
In a preferred variant of the method, an n-doped semiconductor substrate is used as the semiconductor substrate, an amorphous semiconductor material doped with phosphorus is used to produce the frontside doping layer, and an amorphous semiconductor material is used to produce the backside doping layer. Since boron diffuses faster than phosphorus and therefore spreads faster than phosphorus in the system for producing the backside emitter solar cell structure having heterojunction, the deposition of the boron-doped backside doping layer as the last layer has a particularly positive effect on the cleanliness of the system in the deposition of the amorphous layers.
In a preferred embodiment of the method, the generation of the at least one frontside intrinsic layer on the front side of the semiconductor substrate and the generation of the at least one frontside doping layer on the at least one frontside intrinsic layer are carried out in processes which take place directly in succession in one and the same layer deposition reactor. As a result, only a single layer deposition reactor is required for the production of the frontside intrinsic layer and the frontside doping layer, which overall simplifies and makes the device for producing the backside emitter solar cell structure having heterojunction more economical.
In addition, there is a particularly good edge insulation of the backside emitter solar cell structure having heterojunction produced according to the invention if the at least one electrically conductive, transparent backside conduction layer is deposited on the at least one backside doping layer at a distance from the side edge of the semiconductor substrate, so that an edge region on the backside is not coated with the electrically conductive, transparent backside conduction layer and in all method steps for forming the electrically conductive, transparent backside conduction layer there is no electrical contact between the electrically conductive, transparent backside conduction layer and the frontside conduction layer.
The backside emitter solar cell structure having a heterojunction has
Due to the layer structure on the side edge, i.e. the edge region of the backside emitter solar cell structure, there is a significant improvement in the shunt resistance and the reverse current of the solar cells produced according to the invention compared to backside emitter solar cell structures which have a conventional layer structure on their side edge, in which the layers from inside out are in the following order or overlap in the following order:
In a preferred embodiment of the backside emitter solar cell structure having heterojunction, the semiconductor substrate is an n-doped semiconductor substrate, the frontside doping layer is doped with phosphorus and the backside doping layer is doped with boron.
An advantageous embodiment of the backside emitter solar cell structure having heterojunction is constructed in such a way that the at least one electrically conductive, transparent backside conduction layer is deposited on the at least one backside doping layer at a distance from the side edge of the semiconductor substrate, so that an edge region on the back side is not coated with the electrically conductive, transparent backside conduction layer and there is no electrical contact between the electrically conductive, transparent backside conduction layer and the frontside conduction layer.
The backside emitter solar cell structure having a heterojunction is preferably produced by a device for producing a backside emitter solar cell structure having a heterojunction, having
In contrast to the prior art, in the device, the semiconductor substrate first passes through the first layer deposition strand having the at least one layer deposition reactor for producing the at least one backside intrinsic layer, is then turned over, only after that the second layer deposition strand having the at least one layer deposition reactor for producing the at least one frontside intrinsic layer fed to the frontside of the semiconductor substrate and for producing the at least one frontside doping layer on the at least one frontside intrinsic layer, then turned over again and only finally transported into the third layer deposition strand having the at least one layer deposition reactor for producing the at least one backside doping layer on the at least one backside intrinsic layer.
In a preferred embodiment of the device, the first layer deposition strand has a backside intrinsic layer deposition reactor for producing the at least one backside intrinsic layer on the back side of the semiconductor substrate; the second layer deposition strand has a single frontside layer deposition reactor for producing the at least one frontside intrinsic layer on the frontside of the semiconductor substrate and the at least one frontside doping layer on the at least one frontside intrinsic layer; and the third layer deposition strand has a backside doping deposition reactor for producing the at least one backside doping layer on the at least one backside intrinsic layer; and the at least one substrate transport and turning system is provided upstream of the frontside layer deposition reactor before or in the second layer deposition strand.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a Backside emitter solar cell structure having a heterojunction, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
In the figures, the side of the respective layer structure shown above is the front side and the side shown below is the back side of the respective layer structure. The front side is the side into which light is provided in the finished backside emitter solar cell structure 1.
The air oxide layers 21, 22 in the example shown are SiO2 layers having a thickness between 0.2 and 3.0 nm.
The air oxide layers 21, 22 automatically form in the atmosphere on the previously cleaned semiconductor substrate 2. The semiconductor substrate 2 forms an absorber in the finished backside emitter solar cell structure 1.
During charging, both sides of the semiconductor substrate 2 are exposed to the atmosphere at temperatures of typically below 200° C., so that air oxide layers 23, 24, that is to say here SiO2 layers having a thickness of 0.2 to 3.0 nm, again form on the front side and the back side of the semiconductor substrate 2 or the air oxide layers 21, 22 grow by the thickness of the air oxide layers 23, 24.
In a further process step of the method, shown schematically in
In the step shown in
After the backside intrinsic layer 3 has been deposited, at least one frontside intrinsic layer 4 made of at least one amorphous intrinsic semiconductor material and at least one frontside doping layer 5 made of at least one amorphous semiconductor material having a doping of the first conductivity type which is higher than the doping of the semiconductor substrate 2, are deposited on the front side of the semiconductor substrate 2 with the layers 21, 23, 25 thereon. This can be seen in
The frontside intrinsic layer 4 can be deposited separately from the frontside doping layer 5 in different layer deposition reactors. However, it is particularly advantageous if, as has been done in the exemplary embodiment shown, the frontside doping layer 5 is deposited directly after the frontside intrinsic layer 4 in one and the same layer deposition reactor without intermediate substrate handling. In this case, formation of air oxide between the frontside intrinsic layer 4 and the frontside doping layer 5 is avoided.
In the case of the substrate handling required after this layer deposition or these layer depositions, during which a substrate transport to the next layer deposition reactor takes place and the substrate is turned again, the layer structure produced and shown schematically in
After a further substrate handling, a backside doping layer 6 is produced from an amorphous semiconductor material having a doping of a second conductivity type, which is opposite to the first conductivity type, on the back side of the layer arrangement shown in
The layer structure from
Thereafter, as is shown schematically in
In the exemplary embodiment shown, the electrically conductive, transparent backside conduction layer 8 is deposited on the at least one backside doping layer 6 at a distance from the side edge 50 of the semiconductor substrate 2. The backside doping layer 6 can be deposited, for example, via a mask. As a result, an edge region 51 on the back side of the backside emitter solar cell structure 1 having a heterojunction from the electrically conductive, transparent backside conductor layer 8 remains uncoated. Due to the structured deposition, there is no electrical contact between the electrically conductive, transparent backside conduction layer 8 and the frontside conduction layer 7, not even during the deposition of the electrically conductive, transparent backside conduction layer 8.
Finally, frontside and backside contacts 9, 10 are produced on the electrically conductive, transparent frontside and backside conduction layers 7, 8, respectively. In the exemplary embodiment shown, the frontside and backside contacts 9, 10 are made of silver and are provided in finger shape on the front side and back side of the solar cells. However, they can also be formed from another, electrically conductive material and/or applied in a different form.
As can be seen from the above statements, with each substrate transport air oxide layers 21, 22, 23, 24, 25, 26, 27, 28, 29, 30 arise, which form barriers between the semiconductor substrate 2 and the intrinsic layers 3, 4 deposited thereon, between the backside intrinsic layer 4 and the backside doping layer 6 as well as between the frontside and backside doping layers 5, 6 and the respectively frontside and backside conduction layers 7, 8 deposited thereon. These barriers hinder the conductor carrier transport and thus deteriorate the solar cell properties of the backside emitter solar cell structure 1 to be formed having a heterojunction. As described above, by depositing the frontside doping layer 5 directly after the frontside intrinsic layer 4 in the same layer deposition reactor, such a barrier formation between the frontside intrinsic layer 4 and the frontside doping layer 5 could be avoided.
Furthermore, the process step sequence according to the invention, in which the boron-doped backside doping layer 6 is deposited as the last of the amorphous semiconductor layers, limits the outdiffusion of boron, which has a higher diffusion coefficient than the phosphorus contained in the frontside doping layer 5, from the backside doping layer 6 to a minimum. This also advantageously influences the solar cell properties of the backside emitter solar cell structure 1 to be formed having a heterojunction.
As can be seen schematically in
Starting from the n-doped semiconductor substrate 2 in the illustrated embodiment, a n−i−i−n+−p layer sequence results at the edge of the solar cell. In contrast, in the prior art, the conventional process sequence results in an n−i−n+−i−p layer sequence. The double intrinsic layer 3, 4 on the edge or on the side edge of the semiconductor substrate 2 seems to protect the formed structure particularly against the formation of shunt resistances and leakage currents at the edge of the solar cell.
In a first layer deposition strand 31, at least one layer deposition reactor 36 is provided for producing the at least one backside intrinsic layer 3 on the back side of the semiconductor substrate 2.
In a second layer deposition strand 32 or 42, there is at least one layer deposition reactor 39, 41; 44 for producing the at least one frontside intrinsic layer 4 on the front side of the semiconductor substrate 2 and for producing the at least one frontside doping layer 5 on the at least one frontside intrinsic layer 4. In the device 40, the second layer deposition strand 42 has only a single frontside layer deposition reactor 44 for producing the at least one frontside intrinsic layer 4 on the front side of the semiconductor substrate 2 and the at least one frontside doping layer 5 on the at least one frontside intrinsic layer 4.
In a third layer deposition strand 33, at least one layer deposition reactor 43 is provided for producing the at least one backside doping layer 6 on the at least one backside intrinsic layer 3.
A substrate transport and turning system 37 is provided in each case between the first layer deposition strand 31 and the second layer deposition strand 32 or 42 and between the second layer deposition strand 32 or 42 and the third layer deposition strand 33. In the devices 30, 40, only a single substrate transport and turning system 37 is provided, which is located in front of the frontside layer deposition reactor(s) 39, 41 and 44, respectively.
A lock device 45 is provided between and in front of the individual layer deposition reactors.
A loading and unloading device 35 is provided at the beginning of each layer deposition strand 31, 32 and 42, 33.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10 2019 123 758.8 | Sep 2019 | DE | national |
This application is a continuation of patent application Ser. No. 18/164,779, filed Feb. 6, 2023, which is a continuation of patent application Ser. No. 17/633,974, filed Feb. 9, 2022; which was a § 371 national stage filing of international application No. PCT/IB2020/057263, filed Jul. 31, 2020, which designated the United States; this application also claims the priority, under 35 U.S.C. § 119, of German patent application No. DE 10 2019 123 758.8, filed Sep. 5, 2019; the prior applications are herewith incorporated by reference in their entirety.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 18164779 | Feb 2023 | US |
| Child | 18397216 | US | |
| Parent | 17633974 | Feb 2022 | US |
| Child | 18164779 | US |
