This application claims the benefit of CN application No. 20112093755.2, filed on Apr. 1, 2011, and incorporated herein by reference.
The disclosed invention relates to electrical circuit, and more particular relates to electrical ballast and associate control circuit.
Fluorescent lamp ballast is a device used to provide the starting voltage and/or to stabilize the current in a circuit. In general, the fluorescent lamp ballast comprises three states, which are preheat state, ignition state, and burn state. In preheat state, the filaments of the lamp are heated. And the voltage across the lamp is relatively low. In ignition state, the voltage across the lamp is relatively high configured to ignite the lamp. In burn state, the voltage across the lamp is relatively low again.
According to above requirement, a half-bridge structure that working at resonance mode is preferred in a ballast. Commonly, there are two methods for preheating. One is current preheat mode, and the other one is voltage preheat mode.
As shown in
When the lamp is ignited, the filament equals to the combination of resistors R, R1 and R2. As shown in
The operating principle of the voltage preheat mode is similar to the current preheat mode. The difference is that a transformer is applied to transfer energy for preheating the filament in
Because of the relationship among the three coils Ta, Tb and Tc, energy flows through the filament when the lamp is in burn-state. The power consumption on resistors R1 and R2 could not be converted into light. Thus the efficiency of the ballast is lowered.
In order to save power consumption of R1 and R2 in burn state, a cut-off circuit is applied to stop preheat circuit in burn-state.
In preheat state, switch M3 turns on. Then the energy transferred by the transformer could heat the filament. When preheating is over, switch M3 turns off, and the transformer stops operating. The filament resistance is no longer heated, and thus the efficiency of the ballast might be improved.
Usually an integrated circuit (IC) may be utilized as a ballast control circuit to generate control signals to the switches and to provide protection for preventing damage from abnormal state. The preheat cut-off circuit shown in
One embodiment of the present invention discloses a ballast control circuit to control a ballast. The ballast control circuit comprises a multi function pin, a preheat cut-off control circuit, and an over-voltage protection circuit. Wherein the multi function pin may be coupled to a voltage sense circuit configured to receive a sensed output voltage signal, and wherein the multi function pin is further coupled to a control end of a first switch, and further wherein the first switch is coupled between a primary coil of a transformer and a reference ground. The preheat cut-off control circuit may be coupled to the multi function pin, configured to control the first switch, wherein the preheat cut-off control circuit turns on the first switch in a preheat state of the ballast, and wherein the preheat cut-off control circuit turns off the first switch at the end of the preheat state. The over-voltage protection circuit may be coupled to the multi function pin, configured to receive the sensed output voltage signal and wherein after the preheat state, the over-voltage protection circuit is configured to disable the ballast when the sensed output voltage signal is larger than a first threshold.
Non-limiting and non-exhaustive embodiments are described with reference to the following drawings. The drawings are only for illustration purpose.
The use of the same reference label in different drawings indicates the same or like components.
The following description and discussion about specific embodiments of the present invention is for purposes of illustration. However, one with ordinary skill in the relevant art should know that the invention is not limited by the specific examples disclosed herein. Variations and modifications can be made on the apparatus, methods and technical design described above. Accordingly, the invention should be viewed as limited solely by the scope and spirit of the appended claims.
The term “couple” hereby and in the following text indicates that an element is directly connected to another element or connected with another element through one or more mediate element. On the contrast, the term “directly connect” hereby and in the following text indicates that an element is connected to another element without any mediate element.
It should be understood that although “first,” “second,” “third” and other ordinal number are applied to describe certain elements, components or parts, these elements, components or parts are not limited by such ordinal numbers. The ordinal numbers hereby and in the following text are for the purpose of distinguishing only.
Embodiments of the present invention disclose a method of applying one pin to achieve both preheat cut-off function and over-voltage protection function. It may decrease the number of IC pins and thus lower the cost and minimize the device of periphery circuit.
Continuing in
The ballast control circuit 50 comprises: a controller 501, wherein the controller 501 comprises a first output end and a second output end, wherein the first output end is coupled to an oscillator 502 configured to regulate the oscillation frequency of an oscillator 502, and wherein the second output end generates a preheat control signal 56 to indicate whether the ballast is in preheat state; oscillator 502, comprising an input end and an output end, wherein the input end is coupled to the first output end of controller 501, and wherein the output end is coupled to the driver signals G1 and G2 configured to control the switches M1 and M2 to operate alternatively; the preheat cut-off control circuit 51, comprising an input end 515, a first output end 516 and a second output end 517, wherein the input end 515 is coupled to the second output end of controller 501 and wherein the first output end 516 is coupled to the multi function pin MUL configured to turn the switch M3 on and off according to the preheat control signal 56; the over-voltage protection circuit 52, comprising a first input end, a second input end, and an output end, wherein the first input end is coupled to the multi function pin MUL configured to receive the output voltage signal Vc4 sensed by the voltage sense circuit 513, and wherein the second input end is coupled to the first threshold voltage Vth1, the over-voltage protection circuit 52 disabling the driver signals G1 and G2 when the sensed output voltage signal Vc4 is larger than the first threshold voltage Vth1; an OR gate 507, comprising a first input end, a second input end and an output end, wherein the first input end is coupled to the second output end 517 of the preheat cut-off control circuit 51, and wherein the second input end is coupled to the output end of the over-voltage protection circuit 52; and an AND gate 503, comprising a first input end, a second input end and an output end, wherein the first input end is coupled to the output end of the OR gate 507, and wherein the second input end is coupled to the output end of the oscillator 502, and wherein the output end is coupled to the gates of switches M1 and M2.
The preheat cut-off control circuit 51 comprises: a switch S1, having an first end which is coupled to the power supply voltage Vcc, wherein the switch S1 is controlled by the preheat control signal 56; a switch S2, wherein a source electrode of the switch S2 is connected to the reference ground and wherein a drain electrode of the switch S2 is coupled with the multi function pin MUL; a resistor R5, coupled between a second end of the switch S1 and the drain electrode of the switch S2; a first flip-flop 511, wherein an output end of the first flip-flop 511 is coupled to a gate electrode of the switch S2; a second flip-flop 509, wherein a S end of the second flip-flop 509 receives a pulse reset signal when the preheat state is beginning, and wherein an output end of the second flip-flop 509 coupled to the first input end of the OR gate 507 serves as the second output end 517 of the preheat cut-off control circuit 51; a second comparator 510, wherein a non-inverting input end of the second comparator 510 is coupled to a second threshold voltage Vth2, and wherein an inverting input end of the second comparator 510 is coupled to the multi function pin MUL, and, where an output end of the second comparator 510 is coupled to R ends of the first flip-flop 511 and the second flip-flop 509 respectively; an inverter 506, wherein an input end of the inverter receives a preheat control signal 56 from the controller 501, and wherein an output end is coupled to a S end of the first flip-flop 511 through a one shot circuit 512; One shot circuit 512, generating a pulse reset signal at the end of the preheat state according to the output of the inverter 506.
The over-voltage protection circuit 52 comprises: a first comparator 508, wherein an inverting input end of the first comparator 508 is coupled to the pin MUL and wherein a non-inverting input end of the first comparator 508 receives the first threshold voltage Vth1, and wherein an output end of the first comparator 508 is coupled to the second input end of the OR gate 507.
The first threshold Vth1 is larger than the second threshold voltage Vth2. The Vth1 which decides the over-voltage point is set according to the values of C2, C3, R3 and R4. The second threshold voltage Vth2 is smaller than the Vth1, e.g., 200 mV. The second threshold voltage Vth2 represents the reset voltage portion of the voltage Vc4 on the capacitor C4 at the end of preheat state.
The following table is the truth table of the first flip-flop 511 and the second flip-flop 509:
As shown in
The ballast control circuit 50 further comprises: a first driver circuit 505, wherein an input end of the first driver circuit 505 is coupled to the output end of the AND gate 503, and wherein an output end of the first driver circuit 505 is coupled to the gate electrode of the switch M1; and a second driver circuit 504, wherein an input end of the second driver circuit 504 is coupled to the output end of the AND gate 503 and wherein an output end of the second driver circuit 504 is coupled to the gate electrode of the switch M2.
Seen in
At the beginning of the preheating, the S end of the second flip-flop 509 is provided a pulse reset signal, which makes the output voltage V3 of the flip-flop 509 is in high level. Since Vc4>Vth2 in preheat state, the second comparator 510 generates a low level voltage signal to the R end of the second flip-flop 509. Thus the output voltage V3 of the second flip-flop 509 is kept in high level and the output voltage V4 of the OR gate 507 is also in high level. The driver signal V6 is transmitted to the gate electrodes of the switches M1 and M2. Although during the period t2˜t3 (preheat state), Vc4>Vth1, the over-voltage protection circuit 52 is disabled because the output voltage V2 of the first comparator 508 could not generate a low level output signal on the OR gate 507.
During the period t3˜t4, the preheat state is over. The preheat control signal 56 changes into low level, and thus the switch S1 turns off. The one-shot circuit 512 generates a pulse reset signal to the S end of the first flip-flop 511 according to the rising-edge of the inverted preheat control signal 56. Meanwhile Vc4>Vth2, so the second comparator 510 generates a low level voltage to the R end of the first flip-flop 511. The output end Q of the first flip-flop 511 generates a high level voltage V5 to turn the switch S2 on. The capacitor C4 begins to discharge to the reference ground through the switch S2 and then the Vc4 is decreased smaller than Vth2 at the moment t5. As Vc4<Vth2, the second comparator 510 generates a high level voltage to the R ends of the first flip-flop 511 and the second flip-flop 509. And the S end of the first flip-flop is in low level. The output voltage V5 of the first flip-flop 511 turns to low level to cut the switch S2 off. At the same time, the S end of the second flip-flop 509 is in low level, therefore the output voltage V3 of the second flip-flop 509 is in low level. The output voltage V4 of the OR gate 507 depends on the output voltage V2 of the first comparator 508, and thus the over-voltage protection circuit 52 is enabled.
At this moment, the preheat state is over. Vc4 is applied as a sensed output voltage signal of the lamp voltage Vr. Normally, Vc4<Vth1. The output voltage V2 of the first flip-flop 511 is in high level, and the output voltage V4 of the OR gate 507 is also in high level. The driver signal generated from the oscillator 502 controls the switches M1 and M2 to operate in alternate mode.
Once an over-voltage error occurred on the lamp, the Vc4>Vth1. The output voltage V2 of the first flip-flop 511 is in low level. Also Vc4>Vth2, the second comparator 510 generates a low level voltage signal to the R end of the second flip-flop 509. As the S end of the second flip-flop 509 is in low level, the output voltage signal V3 of the second flip-flop 509 is kept in low level. As a result, the OR gate 507 generates a low level output voltage signal V4 configured to disable the driver signal from the oscillator 502 in the AND gate 503. The G1 and G2 are in low level and the switches M1 and M2 stop operating.
According to the above description, in order to prevent the Vc4 turning on the switch M3 in the situation when an error occurred on the lamp in burn state, the capacitance of the capacitors C2, C3 and the resistance of the resistors R3 and R4 may be set to obtain a proper value of the sensed output voltage signal Vc4.
The above description and discussion about specific embodiments of the present invention is for purposes of illustration. However, one with ordinary skill in the relevant art should know that the invention is not limited by the specific examples disclosed herein. Variations and modifications can be made on the apparatus, methods and technical design described above. Accordingly, the invention should be viewed as limited solely by the scope and spirit of the appended claims.
Number | Date | Country | Kind |
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20112093755.2 | Apr 2011 | CN | national |