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Not Applicable
Electronic ballast circuits use filament drive circuits to provide a heating voltage to the filaments of a gas-discharge lamp and to ensure that the filaments are properly heated during the operation of the lamp. A filament drive circuit may generate a pulsed heating signal to maintain the filaments at the appropriate temperature. Some gas-discharge lamps require that the heating effect of the pulsed heating signal be adjusted in accordance with the lamp current. This is particularly true if the gas-discharge lamp is connected to a dimmable ballast circuit that adjusts the lamp current in accordance with a desired dimming level.
Ballast circuits may have an inverter that operates to convert a DC voltage into an AC voltage at the appropriate frequency for operating the gas-discharge lamp. To do this, inverter switch devices receive the DC voltage and are switched on and off at a switching frequency to generate a periodic signal. A control circuit coordinates the switching of the inverter switch devices using clock signals. This periodic signal is then filtered through a resonant circuit to create the appropriate AC voltage for powering the gas-discharge lamp. The problem with prior art filament drive circuits is that they either interfere with the operation of the inverter or they require a complicated coordination scheme with the clock signals to adjust the heating effect of the pulsed heating signal.
For example, prior art filament drive circuits may couple a filament drive resonant tank in parallel with the resonant circuit in the inverter. Adjusting the resonant frequency of the filament drive resonant tank adjusts the heating effect of the pulsed heating signal. Unfortunately, this also has the effect of adjusting the resonant frequency of the inverter's resonant circuit. Complicated and expensive circuitry is required to achieve the desired heating effect while maintaining the desired dimming level of the lamp.
Other prior art filament drive circuits use a clock signal to coordinate the generation of the pulses. Unfortunately, these circuits require a processor to determine the number of clock cycles associated with a desired pulse width for the pulsed heating signal and to count clock cycles during the generation of a pulse. A processor then implements a complicated digital counting scheme to time the start and end of the pulses which reduces the reliability of the circuit and increases its cost.
What is needed is a filament drive circuit for an electronic ballast that does not significantly affect the resonant circuit of the inverter and that does not require complicated counting schemes to provide the appropriate heating effect to the lamp filaments.
This invention is directed to a ballast circuit that utilizes a filament drive circuit to control the heating effect of the pulsed heating signal on the filaments of a gas-discharge lamp. The ballast circuit does not require expensive electronic components and is capable of controlling the heating effect of the pulsed heating signal without a parallel resonant tank or complicated digital counting schemes.
The ballast circuit may include an inverter with inverter switch devices that convert a DC voltage into a periodic voltage signal. A resonant circuit filters the periodic voltage signal into the required AC voltage for powering the gas-discharge lamps.
A filament drive transformer may be utilized to couple a pulsed heating signal to heat the lamp filaments. The filament drive transformer has a primary winding magnetically coupled to secondary windings which receive the pulsed heating signal and are coupled to the lamp filaments. In one embodiment, a switch device is coupled to the primary winding of the transformer and is controlled by a logic device, which may be an SR flip-flop. The switch device is coupled so that current flows through the primary winding when the switch device is in a conducting state and is blocked when the switch device is in a non-conducting switch state.
The set terminal of the SR flip-flop receives a clock signal from the inverter. A timing pulse of the clock signal triggers the logic device to close the switch device and begin the transmission of a pulse. The reset terminal of the SR flip-flop is coupled to the output of a comparator that senses a voltage level across a resistor in series with the switch device. The voltage across the resistor in series with the switch device is proportional to the current through the primary winding. The voltage, against which the comparator compares the voltage across the resistor in series with the switch device, is preset so as to control the peak instantaneous current flowing through the primary winding, which will control the cycle by cycle energy transferred to the lamp filaments. When the voltage across the resistor in series with the switch device is at or above a threshold level, the comparator transmits an output signal to the reset terminal that causes the SR flip-flop to open the switch device and end the pulse. The filament drive circuit can adjust the threshold level and control the pulse width of the pulses on the pulsed heating signal. In this manner, the heating effect of the pulsed heating signal may be controlled without a parallel resonant circuit or complicated digital counting schemes.
a is a graphical representation of a clock signal that controls the low side inverter switch device in the inverter of the ballast circuit shown in
b is a graphical representation of a pulsed heating signal generated by the ballast circuit shown in
Referring now to
As is known in the art, inverter 16 utilizes inverter switch devices, QTop, QBot to generate a periodic signal 19 from the DC voltage 11. DC blocking capacitor, C_Ser1, blocks the DC components of the periodic signal 19. Resonant circuit 18 filters the periodic signal 19 to provide an AC voltage 20 at the appropriate frequency for powering the gas discharge lamp 12. In this particular embodiment, the resonant circuit 18 is a series resonant circuit and is coupled between the inverter switch devices QTop, QBot at terminal 25. Inverter switch devices, QTop, QBot are controlled by a control circuit 22 that generates clock signals 24A, 24B utilized to switch the inverter switch devices 24A, 24B at the appropriate frequency.
The above described circuit is an example of one inverter topology that may be utilized with the invention. There are many types of inverter topologies utilized to power one or more gas discharge lamps. While the invention does require an apparatus for converting a DC signal into an AC signal to power the gas-discharge lamp, the invention is not limited to any particular inverter topology as this feature is not critical to the invention.
Referring now to
As shown in the bottom graph of
Other embodiments of the ballast circuit 10 may generate a pulsed heating signal 32 with a pulse shape that actually increases the heating effect of the pulsed heating signal 32 by decreasing the pulse width 36. For example, as shown in
Referring again to
A filament drive circuit 38 may utilize one of the clock signals 24A, 24B to generate the pulsed heating signal 32. Unlike prior art filament drive circuits, however, filament drive circuit 38 does not require the clock signal 24A, 24B to determine the pulse width 36. Thus, complicated digital counting schemes are not required to determine the starting and ending time locations 36A, 36B of the pulses 34.
In this embodiment, the filament drive circuit 38 receives the clock signal 24B which is also transmitted to the low side inverter switch device, QBot. As shown by the graphs in
Switch device 44 may be coupled in series with primary winding T1:A to open and close a circuit path from a voltage source, which in this embodiment is DC voltage source, VBulk, to the primary winding T1:A. Pulses 34 are thus generated across the primary winding T1:A and coupled to secondary windings T1:B and T1:C whenever the switch device 44 is in a conducting switch state and ended whenever the switch device 44 is in a non-conducting switch state. In other embodiments, pulses 34 may be generated when the switch device 44 is in a non-conducting switch state, for example if the switch device 44 is connected in parallel to primary winding T1:A.
A logic device 56 may be utilized to control the conducting state of switch device 44. Logic device 56 receives the clock signal 24B at first logic device input terminal 64 and outputs a switch gate control signal 74 from output terminal 72. Switch device 44 receives the switch gate control signal 74 from output terminal 72 and switch gate control signal 74 controls the opening and the closing of the switch device 44. In this embodiment, the switch gate control signal 74 is at a high signal level to close the switch device 44 and transmit a pulse 34 across the primary winding 28 and at a low signal level to open the switch device 44 and end the pulse 34.
To accomplish this, logic device 56 operates in accordance to a truth table such that the high signal levels and low signal levels received at input terminals 64, 68 generate a switch gate control signal 74 as required to start and end the pulses 34. In this embodiment, logic device 56 is a monostable SR flip-flop 56. SR flip-flop 56 outputs a switch gate control signal 74 having a stable signal level, which in this ballast circuit 10 is a low signal level and a nonstable signal level which is this ballast circuit 10 is a high signal level.
As is known in the art, SR flip-flop 56 may be constructed from NOT logic gates. SR flip-flop 56 stores and maintains switch gate control signal 74 in the low stable signal level so long as the input to the set terminal 64 and reset terminal 68 are low. When switch gate control signal 74 is at the low stable signal level, switch device 44 is in a non-conducting state and thus no pulse 34 is being transmitted on pulsed heating signal 32. Once the set terminal is set to high, the SR flip-flop 56 switches the switch gate control signal 74 to the high unstable signal level. Accordingly, switch device 44 switches into the conducting switch state thereby starting a pulse 34 on the pulsed heating signal 32.
The set terminal 64 of the logic device 56 may thus be coupled to first logic device input terminal 61 to receive the clock signal 24B that controls the low side inverter switch device QBot. SR flip-flop 56 responds to a timing pulse 80 by raising the switch gate control signal 74 from the low stable signal level to the high unstable signal level thereby closing switch device 44 and allowing current to flow from the voltage terminal 57 coupled to voltage source V_bulk to the primary winding, T1:A. This begins the transmission of a pulse 34. Of course, this does not necessarily mean the time location 80A of the timing pulse 80 and starting time location 36A of the pulse 34 on the pulsed heating signal 32 are the same or substantially the same. While the locations 36A and 80A may be the same, starting time location 36A is simply triggered in response to a timing pulse 80 and may be different from the time location 80A of timing pulse 80 according to the circuit components of the ballast circuit 10 as well as the requirements of the ballast circuit 10.
Reset terminal 68 of SR flip-flop receives a pulse termination signal 90 from comparator 84 that initially is at a low signal level. So long as the pulse termination signal 90 is at a low signal level, the switch gate control signal 74 is maintained high and the switch device 44 is maintained in a conducting switch state. As the pulse 34 is being transmitted across the primary winding, the current through primary winding T1:A is monitored utilizing the sensing resistor, R_sense. Ideally, the current level monitored by resistor R_sense is exactly equal to the current level through primary winding T1:A. In this embodiment, however, comparator 84 is an operational amplifier (op-amp). While the impedance of op-amps is very high, in practice it is not infinite and thus some current will leak through the comparator 84 as well as other components of the ballast circuit 10.
The voltage across sensing resistor, R_sense, is determined by the current through primary winding T1:A. Because the current in winding T1:A is related to the voltage level across primary winding T1:A, the voltage level across sensing resistor, R_sense, can be utilized to measure the voltage level across primary winding T1:A. Other embodiments of the ballast circuit 10 may measure other types of signal levels associated with primary winding T1:A, including current and power levels.
Comparator 84 receives the voltage level across the sensing resistor, R_sense, at a first comparator input terminal 86. Comparator 84 compares the voltage level across R_sense with the voltage level that is received at second comparator input terminal 88 from voltage source, V_set. Pulse termination signal 90 is maintained low while the voltage level at the first comparator input terminal 86 is below the voltage level at the second comparator input terminal 86 from voltage source, V_set. The ballast circuit 10 is configured so that the voltage level across the primary winding T1:A is at or above a threshold level when the voltage level at first comparator input terminal 86 is at or above the voltage level at the second comparator input terminal 88. Voltage source, V_set, thus generates a threshold signal at second comparator input terminal 88 that may be utilized to set the relevant threshold level across the primary winding T1:A
Once the voltage level present at first comparator input terminal 86 is equal to or greater than the voltage level present at second comparator input terminal 88, the pulse termination signal 90 from comparator 84 is switched from a low signal level to a high signal level. Reset terminal 68 on the SR flip-flop receives the pulse termination signal 90 at the high signal level which triggers the SR flip-flop device 86 to switch the switch gate control signal 74 back to the low stable signal level. This places the switch device 44 in the non-conducting state and ends the pulse 34. Ending time locations 36B of pulses 34 are thereby determined by the threshold level set by voltage source, V_set, because this voltage level determines the voltage level across the primary winding T1:A that triggers the comparator 86 to generate pulse termination signal 90 at a high signal level. Consequently, the pulse width 36 of the pulses 34 is preset by voltage source, V_set, and the inductance of the primary winding T1:A.
While the starting location 34A of the pulses 34 is triggered in response to the clock signal 24B, the ending location 36B of the pulses 34 is determined independently of the clock signal 24B. This permits the pulse widths 36 of the pulses 34 to be determined by the filament drive circuit 38 without complicated digital counting schemes. It should be understood however that while this particular embodiment of the ballast circuit 10 utilizes an SR flip-flop 56 to start and end the pulses 34, other logic devices and flip-flops may be used with the invention which may produce truth tables that vary in accordance with the particular application. Other logic devices 56 are known to generate a switch gate control signal 74 at a high and low signal level depending on the signal level at one or more input terminals 64, 68. It is not important whether high signal levels or low signal levels cause switch gate control signal 86, 88 to operate at a high level or a low level, or that the switch device 44 be in a non-conducting or conducting state to start or end a pulse 34. Rather what is important about the logic device 56 is that it places the switch device 44 in the appropriate switch state for starting a pulse 34 in response to the clock signal 24B and that the pulse 34 is ended when a signal level associated with the primary winding T1:A is at or above a threshold level. In fact, clock signal 24B does not necessarily have to control the switching of inverter switch devices QTop, QBot but may be any clock signal having timing pulses associated with the switch frequency of the inverter switch devices, QTop, QBot.
In this manner, the heating effect of the pulsed heating signal 32 may be controlled by adjusting the voltage level from voltage source, V_set. During periods of low lamp current, the voltage level from voltage source, V_set, may be adjusted to change the pulse width 36 and increase the heating effect of the pulsed heating signal 32. This is particularly advantageous with dimmable ballast circuits 10 which are capable of continually adjusting the AC voltage 20 to the lamp 18.
Thus, although there have been described particular embodiments of the present invention of a new and useful Ballast Circuit for a Gas-Discharge Lamp Having a Filament Drive Circuit with Monostable Control it is not intended that such references be construed as limitations upon the scope of this invention except as set forth in the following claims.
This application claims benefit of the following provisional patent application which is hereby incorporated by reference: U.S. Patent Application No. 61/157,837, filed Mar. 5, 2009.
Number | Name | Date | Kind |
---|---|---|---|
5144205 | Motto et al. | Sep 1992 | A |
5175470 | Garbowicz | Dec 1992 | A |
5583399 | Rudolph | Dec 1996 | A |
5589740 | Rudolph et al. | Dec 1996 | A |
5656891 | Luger et al. | Aug 1997 | A |
5703441 | Steigerwald et al. | Dec 1997 | A |
5854538 | Krummel | Dec 1998 | A |
5973455 | Mirskiy et al. | Oct 1999 | A |
6366031 | Klien | Apr 2002 | B2 |
6433490 | Koch et al. | Aug 2002 | B2 |
6972531 | Krummel | Dec 2005 | B2 |
7279844 | Winkel et al. | Oct 2007 | B2 |
Number | Date | Country | |
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61157837 | Mar 2009 | US |