The present invention relates generally to balun signal transformers. More specifically, the present invention relates to a balun signal transformer that achieves high common mode rejection.
A balun (balanced-to-unbalanced) signal transformer is a passive electronic circuit that functions to convert an unbalanced signal (i.e., unbalanced in relation to ground) into balanced signals and vice versa of converting balanced signals into an unbalanced signal. A signal incoming to an unbalanced port of the balun transformer may be divided between two balanced ports of the balun transformer providing signals which have the same amplitude but phases differing by approximately one hundred and eighty degrees in relation to one another. Baluns may, for example, be used in transmitting circuits and receiving circuits of wireless and/or cable communications systems, for construction of balanced amplifiers, mixers, voltage controlled oscillators, antenna systems, and so forth.
In balun transformer design, important specifications to be taken into account are insertion loss and common mode rejection. Insertion loss is defined as the amount of signal loss occurring in the balun transformer. Common mode rejection is the phenomenon whereby a signal common to two lines, but opposite in polarity from one another, gets cancelled at its destination. In the balanced lines of a balun there is a positive signal on one cable and a negative or opposite polarity signal on the other. Thus, any signal common to both wires will eventually get cancelled at the receiving end. Accordingly, an effective balun transformer design should ideally have very low insertion loss and a large common mode rejection ratio.
Symmetric balun signal transformers have been developed. The symmetrical configuration of these balun signal transformers generally yields a well-behaved signal provided at the balanced ports that is generally equal in amplitude and opposite in polarity. Some design specifications call for the common mode rejection ratio (CMRR) to be “better” then −20 dB. The power of the signal common to two lines is significantly less than the input signal. Accordingly, the CMRR is sometimes represented as a negative number to indicate the lower power of the common signal relative to the input signal. As such, a “better” or high CMRR is one that is negative, but is large in magnitude, for example, -30dB. Unfortunately, even the symmetric baluns cannot meet the high common mode rejection requirements while concurrently satisfying low insertion low, microminiaturization, manufacturing repeatability, and low cost requirements. Accordingly, what is needed is a balun signal transformer characterized by high common mode rejection, low insertion loss, and in which size and cost are kept low.
A more complete understanding of the present invention may be derived by referring to the detailed description and claims when considered in connection with the Figures, wherein like reference numbers refer to similar items throughout the Figures, and:
A system for transforming signals includes a balun (balanced-to-unbalanced) signal transformer interposed between an unbalanced device and a balanced device. The balun signal transformer includes a symmetric transformer having a balanced port and an unbalanced port. An inductor is connected to one of a pair of terminals of the balanced port to adjust the phase between signals at a pair of terminals of the balanced port, thereby improving common mode rejection. The balun may be readily and cost effectively formed on a substrate as an integrated passive device.
Balun signal transformer 26 includes an unbalanced external port section 30 and a balanced external port section 32. Unbalanced external port section 30 includes a pair of unbalanced terminals 34 and 36. In one embodiment, terminal 34 is connected to a single ended port 38 of unbalanced device 22 and terminal 36 may be terminated as ground. External balanced port section 32 includes a pair of balanced ports 40 and 42 and balanced device 24 includes a corresponding pair of differential ports 44 and 46. In one embodiment, port 40 is connected to differential port 44 and port 42 is connected to differential port 46. The term “external” in connection with port sections 30 and 32 is utilized herein to refer to input/output sections that convey signals to and from balun signal transformer 26.
Substrate 28 may be silicon, gallium arsenide (GaAs), combinations thereof, or other known or upcoming semiconductor materials. Substrate 28 may be used with an integrated passive device process, complementary metal-oxide semiconductor (CMOS) integrated circuit process, or other semiconductor processes for forming system 20 on a chip. Substrate 28 defines a circuit plane where etching, deposition, or other techniques are used to form system 20. Although balun signal transformer 26 is described as being formed on a substrate utilizing a semiconductor process technology, in other embodiments, balun signal transformer 26 may be implemented utilizing a combination of discrete passive components.
Balun signal transformer 26 provides coupling between unbalanced device 22 and balanced device 24. More specifically, balun signal transformer 26 may be used for conversion between an unbalanced input signal from unbalanced device 22 to a balanced output signal conveyed to balanced device 24. Additionally, balun signal transformer 26 may be used for conversion between a balanced input signal from balanced device 24 to an unbalanced output signal conveyed to unbalanced device 22.
Symmetric transformer 48 includes two or more windings, coils, or folds 60, 62. Terminals 34 and 36 of unbalanced port 30 are formed at opposing ends of winding 60. Terminals 52 and 54 of balanced port 50 are formed at opposing ends of winding 62. In addition, terminal 52 is connected to port 40 of balanced external port section 32. In accordance with an embodiment, balun signal transformer 26 further includes an inductor 64 having opposing ends 66, 68. Terminal 54 of port 50 is connected to end 66 of inductor 64. End 68 of inductor 64 is connected to port 42 of balanced external port section 32.
In general, symmetric balun structures (e.g., symmetric transformer 48) provide for more constant phase response, or balanced signals, between the terminals of the balanced port (e.g., terminals 52 and 54 of balanced port 50) than their asymmetric counterparts. However, when common mode rejection requirements are high, for example, better than −20 dB, the symmetric design still may not be suitable. That is, a signal common to both balanced terminals of the symmetric balun may not be effectively canceled due to a phase difference, or shift, between the two signal components.
Inductor 64 is interposed between terminal 54 of balanced port 50 of symmetric transformer 48 and port 42 of balanced external port section 32 to adjust the phase balance between a signal component, represented by a bidirectional arrow 70, at terminal 52 and a signal component, represented by a bidirectional arrow 72, at terminal 54. As such, inductor 64 with the appropriate impedance transformation ratio causes the phase of signal component 72 to shift so that signal component 72 is substantially one hundred eighty degrees out-of-phase from signal component 70. Accordingly, use of inductor 64 tunes the phase unbalance of the signal components 70 and 72 at terminals 52 and 54 so that the signal components 70 and 72 at balanced ports 40 and 42 of external port section 32 are largely balanced. This situation results in improved common mode rejection.
By way of illustration, when unbalanced external port section 30 serves as input from unbalanced device 22 (
By way of another illustration, when balanced external port section 32 serves as input from balanced device 24 and unbalanced external port section 30 serves as output to unbalanced device 22, a method of transforming a signal entails receiving the signal as first and second signal components 70 and 72 at ports 40 and 42. A phase of signal component 72 is adjusted to balance with signal 70 using inductor 64. Signal component 70 and phase shifted signal component 72 are input to symmetric transformer 48 where they are transformed to an output signal, i.e., signal 73. Signal 73 is subsequently output from symmetric transformer 48 to unbalanced device 22.
In the illustrated embodiment, terminals 34 and 36 of unbalanced external port section 30 (
Windings 60 and 62 are symmetrically arranged on substrate 28. This symmetry is represented by a bidirectional arrow 74 indicating a top half of symmetric transformer 48 is symmetric, or identical, to a bottom half of symmetric transformer 48. Inductor 64 is a winding, or coil, also formed on substrate 28. Inclusion of inductor 64 results in an asymmetric configuration of balun signal transformer 26. However, this asymmetry functions to adjust the phase balance between the signals at ports 40 and 42, and therefore improves common mode rejection, or cancellation of any signal common to both of terminals 52 and 54 (
An embodiment described herein comprises a balun signal transformer that includes a symmetric transformer having an additional inductor connected to one of a pair of balanced terminals of the symmetric transformer. The inductor functions to adjust the phase balance between the signals at the balanced terminals to achieve better common mode rejection than a conventional symmetric signal transformer while maintaining low insertion loss. The symmetric transformer and the inductor may be implemented as an integrated circuit formed on a substrate utilizing an integrated passive device process technology to achieve small size, manufacturing repeatability, and low cost, without sacrificing performance.
Although the preferred embodiments of the invention have been illustrated and described in detail, it will be readily apparent to those skilled in the art that various modifications may be made therein without departing from the spirit of the invention or from the scope of the appended claims.