Claims
- 1. A band gap reference comprising:a first amplifier having a (+) input, a (−) input and an output; a first current source having a current control input connected to the output of the first amplifier, the first current source connected to the (+) input of the first amplifier; a first diode connecting the first current source to a ground line; a second current source having a current control input connected to the output of the first amplifier, the second current source connected to the (−) input of the first amplifier; a first resistor having a first terminal connected to the second current source and the (−) input of the first amplifier, and having a second terminal; a second diode connecting the second terminal of the first resistor to the ground line; a second resistor; and means for adjusting current based on temperature variations, the means for adjusting being connected to the output of the first amplifier and the second resistor, and providing an output which minimizes current change due to temperature variations by combining the output from the first amplifier with current provided through the second resistor.
- 2. The band gap reference of claim 1, wherein the means for adjusting current comprises:a second amplifier having a (+) input, a (−) input and an output, the (−) input of the second amplifier connected to the first the first terminal of the first resistor; a third current source having a current control input connected to the output of the second amplifier, the third current source providing current to a first terminal of the second resistor and to the (+) input of the second amplifier; a fourth current source having a current control input connected to the output of the second amplifier; a fifth current source having a current control input connected to the output of the first amplifier; and a third resistor having a first terminal providing an output (VDIODE) for the band gap reference, the first terminal of the third resistor also connected to the fourth and fifth current sources.
- 3. The band gap reference of claim 1, wherein the first and second diodes each comprise a BJT transistor having a base and collector connected together.
- 4. The band gap reference of claim 1, wherein the first amplifier comprises:a first transistor having a gate forming the (+) input of the first amplifier, and a source-drain path with a first terminal and a second terminal; a second transistor having a gate forming the (−) input of the first amplifier, and a source-drain path with a first terminal connected to the first terminal of the source-drain path of the first transistor; a third transistor having a source-drain path coupling a power supply terminal to the second terminal of the source-drain path of the first transistor; a fourth transistor having a source-drain path coupling the power supply terminal to the second terminal of the source-drain path of the second transistor, and having a gate connected to a gate of the third transistor; a fifth transistor having a gate connected to the second terminal of the source-drain path of the second transistor, and having a source-drain path coupling the power supply terminal to the output of the first amplifier; a sixth transistor having a gate connected to a gate of the first transistor and having a source-drain path coupling the output of the first amplifier to the first terminal of the source-drain path of the first transistor; and a seventh transistor having a gate connected to the gate of the first transistor and having a source-drain path coupling the first terminal of the source-drain path of the first transistor to the ground line.
- 5. The band gap reference of claim 4, wherein the second amplifier comprises:a first op-amp replicating transistor having a source-drain path with a first terminal connected to the power supply terminal, and having a second terminal, and having a gate; a second op-amp replicating transistor having a source-drain path with a first terminal connected to a second terminal of the first op-amp replicating transistor, a second terminal and a gate connected to the (−) input of the first amplifier; a third op-amp replicating transistor having a source-drain path connecting the second terminal of the second op-amp replicating transistor to the ground line, and having a gate connected to the (−) input of the first amplifier; a fourth op-amp replicating transistor having a source-drain path with a first terminal connected to the power supply terminal, and having a second terminal and gate connected together to the gate of the first op-amp replicating transistor; and a fifth op-amp replicating transistor having a source-drain path with a first terminal connected to the second terminal of the source-drain path of the fourth op-amp replicating transistor and having a second terminal connected to the second terminal of the second op-amp replicating transistor.
- 6. A current reference comprising:a first amplifier having an input, and an output; a first current source having a current control input connected to the output of the first amplifier; a first diode connecting the first current source to a ground line; a second current source having a current control input connected to the output of the first amplifier; a first resistor having a first terminal connected to the second current source, and the input of the first amplifier, and having a second terminal; a second diode connecting the second terminal of the first resistor to a ground line; a second amplifier having an first input connected to the first terminal of the first resistor, and having an output; a third current source having a current control input connected to the output of the second amplifier; a second resistor having a first terminal connected to the third current source, and a second input of the second amplifier; a fourth current source having a current control input connected to the output of the first amplifier, and having an output forming an output for the current reference; and a fifth current source having a current control input connected to the output of the second amplifier, and an output connected to the output of the current reference.
- 7. The current reference of claim 6, further comprising:a sixth current source having a current control input connected to the output of the second amplifier; a seventh current source having a current control input connected to the output of the first amplifier; and a third resistor having a first terminal providing an output (VDIODE) for the current reference, the first terminal of the third resistor also connected the sixth and seventh current sources.
- 8. The current reference of claim 6, further comprising a plurality of current reference output circuits, each current reference output circuit comprising:a first current source having a current control input connected to the output of the first amplifier, and having an output forming an output node for the current reference output circuit; and a second current source having a current control input connected to the output of the second amplifier, and an output connected to the output node.
- 9. A band gap reference comprising:an operational amplifier (opamp) having a (+) input, a (−) input and an output; a first diode connected transistor having a first terminal connected to a ground line and having a second terminal; a first current source transistor having a source-drain path with a first terminal connected to a power supply terminal and a second terminal, and having a gate connected to the output of the opamp; a first gating transistor having a source-drain path coupling the second terminal of the first current source transistor to the second terminal of the first diode connected transistor, and having a gate; a second diode connected transistor having a first terminal connected to the ground line, and having a second terminal; a first resistor having a first terminal connected to the second terminal of the second diode connected transistor, and having a second terminal connected to the (−) input of the opamp; a second current source transistor having a source-drain path with a first terminal connected to the power supply terminal and a second terminal, and having a gate connected to the output of the opamp; a second gating transistor having a source-drain path coupling the second terminal of the second current source transistor to the second terminal of the first resistor, and having a gate connected to the gate of the first gating transistor; a third current source transistor having a source-drain path with a first terminal connected to the power supply terminal, and a gate connected to the output of the op-amp; and a third gating transistor having a source-drain path with a first terminal connected to a second terminal of the third current source transistor, a second terminal forming a reference node (VBSNRF), and having a gate connected to the gate of the first and second gating transistors.
- 10. A band gap reference of claim 9, wherein the opamp comprises:a first transistor having a gate forming the (+) input of the opamp, and a source-drain path with a first terminal and a second terminal; a second transistor having a gate forming the (−) input of the opamp, and a source-drain path with a first terminal connected to the first terminal of the source-drain path of the first transistor; a third transistor having a source-drain path coupling a the power supply terminal to the second terminal of the source-drain path of the first transistor; a fourth transistor having a source-drain path coupling the power supply terminal to the second terminal of the source-drain path of the second transistor, and having a gate connected to a gate of the third transistor; a fifth transistor having a gate connected to the second terminal of the source-drain path of the second transistor, and having a source-drain path coupling the power supply terminal to the output of the opamp; a sixth transistor having a gate connected to a gate of the first transistor and having a source-drain path coupling the output of the opamp to the first terminal of the source-drain path of the first transistor; and a seventh transistor having a gate connected to the gate of the first transistor and having a source-drain path coupling the first terminal of the source-drain path of the first transistor to the ground line.
- 11. The band gap reference of claim 10, further comprising:a first op-amp replicating transistor having a source-drain path with a first terminal connected to the power supply terminal, and having a second terminal, and having a gate; a second op-amp replicating transistor having a source-drain path with a first terminal connected to a second terminal of the first op-amp replicating transistor, a second terminal and a gate connected to the (−) input of the op-amp; a third op-amp replicating transistor having a source-drain path coupling the second terminal of the second op-amp replicating transistor to the ground line, and having a gate connected to the (−) input of the opamp; a fourth op-amp replicating transistor having a source-drain path with a first terminal connected to the power supply terminal, and having a second terminal and gate connected together to the gate of the first op-amp replicating transistor; a fifth op-amp replicating transistor having a source-drain path with a first terminal connected to the second terminal of the source-drain path of the fourth op-amp replicating transistor and having a second terminal connected to the second terminal of the second op-amp replicating transistor; a second resistor having a first terminal connected to the ground line and having a second terminal connected to a gate of the fifth op-amp replicating transistor; a first current source replicating transistor having a source-drain path coupling with a first terminal connected to the power supply terminal and a second terminal, and having a gate connected to the second terminal of the first op-amp replicating transistor; and a first gating replicating transistor having a source-drain path coupling the second terminal of the second resistor to the second terminal of the source drain path of the first current source replicating transistor, and having a gate connected to the gate of the first and second gating transistors.
- 12. The band-gap reference of claim 11, further comprising:a third resistor having a first terminal connected to the ground line and a second terminal forming a Vdiode connection node; a first Vdiode generator transistor having a source-drain path with a first terminal connected to the Vdiode connection node, a second terminal, and having a gate connected to the gates of the first and second gating transistors; a second Vdiode generator transistor having a source-drain path coupling the power supply terminal to the second terminal of the first Vdiode generator transistor, and having a gate connected to the output of the op-amp; a third Vdiode generator transistor having a source-drain path with a first terminal connected to the Vdiode connection node, a second terminal, and having a gate connected to the gates of the first and second gating transistors; and a fourth Vdiode generator transistor having a source-drain path coupling the power supply terminal to the second terminal of the third Vdiode generator transistor, and having a gate connected to the second terminal of the first op-amp replicating transistor.
- 13. The band-gap reference of claim 12, further comprising:a first VBSNRF generator transistor having source-drain path coupling the VBSNRF reference node to a first terminal, and having a gate coupled to the gate of the first gating replicating transistor; and a second VBSNRF generator transistor having a source-drain path coupling the power supply terminal to the first terminal of the first VBSNRF generator transistor, and having a gate coupled to the gate of the first current source replicating transistor.
- 14. The band-gap reference of claim 13, further comprising:a startup transistor having a source-drain path coupling the power supply terminal to the first terminal of the first diode connected transistor, and having a gate; a second startup transistor having a source-drain path coupling the power supply terminal to a first node and having a gate connected to the output of the op-amp; a third startup transistor having a source-drain path coupling the first node to the ground line, and having a gate; a fourth startup transistor having a source-drain path coupling a second node to the ground line, and having a gate connected to the first node; a fifth startup transistor having a source-drain path coupling the second node to the power supply terminal, and having a gate connected to the second node; a sixth startup transistor having a source-drain path coupling the second node to a third node and having a gate connected to the third node; a seventh startup transistor having a source-drain path coupling the third node to a fourth node and to the gate of the third startup transistor; and an eighth startup transistor having a source-drain path coupling the power supply terminal to the fourth node and having a gate connected to the ground line.
CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is related to the following patent applications, each of which is filed the same day as the present application, each of which names the same inventor named in the present application, and each of which is incorporated by reference in its entirety into the present application:
U.S. patent application Ser. No. 10/146,769, filed May 16, 2002, entitled “INPUT BUFFER WITH CMOS DRIVER GATE CURRENT CONTROL ENABLING SELECTABLE PCL, GTL, OR PECL COMPATIBILITY”;
U.S. patent application Ser. No. 10/147,199, filed May 16, 2002, entitled “OUTPUT BUFFER HAVING PROGRAMMABLE DRIVE CURRENT AND OUTPUT VOLTAGE LIMITS”;
U.S. patent application Ser. No. 10/147,011, filed May 16, 2002, entitled “ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT”;
U.S. patent application Ser. No. 10/151,753, filed May 16, 2002, entitled “OUTPUT BUFFER WITH OVERVOLTAGE PROTECTION”;
U. S. patent application Ser. No. 10/146,739, filed May 16, 2002, entitled “INPUT BUFFER WITH SELECTABLE PCL, GTL, OR PECL COMPATIBILITY”;and
U.S. patent application Ser. No. 10/146,826, filed May 16 ,2002, entitled “OUTPUT BUFFER WITH FEEDBACK FROM AN INPUT BUFFER TO PROVIDE SELECTABLE PCL, GTL, OR PECL COMPATIBILITY”.
US Referenced Citations (6)