BANDGAP CIRCUIT WITH TEMPERATURE CORRECTION

Abstract
A temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors. A first switched compare circuit is coupled to the one transistor to inject or remove a first current into or from the transistor. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.
Description
FIELD

The present invention pertains to temperature sensing, in general, and to an improved bandgap circuit, in particular.


BACKGROUND

To measure temperature, a common method utilizes a sensor to convert the quantity to be measured to a voltage. Common solid state sensors utilize semiconductor diode Vbe, the difference in Vbe at two current densities or delta Vbe, or a MOS threshold to provide a temperature dependent output voltage. The temperature is determined from the voltage measurement. Once the sensor output is converted to a voltage it is compared it to a voltage reference. It is common to utilize a voltage reference having a low temperature coefficient such as a bandgap circuit as the voltage reference. The bandgap voltage reference is about 1.2 volts. An n-bit analog to digital converter divides the bandgap reference down by 2n and determines how many of these small pieces are needed to sum up to the converted voltage. The precision of the A/D output is no better than the precision of the bandgap reference.


Typical plots of the output bandgap voltage with respect to temperature are bowed and are therefore of reduced accuracy.


Prior bandgap voltage curvature correction solutions result in very complicated circuits whose performance is questionable.


SUMMARY

In accordance with the principles of the invention, a temperature corrected bandgap circuit is provided which provides a significantly flatter response of the bandgap voltage with respect to temperature.


In accordance with the principles of the invention, a temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors with the area of one transistor being selected to be a predetermined multiple of the area of the other transistor. A first switchable current source is coupled to the one transistor to inject a first current into the emitter of that transistor when its base-emitter voltage is at a first predetermined level. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.


Further in accordance with the principles of the invention a second current source is coupled to the other transistor to remove a second current from the other transistor emitter. The second current is selected to correct for curvature in the output voltage at the other of said hotter or colder temperatures. The current removal of the second current source is initiated when the base-emitter voltage of the other transistor reaches a predetermined level.


The bandgap circuit, the first current source and the second current source are formed on a single substrate.





BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be better understood from a reading of the following detailed description in conjunction with the drawing figures in which like reference designators identify like elements, and in which:



FIG. 1 illustrates a prior art CMOS N-well substrate having a bipolar transistor structure of a type that may be utilized in a bandgap circuit;



FIG. 2 is a schematic of the prior art bipolar structure of FIG. 1;



FIG. 3 is a schematic of a prior art bandgap circuit;



FIG. 4 is a typical plot of bandgap circuit voltage versus temperature for the prior art circuit of FIG. 4;



FIG. 5 is a schematic of a circuit in accordance with the principles of the invention;



FIG. 6 is a plot of bandgap circuit voltage versus temperature with high temperature compensation in accordance with the principles of the invention;



FIG. 7 is a plot of bandgap circuit voltage versus temperature with low temperature compensation in accordance with the principles of the invention;



FIG. 8 is a plot of bandgap circuit voltage versus temperature with high and low temperature compensation in accordance with the principles of the invention; and



FIG. 9 is a schematic of a bandgap circuit in accordance with the principles of the invention.





DETAILED DESCRIPTION

For a bipolar transistor the first order equation for collector current related to Vbe is:






I
c
=AI
s(e(Vbe·q)/kT−1)


where:


T is temperature in Kelvin;


A is an area scale;


Is is dark current for a unit area device (process dependent);


q is charge on the electron; and


K is Boltzman's constant.


In the forward direction, even at very low bias, the (e(Vbe·q)/kT) term over-powers the −1 term. Therefore in the forward direction:






I
c
=I
s(e(Vbe·q)/kT)





, and






V
be=(kT/q)·ln (Ic/AIs)


Two junctions operating at different current densities will have a different Vbe related by the natural logs of their current densities.


From this it can be shown that the slope of Vbe vs. temperature must depend on current density. Vbe has a negative temperature coefficient. However, the difference in Vbe, called the ΔVbe, has a positive temperature coefficient.





ΔVbe=Vbe|1−Vbe|A=(kT/q)·[ln(I1/Is)−ln(I2/AIs)]


For I1=I2 and an area scale of A





ΔVbe=(kT/q)lnA


In the illustrative embodiment of the invention, a bandgap circuit is formed as part of a CMOS device of the type utilizing CMOS N-well process technology.


The most usable bipolar transistors available in the CMOS N-well process is the substrate PNP as shown in FIG. 1 in which a single transistor Q1 is formed by transistors Q1′, Q1– which has an area ratio, A, that is twice that of the transistor Q2. The structure is shown in schematic form in FIG. 2. All the collectors of transistors Q1′, Q1″, Q2 are connected to the chip substrate 101, i.e., ground. There is direct electrical access to the base and emitter of each transistor Q1′, Q1″, Q2 to measure or control Vbe but there is no separate access to the collectors of the transistors Q1′, Q1″, Q2 to monitor or control collector current.


There are several general topologies based on the standard CMOS process and its substrate PNP that can be used to create a bandgap circuit.



FIG. 3 illustrates a prior art bandgap circuit 301 architecture. Bandgap circuit 301 comprises transistor Q1 and transistor Q2. The area of transistor Q1 is selected to be a predetermined multiple A of the area of transistor Q2. First and second serially connected resistors R1, R2 are connected between an output node Vbandgap and the emitter of transistor Q2. A third resistor is connected in series between output node Vref and the emitter of transistor Q1. A differential input amplifier AMP has a first input coupled to a first circuit node disposed between resistors R1, R2; and a second input coupled to a second node disposed between resistor R3 and the emitter of transistor Q1. Amplifier AMP has its output coupled to the output node bandgap.


Bandgap voltage and slope with respect to temperature or temperature coefficient, TC, are sensitive to certain process and design variables.


With the foregoing in mind, considering all the variables, and making specific assumptions, a closed form for the bandgap voltage is:





Vbandgap=(kT/q)·{ln[((kT/q)·lnA/R1)/Is]}+(1+R2/R1) (kT/q)·lnA


This is of the form Vref=Vbe+m ΔVbe


When m is correctly set, the temperature coefficient of Vref will be near zero. The resulting value of Vref will be near the bandgap voltage of silicon at 0° K., thus the name “bandgap circuit.”


However, Vbe for a bipolar transistor operating at constant current has a slight bow over temperature. The net result is that a plot of bandgap voltage Vref against temperature has a bow as shown by curve 401 in FIG. 4.


In accordance with one aspect of the invention, a simple differential amplifier formed by transistors M1, M2 as shown in FIG. 5 is used and a comparison is made between a near zero temperature coefficient voltage from the bandgap to the negative temperature coefficient of the bandgap Vbe. By providing proper scaling to add or subtract a controlled current to the bandgap at hot and cold temperatures the bandgap curve is flattened.



FIG. 5 illustrates a portion of a simplified curvature corrected bandgap circuit in accordance with the principles of the invention.


Transistor M1 and transistor M2 compare the nearly zero temperature coefficient, TC, voltage V1 (derived from the bandgap) to the Vbe voltage of the unit size bipolar transistor Q2 in the bandgap. By adjusting the value of V1 the threshold temperature where the differential pair M1, M2 begins to switch and steer current provided by transistor M3 into the bandgap is moved. Voltage V1 is selected to begin adding current at the temperature where the bandgap begins to dip, e.g., 40° C. The width/length W/L ratio of transistors M1, M2 will define the amount of differential voltage necessary to switch all of the current from transistor M2 to transistor M1. The current I sets the maximum amount of current that can or will be added to the bandgap.


In accordance with the principles of the invention, by utilizing 3 transistors and 2 resistors the correction threshold, rate (vs. temperature) and amount of curvature (current) correction on the high temperature side can be corrected. The effect of this current injection is shown by curve 601 in FIG. 6


The comparator/current injection structure can be mirrored for curvature correction of the cold temperature side of the bandgap by providing current removal from the larger or A sized transistor Q1 of the bandgap circuit. The effect of such curvature correction on the cold side is shown by curve 701 in FIG. 7.


A fully compensated bandgap circuit in accordance with the principles of the invention that provides both hot and cold temperature compensation is shown in FIG. 9.


The circuit of FIG. 9 shows substantial improvement in performance over a temperature range of interest is −40 to 125° C. A plot of Vref versus temperature is shown in FIG. 8 as curve 801.


The compensated circuit of FIG. 9 includes bandgap circuit 1001, current injection circuit 1003 and current injection circuit 1005.


Bandgap circuit 1001 comprising a transistor Q2 and a transistor Q1. The area of transistor Q1 is selected to be a predetermined multiple A of the area of transistor Q2. First and second serially connected resistors R1, R2 are connected between an output node Vbandgap and the emitter of transistor Q2. A third resistor is connected in series between output node Vref and the emitter of transistor Q1. A differential input amplifier AMP has a first input coupled to a first circuit node disposed between resistors R1, R2; and a second input coupled to a second node disposed between resistor R3 and the emitter of transistor Q1. Amplifier AMP has its output coupled to the output node Vbandgap.


A first switchable current source 1003 is coupled to said transistor Q2 to inject a first current into the emitter of transistor Q2. The current Iinj1 is selected to correct for one of hotter or colder temperatures, more specifically, in the illustrative embodiment, the current Iinj1 is injected at higher temperatures when the base emitter voltage across transistor Q2 to a first predetermined voltage Vset. The voltage Vset is determined by a resistance network formed by resistors R4, R5, R6.


A second switchable current source 1005 is coupled to transistor Q1 to remove a second current Iinj2 into the emitter of transistor Q1. The second current Iinj2 is selected to correct for the other of the hotter or colder temperatures, and more specifically for colder temperatures.


Bandgap circuit 1001, and switchable current injection circuits 1003, 1005 are formed on a single common substrate 1007.


The resistors R4, R5, and R6 are trimmable resistors and are utilized to select the voltages at which the current sources inject current from switchable current injection circuits 1003, 1005 into bandgap circuit 1001.


The invention has been described in terms of illustrative embodiments. It is not intended that the scope of the invention be limited in any way to the specific embodiments shown and described. It is intended that the invention be limited in scope only by the claims appended hereto, giving such claims the broadest interpretation and scope that they are entitled to under the law. It will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit or scope of the invention. It is intended that all such changes and modifications are encompassed in the invention as claimed.

Claims
  • 1. A circuit comprising: a bandgap circuit configured to provide an output reference voltage, wherein the bandgap circuit includes a first transistor, a second transistor, and an amplifier, and wherein the first and second transistors are coupled to the amplifier;a first compare circuit coupled to the first transistor and configured to remove a first current from a current node of the first transistor to correct the output reference voltage for low temperatures; anda second compare circuit coupled to the second transistor and configured to inject a second current provided to a current node of the second transistor to correct the output reference voltage for high temperatures.
  • 2. The circuit of claim 1, wherein the comparison made by the first compare circuit comprises comparing a voltage at the first transistor with a voltage threshold, and wherein the voltage threshold is based at least on the output reference voltage.
  • 3. The circuit of claim 2, wherein the first compare circuit removes the first current from the current node of the first transistor if a base emitter voltage of the first transistor satisfies a predetermined voltage level, and wherein the predetermined voltage level is based at least on the voltage threshold.
  • 4. The circuit of claim 1, wherein the comparison made by the second compare circuit comprises comparing a voltage at the second transistor with a voltage threshold, and wherein the voltage threshold is based at least on the output reference voltage.
  • 5. The circuit of claim 4, wherein the second compare circuit injects the second current into the current node of the second transistor if the base emitter voltage of the second transistor satisfies a predetermined voltage level, and wherein the predetermined voltage level is based at least on the voltage threshold.
  • 6. The circuit of claim 4, wherein the first and second compare circuits and the output reference voltage are coupled to a resistance network, and wherein the voltage threshold is based at least on the resistance network.
  • 7. A circuit comprising: a bandgap circuit configured to provide an output reference voltage, wherein the bandgap circuit includes a first transistor, a second transistor, and an amplifier, and wherein the first and second transistors are coupled to the amplifier; anda compare and current-removing circuit coupled to the first transistor and configured to remove a current from a current node of the first transistor to correct the output reference voltage for low temperatures based on comparing a voltage at the first transistor with a voltage proportional to the output reference voltage.
  • 8. A circuit comprising: a bandgap circuit configured to provide an output reference voltage, wherein the bandgap circuit includes a first transistor, a second transistor, and an amplifier, and wherein the first and second transistors are coupled to the amplifier; anda compare and current-injecting circuit coupled to the second transistor and configured to inject a current into a current node of the second transistor to correct the output reference voltage for high temperatures based on comparing a voltage at the second transistor with a voltage proportional to the output reference voltage.
  • 9. A circuit comprising: a bandgap circuit configured to provide an output reference voltage, wherein the bandgap circuit includes a first transistor, a second transistor, and an amplifier, and wherein the first and second transistors are coupled to the amplifier;a compare and current-removing circuit coupled to the first transistor and configured to remove a first current from a current node of the first transistor to correct the output reference voltage for low temperatures based on comparing a voltage at the first transistor with a voltage proportional to the output reference voltage; anda compare and current-injecting circuit coupled to the second transistor and configured to inject a second current into a current node of the second transistor to correct the output reference voltage for high temperatures based on comparing a voltage at the second transistor with a voltage proportional to the output reference voltage.
  • 10. A method comprising: receiving an output reference voltage;comparing, using a first compare circuit, a first voltage at a first current node of a first transistor with a first voltage threshold, wherein the first voltage threshold is based at least on the output reference voltage;removing a first current from the first current node of the first transistor to correct the output reference voltage for low temperatures based at least on said comparing a first voltage;comparing, using a second compare circuit, a second voltage at a first current node of a second transistor with a second voltage threshold, wherein the second voltage threshold is based at least on the output reference voltage; andinjecting a second current into the first current node of the second transistor to correct the output reference voltage for high temperatures based at least on said comparing a second voltage.
  • 11. A method comprising: receiving an output reference voltage from an amplifier;removing a first current from a first current node of a first transistor to correct the output reference voltage for low temperatures based on a comparison made by a first compare circuit coupled to the first transistor, wherein the first transistor is coupled to the amplifier; andinjecting a second current into a first current node of a second transistor to correct the output reference voltage for high temperatures based on a comparison made by a second compare circuit coupled to the second transistor, wherein the second transistor is coupled to the amplifier.
  • 12. The method of claim 11, wherein the comparison made by the first compare circuit comprises comparing a voltage at the first transistor with a voltage threshold, and wherein the voltage threshold is based at least on the output reference voltage.
  • 13. The method of claim 12, wherein the first current is removed from the first current node of the first transistor if a base emitter voltage of the first transistor satisfies a predetermined voltage level, and wherein the predetermined voltage level is based at least on the voltage threshold.
  • 14. The method of claim 11, wherein the comparison made by the second compare circuit comprises comparing a voltage at the second transistor with a voltage threshold, and wherein the voltage threshold is based at least on the output reference voltage.
  • 15. The method of claim 14, wherein the second current is injected into the first current node of the second transistor if the base emitter voltage of the second transistor satisfies a predetermined voltage level, and wherein the predetermined voltage level is based at least on the voltage threshold.
  • 16. The method of claim 14, wherein the first and second compare circuits and the output reference voltage are coupled to a resistance network, and wherein the voltage threshold is based at least on the resistance network.
RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 13/157,761, filed on Jun. 10, 2011, which is a continuation of U.S. application Ser. No. 12/749,337, filed on Mar. 29, 2010, now U.S. Pat. No. 7,960,961, which is a continuation of U.S. application Ser. No. 11/446,036, filed on Jun. 2, 2006, now U.S. Pat. No. 7,688,054, which applications are incorporated by reference herein in their entirety.

Continuations (3)
Number Date Country
Parent 13157761 Jun 2011 US
Child 13863169 US
Parent 12749337 Mar 2010 US
Child 13157761 US
Parent 11446036 Jun 2006 US
Child 12749337 US