The invention relates to bandgap circuits, and more particularly, to bandgap reference circuits capable of generating bandgap voltage without varying temperature and manufacturing variations.
In integrated circuits, while reference generators are required output voltages thereof are typically fixed at 1.23V and are not applicable in low voltage operation.
The operational amplifier OP11 includes a positive input terminal coupled to the connection (node A) between the resistors R10 and R11, and a negative input terminal coupled to the connection (node B) between the resistor R12 and the emitter terminal of the BJT Q12. The operational amplifier OP11 normalizes the voltages on the nodes A and B, and generates a bandgap voltage VBG at the connection between the resistor R13 and the drain terminal of the PMOS transistor M11.
the parameter VT is a positive temperature coefficient. Thus, the voltage across the resistors R12 and R13 has a positive temperature coefficient, and the voltage VBE2 a negative temperature coefficient. Consequently, a stable voltage VBG unaffected by temperature and manufacturing variations is obtained.
The reference voltage VBG with temperature compensation, however, is limited to 1.23V because the negative temperature coefficient is a constant. Thus, this conventional reference circuit cannot provide required reference voltage for low voltage operation.
Embodiments of the invention provide a bandgap reference circuit, in which a current generator includes a first bipolar junction transistor (BJT) and generates a first positive temperature coefficient current thereby producing a negative temperature coefficient voltage between a base terminal and an emitter terminal of the first bipolar junction transistor. A single-end gain amplifier includes a positive input terminal coupled to the emitter terminal of first the bipolar junction transistor and an output terminal. A first resistor is coupled between the output terminal of the single-end gain amplifier and an output terminal of the bandgap reference circuit to generate a first current. A current-to-voltage converter is coupled to the first resistor to convert the first positive temperature coefficient current and the first current to a bandgap voltage.
Also provided is another bandgap reference circuit. In the bandgap reference circuit, a current generator has first bipolar junction transistors (BJTs) connected in parallel and generates a first positive temperature coefficient current, thereby producing a negative temperature coefficient voltage between base terminals and emitter terminals of the first bipolar junction transistors. A single-end gain amplifier includes a positive input terminal coupled to the emitter terminals of the first bipolar junction transistors and an output terminal. A first resistor is coupled between the output terminal of the single-end gain amplifier and an output terminal of the bandgap reference circuit to generate a first current. A current-to-voltage converter is coupled to the first resistor to convert the first positive temperature coefficient current and the first current to a bandgap voltage.
Also provided is another bandgap reference circuit. In the bandgap reference circuit, a current generator includes a first bipolar junction transistor (BJT) to generate a first positive temperature coefficient current and a plurality of second bipolar junction transistors connected in parallel to generate a second positive temperature coefficient current. A first resistor is coupled between an emitter terminal of the first bipolar junction transistor and an output terminal of the bandgap reference circuit to generate a first current. A second resistor is coupled between the output terminal of the bandgap reference circuit and emitter terminals of the second bipolar junction transistors to generate a second current. A current-to-voltage converter is coupled to the first and second resistors to convert the first and second positive temperature coefficient currents and the first and second currents to a bandgap voltage.
Embodiments of the invention can be more fully understood by the subsequent detailed description and examples with reference made to the accompanying drawings, wherein:
a and 3b show a bandgap reference circuit of a first embodiment of the invention;
a and 4b show a bandgap reference circuit of a second embodiment of the invention;
a and 5b show a bandgap reference circuit of a third embodiment of the invention.
a shows simulated output of the bandgap reference circuit shown in
b shows simulated output of the bandgap reference circuit shown in
It should be noted that the resistor R21 generates the negative temperature coefficient current IVBE1 when the bandgap voltage is less than that between the emitter terminal and base terminal of the BJT Q21. Conversely, the resistor R21 generates the positive temperature coefficient current IVBE2 when the bandgap voltage exceeds the voltage between the emitter terminal and base terminal of the BJT Q21.
First Embodiment
a and 3b show a bandgap reference circuit of a first embodiment of the invention. As shown in
The PMOS transistors M31˜M33, resistor R30, an operational amplifier OP31, a single-end gain amplifier OP32, BJT Q32 and parallel connected BJTs Q31 constitute a current generator to generate the positive temperature coefficient current I1. The base terminals and the Collector terminals of the BJTs Q31 are coupled to a ground voltage, with the voltage VBE1 (not shown) between the base terminal and emitter terminals, and the current IC1 through each BJT Q31. Further, the base terminal and Collector terminal of the BJTs Q32 are coupled to the ground voltage, with the voltage VBE2 between the base terminal and emitter terminal, and the current I1 through the BJT Q32, wherein the voltage VBE2 is a negative temperature coefficient voltage.
The source terminals of PMOS transistors M31˜M33 are coupled to an operating voltage VCC, gate terminals of which are coupled to the output terminal of the operational amplifier OP31. The resistor R30 includes an end coupled to the emitter terminals of the BJTs Q31 and the other end coupled to the drain terminal of the PMOS transistor M31 and the positive input terminal of the operational amplifier OP31. The drain terminal of the PMOS transistor M32 is coupled to the negative input terminal of the operational amplifier OP31, the emitter terminal of the BJT Q32 and the positive input terminal of the single-end gain amplifier OP32.
The single-end gain amplifier OP32 includes a negative input terminal coupled to an output terminal thereof. The voltage at the output terminal of the amplifier OP32 is also VBE2 because the positive input terminal, the negative input terminal and the output terminal of the single-end gain amplifier OP32 have the same voltage level.
The resistor R31 is coupled between the output terminal of the single-end gain amplifier OP32 and the output terminal OT of the bandgap reference circuit, the current through the resistor R31 is I2. As shown in
Because there is no current between the positive and negative input terminals, the current I1 through the BJT Q32 exceeds the current IC1 through each BJT Q31 of the parallel BJTs such that the voltage across the resistor R30 is a positive temperature coefficient voltage, if the size of the PMOS transistors M31˜M33 is adequate. In the example shown in
As shown in
Second Embodiment
a and 4b show a bandgap reference circuit of a second embodiment of the invention. As shown, the bandgap reference circuit 400 is similar to the circuit 300 shown in
As shown in
Third Embodiment
a and 5b show a bandgap reference circuit of a third embodiment of the invention. As shown in
In
The source terminals of the PMOS transistors M51˜M53 are coupled to an operating voltage VCC, and gate terminals of which are coupled to the output terminal of the operational amplifier OP51. The drain terminal of the PMOS transistor M51 is coupled to the positive terminal of the operational amplifier OP51 and the resistors R50 and R51a. The drain terminal of the PMOS transistor M52 is coupled to the negative terminal of the operational amplifier OP51, the resistor R51b, and the emitter terminal of the BJT Q52. The drain terminal of the PMOS transistor M53 is coupled to the resistors R51a, R51b and R52.
The resistor R51a is coupled between the positive input terminal of the operational amplifier OP51 and the output terminal OT of bandgap reference circuit 500, wherein the current through the resistor R51a is I2. The resistor R51b is coupled between the negative input terminal of the operational amplifier OP51 and the output terminal OT of bandgap reference circuit 500, wherein the current through the resistor R51a is also I2, if R51a=R51b
It should be noted that an optional single-end gain amplifier can also be disposed between node A and the resistor R51a or between node B and the resistor R51b (not shown).
As shown in
The current I1 through the BJT Q52 exceeds the current IC1 through each BJT Q51 of the parallel BJTs such that the voltage across the resistor R50 is a positive temperature coefficient voltage, if the size of the PMOS transistors M51˜M53 is designed adequate. For example, the PMOS transistors M51˜M53 are the same size and the resistors R51a and R51b also are the same size, such that the current through the BJT Q52 and the total current of the currents through parallel connected BJTs Q51 are both I1, wherein resistances of R51a and R51b are both R51. Thus, resistor R52 combines the positive temperature coefficient current I1 with the three negative temperature coefficient currents I2 to a current IREF, and converts to a bandgap voltage VBG unaffected by temperature and manufacturing variations.
As shown in
a shows simulated output of the bandgap reference circuit shown in
While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the disclose is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Number | Date | Country | Kind |
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93111396 A | Apr 2004 | TW | national |
Number | Name | Date | Kind |
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5666046 | Mietus | Sep 1997 | A |
5933051 | Tsuchida et al. | Aug 1999 | A |
6060870 | Seevinck | May 2000 | A |
6111396 | Lin et al. | Aug 2000 | A |
Number | Date | Country | |
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20050237045 A1 | Oct 2005 | US |