This application is based upon and claims the benefit of priority from the prior Japanese Patent Application NO. 2009-187999 filed on Aug. 14, 2009, the entire contents of which are incorporated herein by reference.
The embodiments discussed herein are related to a bandgap voltage reference circuit.
A bandgap voltage reference circuit is a circuit generating a reference voltage that is less temperature-dependent on the basis of voltages of semiconductor P-N junctions. The reference voltage is widely used in analog circuits such as A-D converters, D-A converters, DC-DC converters, Low-Dropout (LDO) regulators, and temperature sensors.
The bandgap voltage reference circuit includes P-N junction elements such as bipolar transistors, resistance elements, and a differential amplifier. The bandgap voltage reference circuit combines a P-N junction voltage which has a negative temperature characteristic in which the voltage decreases with increasing temperature and a thermal voltage which has a positive temperature characteristic in which the voltage increases with increasing temperature, thereby canceling out the temperature dependencies of the voltages to generate a reference voltage that is less temperature-dependent.
The bandgap voltage reference circuit typically has two stable operation points: one is a shutdown point at which output voltage is near 0 V (a first stable point) and a second stable point at which a desired voltage is output. Therefore, a startup circuit is provided to prevent the bandgap voltage reference circuit from stopping operation at the first stable point during power-up. The startup circuit forcibly supplies a startup current to the bandgap voltage reference circuit on startup of the bandgap voltage reference circuit to raises the output voltage of the output terminal to a voltage near the second stable point, rather than the first stable point.
A bandgap voltage reference circuit that has such a startup circuit is described in Japanese Laid-Open Patent Publication No. 2006-23920, for example.
Since the startup circuit described above supplies a startup current to the output terminal in order to forcibly raise the output voltage to a desired voltage on startup of the bandgap voltage reference circuit, current consumption is increased. Especially in the case of a circuit that is repeatedly powered on and off, startup current consumed by the startup circuit at each startup is not negligible. Such startup current consumption reduces the battery life of a battery-operated apparatus.
According to a first aspect of the embodiments, a bandgap voltage reference circuit includes: a first P-N junction circuit generating a first voltage which changes according to a first characteristic; a second P-N junction circuit generating a second voltage which changes according to a second characteristic different from the first characteristic; an amplifier receiving the first and second voltages at a pair of input terminals and changing the amount of an output current provided from a high-voltage power supply to an output terminal according to a difference voltage between the first and second voltages, wherein an output voltage of the output terminal is provided to the first and second P-N junction circuits; and an output current controller causing the amplifier to provide the output current to the output terminal regardless of the difference voltage when the output voltage equals to or is smaller than a threshold voltage.
The object and advantages of the embodiments will be realized and attained by means of the elements and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description and are exemplary and explanatory and are not restrictive of the embodiments, as claimed.
The first P-N junction circuit 10 includes resistances R1 and R2 and a P-N junction element Q1 between the output terminal OUT and a low-voltage power supply (for example a ground) Vss and generates a voltage VB having a first characteristic at a coupling node B between the resistances R1 and R2. The second P-N junction circuit 12 has resistance R3 and a P-N junction element Q2 between the output terminal OUT and a low-voltage power supply Vss and generates a voltage VA having a second characteristic at a coupling node A between the resistance R3 and the P-N junction element Q2. The P-N junction area of the P-N junction element Q1 is greater than that of the P-N junction element Q2 by a factor of n (where n>1).
The P-N junction elements Q1 and Q2 in this example are PNP bipolar transistors in which the base and collector are shorted and the collector is coupled to the low-voltage power supply Vss. The base-emitter P-N junctions in the PNP bipolar transistors are used. That is, the emitter area ratio of the two transistors n:1 is used.
Here, let VBE1 and VBE2 denote the base-emitter voltages of the transistors Q1 and Q2, respectively, I1 and I2 denote the emitter currents of the transistors Q1 and Q2, respectively, and assume that the emitter currents I1 and I2 of the transistors Q1 and Q2 are equal to the corrector currents IC1 and IC2, respectively (I1=IC1, I2=IC2). Then the output voltage Vout of the bandgap voltage reference circuit in a stable state is
Vout=VBE2+R3*IC2 (1)
Since the voltages VA and VB at the pair of inputs of the operational amplifier A1 are equal in the stable state, the voltages at resistances R3 and R1 are equal: R3*IC2=R1*IC1. Therefore, the output voltage Vout is
Vout=VBE2+R1*IC1 (2)
When VA=VB, the emitter current density of the transistor Q1, which has a larger emitter size, is lower than that of the transistor Q2, therefore VBE2>VBE1. Since the voltage applied to resistance R2 is VBE2−VBE1, the current IC1 at resistance R2 is (VBE2−VBE1)/R2. Therefore, Equation (2) is rewritten as
Vout=VBE2+(R1/R2)*(VBE2−VBE1) (3)
Here, let IC1 and IC2 denote the corrector currents of the transistor Q1 and Q2, respectively, IS1 and IS2 denote the saturation currents of the transistors Q1 and Q2, respectively, k denote the Boltzmann constant, T denotes the absolute temperature, q denote electron charge, and VT denote thermal voltage VT=kT/q.
Then,
IC1=IS1*exp(VBE1/VT)
IC2=IS2*exp(VBE2/VT)
The equations are rewritten as given below to obtain the base-emitter voltages VBE1 and VBE2 of the transistors Q1 and Q2:
VBE1=Vhd T*ln(IC1/IS1)
VBE2=VT*ln(IC2/IS2)
Substituting VBE1 and VBE2 in Equation (3) yields the output voltage Vout as
Vout=VBE2+(R1/R2)*VT*ln(IS1IC2/IS2IC1) (4)
Since R1IC1=R3IC2, Equation (4) is rewritten as
Vout=VBE2+(R1/R2)*VT*ln(IS1R1/IS2R3) (5)
The first term of the right-hand side of Equation (5), the base-emitter voltage VBE2, has a negative increase characteristic in response to a temperature rise whereas the second term of the right-hand side has a positive increase characteristic in response to a rise of absolute temperature T. The temperature characteristics of resistances R1 and R2 are canceled out by division. Thus, the temperature characteristics of the first and second terms of the right-hand side of Equation (5) cancel out and therefore the range of fluctuations of the output Vout in the steady state of the bandgap voltage reference circuit in response to temperature changes is reduced. That is, a reference voltage Vout with a small fluctuation range that depends on temperature may be obtained.
As illustrated in
When the currents I1 and I2 flows, the voltages VB and VA become as follows.
VB=VBE1+I1R2
VA=VBE2
That is, as the output voltage Vout increases and the current I1 increases, the voltage VB increases to the level of the voltage VA and the operational amplifier A1 reaches the second stable point STB2 at which VB=VA. When the output voltage Vout and therefore current I1 further increases, the second stable point STB2 is passed and VB becomes greater than VA.
The vertical axis of the plot in the upper part of the
In this way, the output voltage Vout of the bandgap voltage reference circuit is controlled to a level around the second stable point STB2. The bandgap voltage reference circuit uses the operation of the operational amplifier A1 to output the output voltage Vout of Equation (5) at the second stable point STB2 as a reference voltage. Around the second stable point STB2, when VB becomes greater than VA, the operational amplifier A1 decreases the output current being provided to the output terminal OUT to reduce the output voltage Vout; when VB becomes smaller than VA, the operational amplifier A1 increases the output current being provided to the output terminal OUT to increase the output voltage Vout.
However, the operational amplifier A1 of the bandgap voltage reference circuit may not increase the output voltage Vout by itself during power-up. For example, since VB=VA=0 V during power-up, which is the first stable point STB1 state, the voltages at the input terminal pair of the operational amplifier A1 are equal and therefore the operational amplifier A1 may not increase the output voltage. This means that that the first stable point STB1 of the output voltage Vout is a shutdown point at which the bandgap voltage reference circuit shuts down.
Therefore, a startup circuit that forcibly increases the voltage at node A during power-up is usually provided in the bandgap voltage reference circuit in order to increase VB to a level higher than VA, thereby increasing the output voltage Vout to a level near the second stable point STB2.
As depicted in
Vout=(VBE2−Voff)+(R1/R2)*VT*ln(IS1R1/IS2R3) (6).
As illustrated in
The first P-N junction circuit 10 includes resistances R1 and R2 and a PNP transistor (P-N junction element) Q1 between an output terminal OUT and a ground Vss, which is a low-voltage power supply, and generates a voltage VB having a first characteristic at coupling node B between resistances R1 and R2. The second P-N junction circuit 12 includes resistance R3 and a PNP transistor (P-N junction element) Q2 between an output terminal OUT and the low-voltage power supply Vss and generates a voltage VA having a second characteristic at coupling node A between resistance R3 and the PNP transistor Q2. The emitter area of the PNP transistor Q1 is greater than that of the Q2 by a factor of n (where n>1). The circuit configuration described so far is the same as the circuit configuration in
The bandgap voltage reference circuit further includes an output current controller C1 which provides a disabled control signal 16 to the operational amplifier A1 to cause the operational amplifier A1 to provide an output current Iout to the output terminal Out regardless of the difference voltage at the input terminals when the output voltage Vout equals to or is smaller than a threshold voltage Vth. In other words, the disabled control signal 16 disables the function of the output current decreasing function of the operational amplifier A1, which has the functions of increasing and decreasing the output current, so that a larger output current is output to the output terminal.
The operational amplifier A1 includes a differential circuit which generates a differential output signal according to the difference voltage between inputs and an output current supply circuit which changes the amount of output current Iout according to the differential output signal, as will be described later. The disabled control signal 16 disables the function of output current decreasing function of the output current supply circuit, for example, and enables the output current increasing function. As a result, the output voltage Vout increases by the function of the operational amplifier A1 during power-up.
When the output voltage Vout reaches the threshold voltage Vth, the output current controller C1 enables the control signal 16. The enabled control signal 16 causes the output current controller C1 to perform normal operation to increase or decrease the amount of the output current on the basis of the differential output signal.
As illustrated in
In this way, the output voltage Vout may be raised quickly and stably by the operational amplifier A1 continuing to forcibly increase the output current Iout during power-up regardless of the difference voltage between the inputs. When the output voltage Vout reaches the threshold voltage Vth, the input voltage VA has become greater than VB. Accordingly, the output voltage Vout may be further increased by the normal operation of the operational amplifier A1 and stabilized at the second stable point STB2 even when the control signal 16 is enabled. The same applies if there is an offset voltage Voff, because VA′ has become greater than VB at the time when the output voltage Vout reaches the threshold voltage Vth.
The differential circuit formed by the transistors P1, P2, N3 and N4 and the current source CS1 generates a differential output signal 22 according to the difference between voltages at nodes A and B. The output current supply circuit, on the other hand, outputs a current from the current source CS2 to the output terminal Out as an output current Iout. The transistor N5 is a pull-down element. The transistor N5 changes its conduction according to the differential output signal 22 and absorbs a part of a current from the current source CS2 to the ground Vss. Increase or decrease of the absorbed current increases or decreases the output current Iout.
The transistor N6 which constitutes the output current controller C1 is in the off state until the output voltage Vout reaches the threshold voltage Vth of the transistor N6. Accordingly, the transistor N5, which is the pull-down element, is disabled and the operational amplifier A1 outputs all of the current from the current source CS2 as the output current Iout to raise the output voltage Vout regardless of the difference voltage between inputs. When the output voltage Vout reaches the threshold voltage Vth, the transistor N6 is turned on, the transistor N5 is enabled and the normal operation is started. In the normal operation, the operational amplifier A1 increases or decrease the output current Iout according to the difference voltage between the inputs and becomes stable at the second stable point described earlier.
This circuit is called series reference in which a current of the current source CS2 is set to a small value compared with the first exemplary circuit in
Operation of the third exemplary circuit is similar to the exemplary circuit in
Since the output transistor in the exemplary circuit is a P-channel transistor, node B is coupled to the positive input terminal of the operational amplifier A1 and node A is coupled to the negative input terminal. This coupling is the reverse of that in the examples in
When the output voltage Vout is lower than the threshold voltage Vth, the comparator C10 outputs a high-level signal to force the transistor N61 into conduction. As a result, the output current Iout increases. When the output voltage Vout is higher than the threshold voltage Vth, the comparator C10 outputs a low-level signal to force the transistor N61 out of conduction to cause the output transistor P8 to be driven and controlled by the differential output signal 24.
In the bandgap voltage reference circuit according to the second embodiment, the buffer circuit B1 is provided in order to increase the load driving capability of the operational amplifier A1 and the output 24 from the operational amplifier A1 is used to drive the buffer circuit B1 to change the amount of the output current. In this configuration, during power-up, the current control circuit C1 disables the function of decreasing output current of the output current supply circuit of the buffer circuit B1 to provide the output current Iout to the output terminal Out regardless of the difference between the inputs.
In the first exemplary circuit, the operational amplifier A1 may be considered as a differential circuit that generates a differential output signal 24 according to the difference between input voltages and the buffer circuit B1 may be considered as an output current supply circuit that outputs an output current Iout according to the differential output signal 24.
During a power-up period in which Vout is lower than Vth, the transistor N70 is turned off and the transistor P10 of the buffer circuit B1 is disabled to allow all current from the current source CC1 is to be output as the output current Iout. That is, the amount of the output current Iout is increased. When Vout becomes greater than or equal to Vth, normal operation is started. For example, the transistor N70 is turned on, the transistor P10 of the buffer circuit B1 is driven according to the differential output signal 24 from the operational amplifier A1, and the buffer circuit B1 increases or decreases the output current Iout being output to the output terminal Out.
In the normal operation, when VB<VA, the differential output signal 24 rises, the degree of conduction of the transistor P10 decreases (the conduction resistance increases), and the output current Iout increases. On the other hand, when VB>VA, the differential output signal 24 drops, the degree of conduction of the transistor 10 increases (the conduction resistance decreases), and the output current Iout decreases.
In the second exemplary circuit, the operational amplifier A1 may be considered as a differential circuit which generates a differential output signal 24R according to the difference between input voltages and the buffer circuit B1 may be considered as an output current supply circuit which outputs an output current Iout according to the differential output signal 24R.
During the power-up period in which Vout is lower than Vth, the transistor N70 is turned off and the transistor N11 of the buffer circuit B1 is disabled to allow all current from the current source CC1 is to be output as the output current Iout. When Vout becomes greater than or equal to Vth, normal operation is started. For example, the transistor N70 is turned on, the transistor N11 of the buffer circuit B1 is driven according to the differential output signal 24R from the operational amplifier A1, and the buffer circuit B1 increases or decreases the output current Iout being output to the output terminal Out.
The coupling of the input terminals of the operational amplifier A1 to nodes A and B is the reverse of that in the first exemplary circuit in
The first and second exemplary circuits in
In the circuit, during the power-up period in which Vout is lower than Vth, the transistor N70 is turned off and the transistor P10 of the buffer circuit B1 is disabled, the degree of conduction of the output transistor N12 increases, and the output current Iout is output with the increased driving capability. When Vout becomes greater than or equal to Vth, normal operation is started. For example, the transistor N70 is turned on, the transistor P10 of the buffer circuit B1 is driven according to the differential output signal 24 from the operational amplifier A1, the driving capability of the output transistor N12 is increased or decreased, and the output current Iout output to the output terminal Out increases or decreases.
In the normal operation, when VB equals to or is smaller than VA, the differential output signal 24 rises, the degree of conduction of the transistor P10 decreases, the driving capability of the output transistor N12 increases, and the output current Iout increases. On the other hand, when VB is greater than VA, the differential output signal 24 drops, the degree of conduction of the transistor P10 increases, the driving capability of the output transistor N12 decreases, and the output current Iout decreases.
In any of the first, second and third exemplary circuits in
As has been descried, the bandgap voltage reference circuit of any of the present embodiments uses the operational amplifier A1's function of providing an output current Iout is used to cause the output current Iout to be output to the output terminal at a high performance level regardless of the difference between input voltages, thereby increasing the output voltage Vout to a value near the second stable point during power-up. Therefore, a startup circuit does not need to be provided and accordingly current consumption may be minimized.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such For example recited examples and conditions, nor does the organization of such examples in the specification relate to a depicting of the superiority and inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
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