Patent Application
20060247811
Not applicable.
Not applicable.
This invention is in the field of digital audio systems, and is more specifically directed to audio volume control in such digital audio systems.
In recent years, digital signal processing techniques have become prevalent in many electronic systems. Tremendous increases in the switching speed of digital circuits have enabled digital signal processing to replace, in large part, analog circuits in many applications. For example, the sampling rates of modern digital signal processing are sufficiently fast that digital techniques have become widely implemented in audio electronic applications. These digital audio signal processing techniques now extend even to the driving of the audio output amplifiers.
As a result of these advances in digital audio amplifiers, and advances in digital signal processing generally, audio-visual receivers can now be realized nearly entirely in the digital domain. To the extent that audio signals remain to be processed, these digital receivers can convert any received analog audio input signals to digital form, and process the corresponding signals in a similar manner as the other digital audio signals in the system.
It has been observed, however, that the manner in which conventional digital receivers operate can insert audible artifacts into audible output. One source of such audible artifacts has been observed, according to this invention, to be discontinuities in the receipt and processing of volume control commands.
In conventional digital audio receivers, changes in volume to be applied to one or more audio channels are effected by way of a sequence of digital control commands and signals that are issued and processed within the system, in response to the user input. However, because of the limitations of the electromechanical man-machine interface (e.g., knobs or sliders on the receiver front panel), this sequence is not a steady series of monotonically increasing or decreasing values, but rather contains periodic or intermittent discontinuities in the desired volume change to be performed by the receiver.
For example, the system controller in a typical conventional receiver periodically polls the position of a front panel actuator, such as a knob or slider, to read the current desired audio volume setting. Upon detecting changes in position of the actuator as the human user changes the desired audio volume, the system controller will start to adjust the audio volume to the desired level by applying a series of incremental adjustments to the audio amplifier. In a typical digital audio amplifier system, these adjustments are communicated to preamplifier control circuitry by way of digital volume level commands communicated over a digital serial interface such as of the I2C or SPI type. The volume level commands are received by the preamplifier, which translates these digital volume level commands into audio gain adjustments. As known in the art, the available signal bandwidth of such digital serial interfaces can be quite limited, causing delay in the transmission of the digital volume level settings. As the preamplifier receives and performs the audio adjustments, the system controller continues to poll the actuator position, so that new volume commands may be received by the preamplifier before the adjustment is complete. Many conventional systems handle the receipt of new volume level commands by stopping the current volume adjustment process and then restarting the process to adjust the volume to the newest desired level. In other conventional systems, the system controller simply ignores new volume level commands until the pending volume adjustment process is complete. Either of these conventional approaches thus produces discontinuities in the rate at which the audio volume is adjusted. The limited bandwidth of the serial digital interface can exacerbate these discontinuities by further delaying the transmission of volume level commands in the system. It has been observed that these discontinuities during volume changes are reflected in audible artifacts in the audio output, which are of course unpleasant and undesirable.
An example of the effects of this operation, in a conventional digital receiver system, is illustrated in
As well known in the art, these irregularities in audio volume control and the resulting instantaneous changes in audio volume generate audible artifacts beyond the volume change itself. These audible artifacts, including “zipper” noise, “clicks”, “pops”, and the like, are annoying to the user and therefore undesirable.
Another type of discontinuity appears in conventional multiple channel audio receivers, due to differences in the rates at which individual channel information is read by the system controller. In the multiple channel context, this interruption of volume control execution can be heard in the “staggering” of volume changes among channels, with the volume for one channel changed by the receiver before the desired volume changes are applied to other channels. The staggering in audio volume control can be evident to the user as an out-of-balance sound, in which one or more channels are louder than one or more other channels.
As known in the art, it is possible to design digital filters of sufficient complexity to realize any arbitrary frequency response characteristic. It is therefore possible to derive complex low pass filters, within the digital processing channels, that would smooth the digital transitions from one volume level to another and thus eliminate such audible artifacts as clicks, pops, and zipper noise caused by the interruption and resumption of volume control commands, channels. However, the filter complexity required to achieve this effect are computationally complicated, and thus costly to implement into digital receiver equipment.
In a more general sense, digital signal processors in other applications also suffer from the effects of discontinuities in volume control commands. For example, users or automated controllers may apply volume (or gain) control in the receipt, encoding, and recording of audio input signals, for example in connection with digital audio-visual recording. These control operations in such encoding equipment may produce a repeating pattern of regular discontinuities, resulting in the encoding and recording of audible artifacts along with the desired audio and video content.
It is therefore an object of this invention to provide a digital audio processor in which the periodic sampling of irregular volume control command sequences do not result in audible artifacts in the processor output.
It is a further object of this invention to provide such a processor and system that efficiently effects excellent digital control of audio volume while avoiding audible artifacts and noise during volume control.
It is a further object of this invention to provide such a processor that can also process input audio signals, such as encoding and recording of such input audio, with recording volume changes smoothly applied to the encoded output without audible artifacts.
Other objects and advantages of this invention will be apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.
The present invention may be implemented into a digital audio, or audio-visual, receiver. A volume command processor in the receiver receives volume change inputs, for example from a human user via a system controller, and includes a timer that measures a selected time duration, but that resets upon receiving another user audio volume command. Those audio volume commands that have been received since a last instance of the timer reaching its selected time duration are queued into a “batch” command. Upon the timer reaching the selected time duration, the queued volume commands are processed in a linear ramp fashion, over a fixed duration.
The present invention will be described in connection with its preferred embodiment, namely as implemented into a digital audio-visual receiver, because it is contemplated that this invention is especially beneficial when utilized in such an application. However, it is contemplated that other applications may also benefit from this invention. For example, it is contemplated that this invention may be used in connection with any digital signal processor function that processes signals and in which volume control commands may be executed; one implementation of such a function is a digital signal processor that is encoding incoming audio signals for digital storing or transmission. Other applications may similarly benefit from this invention. Accordingly, it is to be understood that the following description is provided by way of example only, and is not intended to limit the true scope of this invention as claimed.
Referring now to
Digital audio decoder and processor 12 is a conventional integrated circuit, or integrated circuit core, for decoding and digitally processing the digital audio signals from multiplexer 16. Alternatively, digital audio decoder and processor 12 may be implemented as part of a larger-scale integrated circuit for decoding and processing digital video and audio signals, an example of which is an MPEG-2 decoder implemented using a digital signal processor such as from the DA610 class of digital signal processors available from Texas Instruments Incorporated. In either case, functions performed by digital audio decoder and processor 12, in combination with its random access memory 18, include decoding of the incoming digital data, applying the various digital audio data to corresponding channels supported by receiver 10, applying digital filters as desired, and formatting the digital audio data into a pulse-code-modulated (PCM) format, in this example. The PCM signals for each channel are then forwarded to pulse-width-modulation (PWM) audio processor 20.
PWM audio processor 20 is a conventional device for converting the PCM digital audio signals at its inputs to corresponding pulse-width-modulated (PWM) signals to drive the corresponding channel speakers SPKR, to an audio volume for each channel corresponding to digital commands communicated from system controller 30 over digital serial interface CTRL_CH which is preferably a relatively low-bandwidth digital serial interface such as of the well-known I2C or SPI types. PWM audio processor 20 preferably includes a preamplifier stage, which amplifies the incoming PCM signal to a desired level; according to this preferred embodiment of the invention, control of the audio volume is effected at this preamplifier stage. Alternatively, of course, volume control may be applied to later amplification stages within PWM audio processor 20, as known in the art. In either case, PWM audio processor 20 includes volume command processor 35, which receives the digital commands from system controller over digital serial interface CTRL_CH, and controls the adjustment of the audio volume for each channel according to the preferred embodiment of the invention, as will be described in further detail below.
PWM audio processor 20 also preferably includes conventional circuitry for performing the conventional functions of parametric speaker equalization or “voicing”, implementation of graphic equalizer presets, treble and bass adjustment, and precision soft volume control on the audio signal being processed for its channel. Other digital functions that can be performed by PWM audio processor 20 include loudness compensation to boost bass frequencies when the output for the channel is low, dynamic range compression, background noise floor compensation or noise squelch, center or sub-woofer channel synthesis, programmable dither, peak limiting and clipping, and other digital filter processing. These functions are typically performed by the application of biquad, or second-order IIR, digital filters in a cascade arrangement. A preferred example of this and other processing performed by PWM audio processor 20 is described in copending application Ser. No. 10/988,268, filed Nov. 12, 2004, and entitled “On-the-Fly Introduction of Interchannel Delay in a Pulse-Width-Modulation Amplifier”.
In this example, PWM audio processor 20 processes digital audio signals to produce PWM output signals for four channels. For each of these four channels, PWM audio processor 20 produces separate PWM control signals that are applied to a corresponding power stage 221 through 224, each of which drives a respective one of loudspeakers SPKR_1 through SPKR_4, as shown in
In
As mentioned above, system controller 30 provides audio source selection signals to multiplexer 16, and channel volume control signals to volume command processor 35 in PWM audio processor 20. System controller 30 also provides other control signals throughout receiver 10, including channel selection control to tuner 16 in response to user inputs received via front panel 25 or infrared receiver 27, and operational control signals applied to digital audio decoder and processor 12, also over a digital serial interface CTRL_CH in this example. As mentioned above, digital serial interface CTRL_CH may be implemented according to conventional control interface approaches, including the well-known I2C and SPI interface techniques. In any event, according to the preferred embodiment of this invention, volume command processor 35 includes circuitry for smoothly controlling changes in audio volume to be applied by PWM audio processor 20 to each of its audio channels, as will now be described in further detail.
As shown in
Within volume command processor 35, sequential logic 36 receives the inputs from volume command interface 34 over digital serial interface CTRL_CH. Sequential logic 36 is connected to a storage resource for the volume commands that are received via interface 34 for each of the audio channels. According to this embodiment of the invention, receiver 10 processes volume commands individually for each channel, on a channel-by-channel basis, as will be described below. In the example of
According to this preferred embodiment of the invention, volume command processor 35 includes timer 38. As will be evident from the following description, timer 38 measures a selected time duration, according to which the volume commands are processed by sequential logic 36. This time duration measured by timer 38 may be programmed by way of a control register (not shown) or other interface via commands from system controller 30; alternatively, this duration may be hardwired or otherwise pre-set at timer 38. The specific interval for timer 38 may be selected to considering the desired volume smoothness and tolerable latency in the system, and therefore may vary widely in varying applications. For example, it is contemplated that an interval of on the order of 5 msec will be suitable in typical applications.
Preamplifier control processor 32 generates and applies volume control signals, in response to control signals issued by sequential logic 36. In this example, with four channels being processed by receiver 10, volume command processor 32 issues four separate control signals, on lines VOL_CH_1 through VOL_CH_4, to PWM audio processor 20 for these four channels. Of course, more or fewer volume control signals are issued by preamplifier control processor 32, depending on the number of channels supported by receiver 10. Preamplifier control processor 32 may be constructed as combinational or sequential logic, or programmable logic, for performing the functions described herein. It is contemplated that those skilled in the art having reference to this specification will be readily able to implement preamplifier control processor 32 in an architecture and realization suitable for specific applications, without undue experimentation.
The operation of volume command processor 35 in responding to and processing volume control commands, according to the preferred embodiment of the invention, will now be described, with reference to the state diagram of
In this example, the operation begins with a reset operation, which places sequential logic into IDLE state 42. Sequential logic 36 remains in IDLE state 42 until a volume control command is presented by interface 34 in system controller 30 over serial digital interface CTRL_CH. This volume control command may be a global volume command in which all channels have their volume level changed, or may be a volume command directed to one or a subset of the available channels. Sequential logic 36, and thus volume command processor 35 itself, takes no action toward changing the audio output volume, but instead simply stores an indication of the volume level communicated by the command in the appropriate one or more of registers 49 for the affected channels. Also in response to this volume control command, sequential logic 36 resets and starts timer 38 to begin counting or otherwise measuring its selected time duration, or interval, and effects the sequential logic event new_volume_event shown in
According to the preferred embodiment of the invention, sequential logic 36 remains in WAIT state 44 until the interval of timer 38 expires. However, if interface 34 receives a new volume command (new_volume_event of
Upon the interval of timer 38 elapsing, with no new volume control command being received, sequential logic 36 makes a transition to RAMP VOLUME state 46 (via event timer_expired as shown in
In process 50, preamplifier control processor 32 retrieves the current volume output level for each channel, for example by way of the current volume signal level generated by preamplifier control processor 32 to PWM audio processor 20. In process 52, preamplifier control processor 32 retrieves the most recent volume command for each channel from registers 49. This most recent volume command is the volume level most recently received, before the elapse of the interval measured by timer 38. As such, upon completion of process 52, preamplifier control processor 32 has available the current volume output and the most recent volume command for each channel. In effect, therefore, preamplifier control processor 32 performs “batch” processing of the volume commands that have been received from the first volume command that caused the initial starting of timer 38 through the most recent volume command that preceded the completed interval, as measured by timer 38, resulting in the current transition of sequential logic 36 to RAMP VOLUME state 46.
In process 54 according to this embodiment of the invention, preamplifier control processor 32 calculates a linear output ramp for the output volume control signal to be applied to each channel. According to one embodiment of the invention, a fixed ramp time duration is programmed into preamplifier control processor 32. This fixed ramp time duration is the time over which the output volume control signal is to be ramped from its current level to the desired level indicated by the most recently received volume command retrieved in process 52. It is contemplated that a typical fixed ramp time duration may be on the order of 30 to 90 msec, although of course the particular length of time can vary according to the particular implementation and desired performance.
Alternatively, the ramping of the output volume control signal need not be a linear ramping of volume over a fixed duration. According to another embodiment of the invention, it is contemplated that the volume can be changed in a proportional manner, for example at a selected rate of change in decibels per millisecond over a proportional time duration, i.e. with the time duration proportional to the magnitude of the desired volume change from the current volume level to the desired volume level. It is contemplated that these and other ramping approaches for changes in volume will be apparent to those skilled in the art having reference to this specification.
In any case, as a result of process 54, a ramp profile of the output volume control signal will be derived for each of the channels; considering that the different channels may have received different volume commands, or were originally at different volume levels, the ramp profile can vary from channel to channel. Indeed, in connection with a balance operation, it is contemplated that one channel may have an increasing volume while others may have a decreasing volume, over the same interval.
In process 56, preamplifier control processor 32 applies the ramping output volume control commands to preamplifiers 21, or to other circuitry, elsewhere within PWM audio processor 20. In this regard, it is contemplated that preamplifier control processor 32 itself will generate the ramping output commands. Alternatively, it is contemplated that digital logic or analog circuitry may be provided in PWM audio processor 20 between preamplifier control processor 35 and preamplifiers 21 to effect the desired volume ramp operation by interpreting a sequence of control signals (e.g., a data stream of changing digital values) from preamplifier control processor 35 and controlling the output volume accordingly.
While sequential logic 36 is in RAMP VOLUME state 46, during which preamplifier control processor 32 performs the process of
Upon completion of the ramped volume, sequential logic 36 exits RAMP VOLUME state 46. If no new volume command has been received (i.e., is pending) from system controller 30 in the meanwhile, sequential logic 36 returns to IDLE state 42 to await the next volume command. The volume control operation of sequential logic 36 then continues as described above. If a new volume command was forwarded by interface 34 in system controller 30 over interface CTRL_CH before the volume ramp operation was completed by preamplifier control processor 32, the pending events will cause sequential logic 36 to make a transition to WAIT state 44, at which point it again resets and restarts timer 38 as before, where sequential logic 36 remains until the timer 38 interval elapses with no new volume command, effecting again the transition to RAMP VOLUME state 46, with the resulting ramped volume control as described above.
Referring now to
As previously described relative to
During the ramping of the output volume between time t2 and time t3, additional volume commands were received, as evident from plot 2. According to the preferred embodiment of the invention, as described above relative to
It is understood that, as shown in
While the present invention has been described according to its preferred embodiments, it is of course contemplated that modifications of, and alternatives to, these embodiments, such modifications and alternatives obtaining the advantages and benefits of this invention, will be apparent to those of ordinary skill in the art having reference to this specification and its drawings. It is contemplated that such modifications and alternatives are within the scope of this invention as subsequently claimed herein.
