Patent Application
20150048839
Battery-powered computing systems and devices have been widely adopted for use in daily life. These systems and devices are designed to be more flexible and powerful, but are also more complex and consume more power. With advances in the design of battery-powered computing devices, the availability of sufficient power for the devices continues to be an ongoing concern. Because each new feature in a battery-powered computing device generally consumes charge from a battery, accurate measurement and/or estimation of the remaining amount of charge in the battery of the device is important.
Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, with emphasis instead being placed upon clearly illustrating the principles of the disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
Battery-powered computing systems are now designed to be more flexible and powerful, but are also more complex and consume more power. With advances in the design of battery-powered computing devices, the availability of sufficient power for the devices continues to be an ongoing concern. Because each new feature in a battery-powered computing device generally consumes charge from a battery, accurate measurement and estimation of the remaining amount of charge in the battery of the device is important.
Some battery-powered computing systems include power management processing circuitry that manages the supply of power in a system. This power management processing circuitry may be designed for certain needs, such as the need for accurate measurement and profiling of charge stored in a battery. Without accurate knowledge of the amount of charge stored in the battery, the battery-powered computing system may be susceptible to sporadic and unexpected shutdown, without warning, which may be frustrating to users. Further, such unexpected shutdown may result the critical data being lost, further tending to user frustration.
In this context, accurate charge measurement or integration over time based on a calibration factor is described herein. According to certain aspects, the amount of charge stored in a battery is accumulated over time and adjusted using a calibration factor. In one embodiment, the calibration factor is determined by generating a replica current which comprises a scaled factor of a battery charging current. A calibration reference voltage is measured based on the replica current, and a charge reference voltage is measured based on the battery charging current. A calibration factor is determined based on an evaluation of the charge reference voltage and the calibration reference voltage. In turn, the amount of charge in a battery is accumulated over time using the calibration factor. In various embodiments, the calibration factor provides a factor by which a relatively low-tolerance reference circuit is adjusted, to achieve higher accuracy without substantially increased cost.
Turning now to the drawings, an introduction and general description of exemplary embodiments of a system is provided, followed by a description of the operation of the same.
The charging power source 140 may include any suitable power source for charging the battery 150. In various embodiments, the charging power source 140 may be capable of sourcing a suitable range of current (e.g., 100 ma-3 A) at a suitable voltage (e.g., 3.3-24 V) for charging the battery 150. The battery 150 may be embodied as any rechargeable battery suitable for the application, such as a lithium-ion, nickel-metal-hydride, or other battery variant, without limitation. The charge reference 160 includes a reference circuit element, such as a reference resistor, which is relied upon by the system 10 to determine an amount (e.g., magnitude) of the charging current Ichg that is supplied to charge the battery 150. As further described below, based on the amount of charging current Ichg, the system 10 may determine or estimate an amount of charge available in the battery 150. In connection with other variables, such as an output voltage of the battery 150, for example, the PMU 100 may maintain an estimated value of power or charge available in the battery 150 for use by the system 10.
The PMU 100 includes a PMU control circuit 102, a memory 104, a calibration reference 130, and a battery charger 110. Generally, the PMU control circuit 102 coordinates the operation of the PMU 100, as described herein. In this context, the PMU control circuit 102 may include one or more processing circuits, application specific circuitry, combinatorial logic, or any combination thereof, without limitation. As further described below, the PMU control circuit 102 may evaluate a charge reference voltage Vc (i.e., Vc−Vn) induced across the charge reference 160 based on the battery charging current Ichg, and evaluate a calibration reference voltage Vr (i.e., Vr−Vn) induced across the calibration reference 130 based on a replica current Irep. The PMU control circuit 102 may further determine a calibration factor based on an evaluation of one or more measurements of the charge reference voltage Vr and the calibration reference voltage Vc. As described herein, the calibration factor may be relied upon by the PMU 100 to more accurately estimate the amount of power or charge stored in the battery 150.
The memory 104 may be embodied as any suitable memory (e.g., volatile, non-volatile, etc.) for the application of storing information. The memory 104 may, in part, store computer-readable instructions thereon that, when executed by the PMU control circuit 102, for example, direct the PMU control circuit 102 to execute various aspects of the embodiments described herein.
The battery charger 110 includes circuitry for charging the battery 150 based on power supplied from the charging power source 140. In that context, the battery charger 110 includes a charging path circuit that couples the charging current Ichg to the battery 150, for charging the battery, and a replica current generator circuit that generates the replica current Irep, for evaluating the expected characteristics of the charge reference 160 and/or determining a calibration factor. In one embodiment, the replica current Irep includes a scaled magnitude or scaled factor of the battery charging current Ichg. The battery charger 110 further includes a measurement circuit that measures the charge reference voltage Vc across the charge reference 160 and measures the calibration reference voltage Vr across the calibration reference 130. In certain aspects of the embodiments, values of the charge and calibration reference voltages Vc and Vr are stored and evaluated by the PMU control circuit 102 for one or more values of the battery charging current Ichg and the replica current Irep. In other words, as further described below, the battery charger 110 varies the battery charging current Ichg and, proportionately, the replica current Irep. In turn, the measurement circuit of the battery charger 110 measures the charge and calibration reference voltages Vc and Vr for various values of the battery charging current Ichg and the replica current Irep.
The calibration reference 130 includes a reference circuit element, such as a known or determined impedance or reactance circuit element, which is relied upon by the system 10 to determine an amount (e.g., magnitude) of the replica current Irep. In various embodiments, the calibration reference 130 may be embodied as a circuit element of the PMU 100 itself, or it may be embodied as a circuit element external to the PMU 100. The calibration reference 130, in one embodiment, may include a high-tolerance reference resistance, such as a high-tolerance 1 or 10 Ω resistor, for example. In other embodiments, the calibration reference 130 may include a high-tolerance reference capacitance.
Before turning to
In this context, it is noted that a significant source of error in the determination of the state of charge stored in the battery 150 may be attributable to the accuracy of the impedance of the charge reference 160 (e.g., the 0.01 Ω resistor), particularly due to its relatively small impedance value. Variations in the actual impedance of the charge reference 160 may be caused by resistor tolerance, printed circuit board layout variances, and manufacturing variability, for example, among other factors. Further, calibrating or evaluating the actual impedance value of the charge reference 160 in production is costly. It should be noted that the charge reference 160 cannot be increased to an arbitrarily large value to improve its accuracy and reduce manufacturing tolerance because, for example, increasing the impedance may result in an undesired increase in resistive power loss in the system 10.
Turning briefly to
Because the actual impedance value of the charge reference 160 is unlikely to be known with perfect precision, however, actual values (e.g., 404A and 404B) of Vc measured for various values of Ichg may deviate from the expected charge reference line 402, as illustrated in
To ensure stable and expected system performance, some manufacturer's specifications specify that total error in a measured or estimated battery “state of charge” be no greater than 5%. This is attributed to the fact that, without accurate knowledge of battery state of charge, a system may be susceptible to sporadic and unexpected shutdown, without warning, which may be frustrating to users. Further, such unexpected shutdown may result the critical data being lost, further tending to user frustration.
In this context, the embodiments described herein provide a cost-effective and flexible means of more accurately evaluating and measuring the state of charge in the battery 150. As noted above and described in further detail below, the system 10 determines a calibration factor by which values of the reference voltage Vc and/or charge flowing into or out of the battery 150 may be adjusted to compensate for variability in the value of the charge reference 160. In this sense, the calibration factor may be relied upon to compensate for unknown resistor tolerances, printed circuit board layout variances, and manufacturing variabilities, for example, in the system 10.
To charge the battery 150, the charging path transistor 112 may couple and/or drive the charging current Ichg to the battery 150 and the reference resistor 162. Control of the charging current Ichg to the battery 150 may be actuated via control of the gate voltage Vg. The gate voltage Vg may be controlled by other circuit elements of the PMU 100, as needed, depending upon various factors including whether the power source 140 is coupled to the system 10 and whether the battery 150 is fully charged, for example.
The replica current Irep is generated by the replica current generation circuit 114 based on the gate voltage Vg. In one embodiment, the replica current transistor 115 is designed to provide a replica current Irep that comprises a scaled factor or amount of the current Ichg provided by the charging path transistor 112, for the same gate voltage Vg. In various embodiments, the scaled factor may be 10, 100, or 1000, for example, without limitation. To maintain symmetry in device characteristics, the charging path transistor 112 may be embodied as several (e.g., 10, 100, 1000, etc.) transistors of a certain gate width, for example, and the replica current transistor 115 may be embodied as a single transistor of the same gate width and formed in silicon together with (or proximate to) the transistors that form the charging path transistor 112. Thus, it should be appreciated that, as a matter of device characteristics, the replica current transistor 115 is likely to inherit operating characteristics that are substantially the same as or identical to the characteristics of the transistors which form the charging path transistor 112. As such, based on the scale factor, the replica current Irep is likely to be embodied as an accurate replica of 1/10th, 1/100th, 1/1000th, etc. of the charging current Ichg.
In the example embodiment illustrated in
The charge reference voltage Vc and the calibration reference voltage Vr are alternately measured by the measurement circuit 120, depending upon the state of the switch 118. That is, for example, while a certain battery charging current Ichg is being supplied, the charge reference voltage Vc is measured with the switch 118 set to the position “1” according to the Cntl signal from the PMU control circuit 102. Before the battery charging current Ichg (and the replica current Irep) is changed in value (i.e., magnitude), the calibration reference voltage Vr is measured with the switch 118 set to the position “2” according to the Cntl signal from the PMU control circuit 102.
It is noted that, if the impedance of the calibration reference 130 is known to be, for example, 1000 times that of the reference resistor 162, and the value of the replica current is known to be, for example, substantially 1/1000th that of the charging current Ichg, then the value of the calibration reference voltage Vr may be expected to be the same as the charge reference voltage Vc. More generally, if the calibration reference 130 is N times the reference resistance 162 and the replica current is scaled by a factor of 1/M, then the overall scale between the charge reference voltage Vc and the calibration reference voltage Vr can be set to N/M. Beyond this potential difference in scale, any difference between the values of the Vr and Vc voltages is attributed to deviations from expected impedance values of the reference resistor 162 and/or the calibration reference 130. If, however, the impedance of the calibration reference 130 can be selected, known, or characterized to certain a level of accuracy, any difference between the values of Vr and Vc may be attributed to a deviation from an expected impedance value of the reference resistor 162 alone.
In this context, the embodiments described herein evaluate the charge and calibration reference voltages Vc and Vr over different corresponding values of Ichg and Irep, to determine a calibration factor representative of a deviation between expected and actual values of the impedance of the reference resistor 162. For example, in one embodiment, the measurement circuit 120 samples first and second charge reference voltages Vc1 and Vc2, respectively, at first and second charge currents Ichg1 and Ichg2. The measurement circuit 120 also samples first and second calibration reference voltages Vr1 and Vr2, respectively, at first and second replica currents Irep1 and Irep2. In turn, the first and second charge reference voltages Vc1 and Vc2 and the first and second calibration reference voltages Vr1 and Vr2 are stored in the memory 104 and evaluated by the PMU control circuit 102. As further described below, the measurement circuit 120 may take additional sample measurements of Vc and Vr, depending upon factors such as accuracy, speed, available memory, etc.
When evaluating the charge and calibration reference voltages Vc1, Vc2, Vr1, and Vr2, the PMU control circuit 102 may determine a charge scale difference between the first charge reference voltage Vc1 and the second charge reference voltage Vc2 (e.g., Vc1−Vc2), and determine a calibration scale difference between the first calibration reference voltage Vr1 and the second calibration reference voltage Vr2 (e.g., Vr1−Vr2). The PMU control circuit 102 may further determine a calibration factor based on a ratio of the calibration scale difference and the charge scale difference. Additional discussion of the determination of the calibration factor is described below with reference to
In various embodiments, the ADC 310 may convert an analog value into a digital n-bit representation of the analog value. The number of bits returned by the ADC 310 may vary among embodiments depending upon the number of bits needed for accurate measurements or other considerations. Under the supervision of the PMU control circuit 102, the measurement control circuit 320 controls the ADC 310 to sample the analog voltages Vc and Vr. The digital samples from the ADC 310 are returned to the PMU control circuit for storage and evaluation, as described herein.
It is noted that the calibration resistor 132 may be embodied as a circuit element external to the PMU 100. In one embodiment, the calibration resistor 132 may be embodied as relatively high-tolerance (i.e., high accuracy) 1, 10, or 100 Ω resistor, for example. It is further noted that a high-tolerance 10 or 100 Ω resistor is generally less costly than a high-tolerance 0.001 or 0.01 Ω resistor. Thus, according to aspects of the embodiments described herein, cost may be saved by selecting a low-tolerance reference resistor 162 and calibrating it against a relatively a high-tolerance calibration resistor 132.
In other embodiments, one or both of the charge reference 160 or the calibration reference 130 may be embodied as circuit elements other than resistors. For example, the calibration reference may be embodied as a high-tolerance capacitance, and the amount of charge stored in the capacitance over a certain period of time may be used to measure a voltage representative of the current Iref. This capacitance may be trimmed for accuracy after manufacturing, for example. In other variations, one or both of the charge reference 160 or the calibration reference 130 may be omitted. For example, the charge reference 160 may be omitted, and the amount of charge stored in the battery 150 may be determined only with reference to the current Iref and the calibration reference 130.
After measurement, the first and second charge reference voltages Vc1404A and Vc2404B and the first and second calibration reference voltages Vr1406A and Vr2406B are stored in the memory 104 and evaluated by the PMU control circuit 102 (See e.g.,
After storing the charge and calibration reference voltages Vc1404A, Vc2404B, Vr1406A, and Vr24068, the PMU control circuit 102 determines a charge scale difference 420 between the first charge reference voltage Vc1404A and the second charge reference voltage Vc2404B, and determines a calibration scale difference 430 between the first calibration reference voltage Vr1406A and the second calibration reference voltage Vr2406B. The PMU control circuit 102 further determines a calibration factor based on a ratio, for example, of the calibration scale difference 430 and the charge scale difference 420.
In certain aspects, by working with the ratio of the calibration scale difference 430 and the charge scale difference 420, the PMU control circuit 102 normalizes, removes, or discounts the voltage differential 440, which may be generated as an inadvertent artifact of the replica current generation circuit 114 (See e.g.,
Turning to
In certain aspects, the flowcharts of
At reference numeral 506, the process 500 includes measuring at least one calibration reference voltage based on the replica current. Measuring the calibration reference voltage may include measuring a voltage drop induced by the replica current across a calibration reference, as described herein. In one embodiment, at reference numeral 506, the process 500 includes sampling a first calibration reference voltage at a first replica current and sampling a second calibration reference voltage at a second replica current. The sampling and measurement of the first and second calibration reference voltages (e.g., Vr1 and Vr2) at reference numeral 506 may be preformed as described above with reference to
At reference numeral 508, the process 500 includes measuring at least one charge reference voltage based on the battery charging current. Measuring the charge reference voltage may include measuring a voltage drop induced by the battery charging current across a charge reference. In one embodiment, at reference numeral 508, the process 500 includes sampling a first charge reference voltage at a first battery charging current and sampling a second charge reference voltage at a second battery charging current. The sampling and measurement of the first and second charge reference voltages (e.g., Vc1 and Vc2) at reference numeral 506 may be preformed as described above with reference to
The sampling and measuring at references 506 and 508 may be performed by the measurement circuit 120 as described herein. Between reference numerals 506 and 508, the measurement circuit 120 may switch between measuring voltages Vr across the calibration reference 130 and voltages Vc across the charge reference 160 (See
Continuing to reference numeral 510, the process 500 includes determining a calibration factor based on the measurements taken at reference numerals 506 and 508. In one embodiment, determining the calibration factor includes determining a calibration scale difference between the first calibration reference voltage and the second calibration reference voltage measured at reference numeral 506, and determining a charge scale difference between the first charge reference voltage and the second charge reference voltage measured at reference numeral 508. Further, at reference numeral 510, a ratio of the calibration scale difference and the charge scale difference may be calculated as the calibration factor. According to the example embodiments described above, the calibration factor may be determined or calculated by the PMU control circuit 102 based on the calibration and charge reference voltages stored in the memory 104.
At reference numeral 512, the process 500 includes integrating an amount of charge accumulated in the battery over time using the calibration factor. For example, according to the embodiments described above, the PMU control circuit 102 may measure the calibration ratio at reference numeral 510 from time to time, periodically, or at any suitable schedule. Afterwards, the ongoing measurement of charge into and out of the battery 150, and the ongoing integration thereof, may be adjusted, in part, by the calibration ratio. For example, if the calibration factor indicates that the actual impedance value of the charge reference 160 is greater than the expected value, the estimated state or amount of charge stored in the battery 150 may be reduced. Similarly, if the calibration factor indicates that the actual impedance value of the charge reference 160 is less than the expected value, the estimated state or amount of charge stored in the battery 150 may be increased. The amount of the reduction or increase in the estimates state of charge may depend upon the value of the calibration ratio, consistent with the embodiments described herein.
With regard to aspects of the structure or architecture of the system 10, in various embodiments, the PMU control circuit 102 or other processors or processing circuits of the system 10 may comprise general purpose arithmetic processors, state machines, or Application Specific Integrated Circuits (“ASICs”), for example. Each such processor or processing circuit may be configured to execute one or more computer-readable software instruction modules. In certain embodiments, each processor or processing circuit may comprise a state machine or ASIC, and the processes described in
The memories and/or registers described herein may comprise any suitable memory devices that store computer-readable instructions to be executed by processors or processing circuits. These memories and/or registers store computer-readable instructions thereon that, when executed by the processors or processing circuits, direct the processors or processing circuits to execute various aspects of the embodiments described herein.
As a non-limiting example group, the memories and/or registers may include one or more of an optical disc, a magnetic disc, a semiconductor memory (i.e., a semiconductor, floating gate, or similar flash based memory), a magnetic tape memory, a removable memory, combinations thereof, or any other known memory means for storing computer-readable instructions.
In certain aspects, the processors or processing circuits are configured to retrieve computer-readable instructions and/or data stored on the memories and/or registers for execution. The processors or processing circuits are further configured to execute the computer-readable instructions to implement various aspects and features of the embodiments described herein.
Although embodiments have been described herein in detail, the descriptions are by way of example. The features of the embodiments described herein are representative and, in alternative embodiments, certain features and elements may be added or omitted. Additionally, modifications to aspects of the embodiments described herein may be made by those skilled in the art without departing from the spirit and scope of the present invention defined in the following claims, the scope of which are to be accorded the broadest interpretation so as to encompass modifications and equivalent structures.
This application claims the benefit of U.S. Provisional Application No. 61/865,394, filed Aug. 13, 2013, the entire contents of which is hereby incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61865394 | Aug 2013 | US |
