Patent Application
20230318442
As new electronic devices are developed and integrated circuit (IC) technology advances, new IC products are commercialized. One example IC product is a switching converter, which provides an output voltage based on an input voltage. Switching converters include a controller and a power stage, and are used in various electronic devices to regulate power to one or more loads.
Battery surge due to sudden load demand is a common problem for electronic devices (e.g., smartphones) running off a single or dual battery. A conventional approach to mitigate the problem is to add costly multi-layer ceramic capacitors (MLCCs) at the power stage input and/or the power stage output to offset the current demand from the battery.
In one example embodiment, a switching converter controller comprises a synchronization circuit having a first synchronization circuit input, a second synchronization circuit, a first synchronization circuit output, and a second synchronization circuit output. The synchronization circuit is configured to: receive an early warning signal at the first synchronization circuit input; receive a load detection signal at the second synchronization circuit input; provide a first control signal at the first synchronization circuit output responsive to the early warning signal; and provide a second control signal at the second synchronization circuit output responsive to the load detection signal. The switching converter controller also comprises a driver circuit having a first driver circuit input, a second driver circuit input, a first driver circuit output and a second driver circuit output. The first driver circuit input is coupled to the first synchronization circuit output. The second driver circuit input is coupled to the second synchronization circuit output. The first driver circuit output is adapted to be coupled to a control terminal of an idle switch in parallel with an inductor of a power stage. The second driver circuit output is adapted to be coupled to a control terminal of a power switch of the power stage. The driver circuit is configured to adjust an idle switch drive signal at the first driver circuit output and a power switch drive signal at the second driver circuit output responsive to the first control signal and the second control signal.
In another example embodiment, a system comprises: a switching converter controller configured to selectively provide power switch drive signals and an idle switch drive signal responsive to an early warning signal and a load detection signal; power switches of a power stage coupled to the switching converter controller and controlled by the power switch drive signals; and an idle switch coupled to the switching converter controller and controlled by the idle switch drive signal, the idle switch in parallel with an inductor of the power stage.
The same reference numbers (or other reference designators) are used in the drawings to designate the same or similar (structurally and/or functionally) features.
In different example embodiments, the topology (e.g., the arrangement of the inductor and idle switch circuit 162 and the power switches 164) of the power stage 160 may vary. Example topologies for the power stage 160 include a boost converter topology, a buck converter topology, or a buck-boost converter topology. In a buck converter topology, VOUT at the power stage output 174 is less than the input voltage (VIN) provided to the power stage input 166 by the power supply 102. In a boost converter topology, VOUT is greater than VIN. In a buck-boost converter topology, VOUT may be greater than or less than VIN. In some example embodiments, the power stage 160 includes multiple inductor and idle switch circuits and multiple sets of power switches (e.g., a multi-phase power stage). In such embodiments, the switching converter controller 104 includes additional drive signals output for any additional power switches and idle switches. As another option, the idle switches for each inductor and idle switch circuit 162 may be included with the switching converter controller. In such embodiments, the switching converter controller 104 may omit outputs for idle switch drive signals since these drive signals will be internal to the switching converter controller 104. Instead, the switching converter controller 104 would include terminals to couple each power stage inductor in parallel with a respective idle switch included with the switching converter controller 104.
As shown, the switching converter controller 104 includes a first switching converter controller input 150, a second switching converter controller input 152, a third switching converter controller input 154, a first switching converter controller output 144, a second switching converter controller output 146, and a third switching converter controller output 148. The first switching converter controller input 150 is configured to receive VOUT from the power stage output 174. The second switching converter controller input 152 is configured to receive an early warning signal from the load 176. As another option, the system 100 includes a monitoring circuit or manager circuit separate from the load 176 to provide the early warning signal to the second input 152. The third switching converter controller input 154 is configured to receive VIN from the power supply 102. The first switching converter controller output 144 is configured to provide an idle switch drive signal (labeled “IDLE_CS”). The second switching converter controller output 146 is configured provide a high-side power switch drive signal (labeled “HS_CS”). The third switching converter controller output 148 is configured provide a low-side power switch drive signal (labeled “LS_CS”).
In some example embodiments, the switching converter controller 104 may include additional outputs for additional power switch drive signals and/or idle switch driver signals. to control power switches of the power stage 160. As another option, each idle switch may be part of the switching converter controller 104 or related IC. In such embodiments, the first switching converter controller output 144 is omitted and the switching converter controller 104 includes terminals to couple each idle switch in parallel with a respective inductor of the power stage 160.
To control the timing of the IDLE_CS, HS_CS, and LS_CS signals, the switching converter controller 104 includes a synchronization circuit 106 having a first synchronization circuit input 108, a second synchronization circuit input 110, a first synchronization circuit output 112, and a second synchronization circuit input 114. The first synchronization circuit input 108 is configured to receive the early warning signal. The second synchronization circuit input 110 is configured to receive a load detection signal. The load detection signal is, for example, VOUT or a signal based on VOUT dropping by a threshold amount.
In some example embodiments, the synchronization circuit 106 is configured to provide: a first control signal (CS1) at the first synchronization circuit output 112; and a second control signal (CS2) at the second synchronization circuit output 114. CS1 and CS2 are synchronized based on the early warning signal, the load detection signal, and possibly other criteria (e.g., the inductor current level, timers, or other criteria). In some example embodiments, the early warning signal is received approximately 20 to 50 us+decoding delay before a load increase. As shown, the switching converter controller 104 also includes an idle control circuit 116 having an idle control circuit input 118 and an idle control circuit output 120. In operation, the idle control circuit 116 is configured to provide an idle control signal (ICS) at the idle control circuit output 120 responsive to CS1 and possibly other criteria (e.g., the inductor current level, timers, and/or other criteria).
As shown, the switching converter controller 104 also includes a feedback control loop 122 having a first feedback control loop input 124, a second feedback control loop input 126, and a feedback control loop output 128. The first feedback control loop input 124 is configured to receive VOUT or a scaled version of VOUT. The second feedback control loop input 126 is configured to receive CS2. In operation, the feedback control loop 122 is configured to provide a feedback control signal (FCS) responsive to VOUT, a reference voltage (VREF), CS2, and/or other criteria. In some example embodiments, a feedforward signal may be used to adjust operations of the feedback control loop 122, where the feedforward signal is a function of VIN and/or VOUT and accounts for fast transients.
The switching converter controller 104 also includes a driver circuit 130. The driver circuit 130 includes a first driver circuit input 132, a second driver circuit input 134, third driver circuit inputs 136, a first driver circuit output 138, a second driver circuit output 140, and a third driver circuit output 142. The first driver circuit input 132 is configured to receive the idle control signal. The second driver circuit input 134 is configured to receive the feedback control signal from the feedback control loop output 128. The third driver circuit inputs 136 may to receive control signals based on control pulse frequency modulation (PFM) control, pulse-width modulation (PWM) control, multi-phase control, zero crossing detection, and/or other control options. In operation, the driver circuit 130 is configured to selectively provide: IDLE_CS to the first driver circuit output 138; HS_CS to the second driver circuit output 140; and LS_CS to the third driver circuit output 142 responsive to the idle control signal, the feedback control signal, and/or other criteria. As shown, the first driver circuit output 138 is coupled to the first switching converter controller output 144. The second driver circuit output 140 is coupled to the second switching converter controller output 146. The third driver circuit output 142 is coupled to the third switching converter controller output 148.
In some example embodiments, the first driver circuit output 138 (via the first switching converter controller output 144) is adapted to be coupled to a control terminal of an idle switch (e.g., the inductor of the indicator and idle switch circuit 162) in parallel with an inductor of the power stage 160. The second driver circuit output 140 (via the second switching converter controller output 146) is adapted to be coupled to the control terminal of one of the power switches 164 of the power stage 160. The third driver circuit output 142 (via the third switching converter controller output 148) is adapted to be coupled to the control terminal of another of the power switches 164 of the power stage 160. In operation, the driver circuit 130 is configured to adjust IDLE_CS, HS_CS, and LS_CS responsive to the first control signal (e.g., CS1 in
In some example embodiments, the power stage 160 has multiple phases, each of the phases having a separate inductor. In such embodiments, the switching converter controller 104 is configured to selectively provide idle switch drive signals (e.g., IDLE_CS) for respective idle switches in parallel with each separate inductor responsive to the first control signal (e.g., CS1 in
In some example embodiments, the switching converter controller 104 is configured to provide the idle switch drive signal to the control terminal of an idle switch (e.g., the idle switch of the inductor and idle switch circuit 162 in
In some example embodiments, the early warning signal indicates that there will be an increased load without providing additional details. In other example embodiments, the early warning signal indicates what the increased load will be. As another option, the early warning signal may indicate the timing of the increased load. In embodiments where the early warning signal includes increased load details and/or timing information, the switching converter controller includes logic to recover the increased load details and/or timing information and adjust its operations (e.g., adjust the IL target, adjust control/timing options for providing power switch drive signals, adjust control/timing options for providing idle switch drive signals, etc.).
In the example of
In the example of
In different example embodiments, the number of phases for the power stage 160A may vary. Also, any idle switches (e.g., S5 and S6) could be included with the switching converter controller 104A. In such embodiments, CSS5 and CSS6 will be internal to the switching converter controller 104A. In such case, the switching converter controller 104A would include terminals to couple each idle switch in parallel with a respective inductor of the power stage 160A.
In graph 400 of
In graph 500 of
In graph 600 of
In graph 700 of
In some example embodiments, a switching converter controller (e.g., the switching converter controller 104 in
In some example embodiments, a system (e.g., the system 100 in
In some example embodiments, the power stage has multiple phases, each of the phases having a separate inductor, and the switching converter controller is configured to selectively provide idle switch drive signals for respective idle switches in parallel with each separate inductor. In some example embodiments, the power stage has a multi-phase boost converter topology. In some example embodiments, the switching converter controller is configured to provide the idle switch drive signal to a control terminal of the idle switch to maintain inductor current in the inductor responsive to the inductor current reaching a threshold and until a load detection signal is received. In some example embodiments, the switching converter controller is configured to provide the idle switch drive signal to a control terminal of the idle switch to maintain inductor current in the inductor responsive to the inductor current being increased for a time interval and until a load detection signal is received. In some example embodiments, the time interval is predetermined and fixed. In other example embodiments, the time interval is adjustable.
In some example embodiments, the power stage has a buck converter topology and the switching converter controller is configured to maintain a target average inductor current in the inductor over time responsive to the early warning signal and until a load detection signal is received. In some example embodiments, the switching converter controller includes a synchronization circuit (e.g., the synchronization circuit 106 in
In this description, the term “couple” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by direct connection; or (b) in a second example, device A is coupled to device B through intervening component C if intervening component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.
As used herein, the terms “terminal,” “electrode,” “node,” “interconnection,” “pin,” “contact,” and “connection” are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to mean an interconnection between or a terminus of a device element, a circuit element, an integrated circuit, a device or other electronics or semiconductor component.
The example embodiments above may utilize switches in the form of n-channel field-effect transistors (“NFETs”) or p-channel field-effect transistors (“PFETs”). Other example embodiments may utilize NPN bipolar junction transistors (BJTs), PNP BJTs, or any other type of transistor for the switches described herein.
A device that is “configured to” perform a task or function may be configured (e.g., programmed and/or hardwired) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or reconfigurable) by a user after manufacturing to perform the function and/or other additional or alternative functions. The configuring may be through firmware and/or software programming of the device, through a construction and/or layout of hardware components and interconnections of the device, or a combination thereof.
A circuit or device that is described herein as including certain components may instead be adapted to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and/or integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and/or the sources to form the described structure either at a time of manufacture or after a time of manufacture, for example, by an end-user and/or a third-party.
Circuits described herein are reconfigurable to include the replaced components to provide functionality at least partially similar to functionality available prior to the component replacement. Components shown as resistors, unless otherwise stated, are generally representative of any one or more elements coupled in series and/or parallel to provide an amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.
Uses of the phrase “ground” in this description include a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground, and/or any other form of ground connection applicable to, or suitable for, the teachings of this description. In this description, unless otherwise stated, “about,” “approximately” or “substantially” preceding a parameter means being within +/−10 percent of that parameter.
Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.
