Patent Application
20210288612
The present application relates to a bias compensation circuit and an amplifying module, and more particularly, to a bias compensation circuit and an amplifying module capable of providing a stable biased current.
As a demand of 5G communication systems grows, millimeter wave technology is important in commercial consumer electronics. The good characteristics of GaAs (gallium arsenide) at high/radio frequencies have been widely used in the millimeter wave field. In practice, for mass production, the requirement of stability and invariability of turn on voltage of fabricated transistors after fabrication process or under various temperatures is an important issue.
In many applications of pHEMT, a bias circuit is required to compensate temperature and process variations and maintain stable characteristics. In the art, operational amplifiers or current sources are used to perform the compensation. The operational amplifier or current source may have finer control. However, combining operational amplifier or current source may require additional CMOS or bipolar process, which sacrifices the production cost and a degree of integration.
Therefore, it is necessary to improve the prior art.
It is therefore a primary objective of the present application to provide a bias compensation circuit and an amplifying module capable of providing a stable biased current, to improve over disadvantages of the prior art.
An embodiment of the present application discloses a bias compensation circuit coupled to an amplifying circuit. The bias compensation circuit comprises a transistor, comprising a first terminal, a second terminal and a control terminal; a first feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the control terminal of the transistor; and a second terminal; and a second feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the amplifying circuit; and a second terminal; and a first resistor, comprising a first terminal, coupled to the first terminal of the transistor; and a second terminal, configured to receive a first voltage.
An embodiment of the present application further discloses an amplifying module. The amplifying module comprises an amplifying circuit; and a bias compensation circuit, coupled to the amplifying circuit, the bias compensation circuit comprising a transistor, comprising a first terminal, a second terminal and a control terminal; a first feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the control terminal of the transistor; and a second terminal; and a second feedback transistor, comprising a control terminal, coupled to the first terminal of the transistor; a first terminal, coupled to the amplifying circuit; and a second terminal; and a first resistor, comprising a first terminal, coupled to the first terminal of the transistor; and a second terminal, configured to receive a first voltage.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
In the present application, a control terminal of a transistor is referred to a gate of the transistor, when the transistor is an FET (Field Effect Transistor) or a (p)HEMT ((Pseudomorphic) High Electron Mobility Transistor), or referred to a base of the transistor, when the transistor is a BJT (Bipolar Junction Transistor) or an HBT (Heterojunction Bipolar Transistor). A terminal, either a first terminal or a second terminal, of a transistor is referred to a source or a drain of the transistor, when the transistor is an FET or a (p)HEMT, or referred to an emitter or collector of the transistor, when the transistor is a BJT or an HBT. For illustrative purpose, the following description takes N-type (p)HEMT or FET as an example, which is not limited thereto.
The amplifying module 10 may be formed within a die. In an embodiment, the die may be a GaAs (Gallium Arsenide) die, which is not limited thereto. The amplifying module 10 may be fabricated by a pHEMT process, which is not limited thereto. Note that, the turn on voltage Vto and the threshold voltage Vth of the transistor(s) are used interchangeably in the present application.
The bias compensation circuit 12 comprises a transistor Q, feedback transistors QF1, QF2, and resistors R1-R4. In the embodiment illustrated in
The bias compensation circuit 12 exploits a negative feedback mechanism, which is illustrated in the below. A current flowing through the transistor can be expressed as eq. 1, which is known in the art. When the turn on voltage Vto or the threshold voltage Vth decreases/increases (due to fabrication or temperature variation), a current ID1 flowing through the transistor Q (and also a current ID2 flowing through the amplifying transistor QA) would increase/decrease, a voltage VG1 at the gate of the feedback transistors QF1, QF2 would decrease/increase due to VG1=Vref−ID1*R1. A voltage VG at the source of the feedback transistor QF1 and a voltage VG2 at the source of the feedback transistor QF2 would decrease/increase, such that the current ID1 would decrease/increase. Therefore, the (biased) current ID2 may be maintained consistent. In another perspective, the bias compensation circuit 12 utilizes a negative feedback loop formed by the transistor Q and the feedback transistors QF1, QF2 to stabilize the biased current ID2.
In a short remark, the bias compensation circuit 12 is able to reduce the current variation due to the turn on voltage variation and the temperature variation. Therefore, the bias compensation circuit 12 and the amplifying module 10 are able to provide a stable biased current, e.g., ID2.
Note that, the turn on voltage variation in unavoidable after a fabrication process. That is, fabricating a wafer (comprising a plurality of dies) may result in various turn on voltages corresponding to the plurality of dies. The bias compensation circuit 12 is suitable for a scenario that the turn on voltages of the transistors within one die are the same and the turn on voltages corresponding to different dies might be different, but not limited therein.
In summary, the bias compensation circuit of the present application utilizes the negative feedback loop to stabilize the biased current, such that the bias compensation circuit and the amplifying module are able to provide the stable biased current.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
