Patent Application
20190273474
The present invention reveals a new biasing method for solid state audio power amplifier despite of the Class of operation. Unlike conventional biasing technique, the new idea only relies on electrical feedback to generate the quiescent biasing current with which thermal coupling and tracking is not necessary. With the proposed biasing technology, a complimentary current sensing circuit is used to detect the current on the upper and lower power devices in the output stage and generate a corresponding complementary voltage output pair. The voltage output pair is then fed to the inputs of a novel complimentary differential amplifier pair along with a complimentary reference voltage pair to generate an amplified summed voltage output used as a representative of the quiescent biasing current to be regulated through a feedback loop containing the aforementioned circuit and a conventional voltage multiplier. The complimentary differential amplifier pair is constructed in a unique topology that the summed voltage output formed by its two complimentary voltage outputs in essential only tracks the sum of the upper and lower power transistor current when the amplifier output voltage falls into a small region around the zero voltage output point where the amplifier is for sure under Class A biasing condition, in other words, the summed current of the push-pull transistor pair is constant and is hence a good representative of the quiescent biasing current. The tracking of the summed current will automatically stop once the amplifier output voltage moves beyond that specific region and the value caught until the last tracking moment will be kept until next time when amplifier output moves back to the region again. This unique dynamic tracking of the summed output transistor current only in a small Class A operation region makes this architecture excel among other existing electrical feedback based biasing techniques by capable of application on both Class A and Class AB amplifiers while most other such techniques are only able to work with Class A amplifiers. Another important aspect of the proposed dynamic tracking scheme is that it is done purely in continuous analog mode, no sample and hold operation or digital circuit like output voltage related triggering circuit is used, completely eliminating the concern of bringing in extra distortion or noise. Furthermore, because the sum of the upper and lower transistor current is done by the complimentary amplifier other than by the emitter/source degeneration resistors directly, the use of those resistors is no longer necessary anymore, resulting in great potential in amplifier design targeting for higher performance as to be discussed in detail later.
For the reasons mentioned above, as compared to traditional thermo compensation biasing technique and existing electrical feedback based biasing techniques, the proposed biasing method possesses advantages in almost all performance aspects:
All the advantages as mentioned above suggest the new bias design could be a good candidate to replace the multi-decades long sloppy thermo compensation biasing technique seen in almost all solid state power amplifiers. Significant performance improvement and reduction of design iteration and product tuning can be expected if the new biasing technology is adopted. Furthermore, as no or low overall feedback design is getting more and more popular in power amplifier industry, a biasing technology providing accurate, reliable and stable biasing by its own is a great match to this trend. Furthermore, the capability of eliminating the use of emitter/source degeneration resistor is especially important, since it not only minimizes the amplifier output impedance, but also eliminates the abrupt trans-conductance change in the crossover region brought by otherwise the use of those resistors, resulting in a much less intrusive crossover distortion not only with lower amplitude but also containing mainly low order harmonics.
The invention relates to a biasing technology to be used in solid state audio power amplifiers to establish desired quiescent biasing for the power devices in the output stage.
In a typical solid state audio power amplifier, the output stage is constructed by a complimentary Emitter Follower (EF, when Bipolar Junction Transistors are used) or Source Follower (SF, when MOSFETs are used) circuits. In some cases a so-called Complimentary Feedback Pair (CFP) or Inverted Darlington circuit is used as well. For all the three circuit constructions, one of the most important design factors is the bias condition or operation class of the devices. Depending on the biasing current as related to output current at full signal swing, the operation class of the output stage (and hence the whole amplifier) can be characterized as Class-A, Class-AB and Class-B. The definition and performance characteristics of each operation class can be found in any textbook on amplifier design and hence will not be addressed in detail hereafter.
Among the three operation classes, the Class-A and Class-AB biasing both need to establish a quiescent biasing current in the output devices (despite of the significant difference of the current value between the two classes) under idling condition while the Class B biasing doesn't. Since the zero quiescent biasing imposes significant cross-over distortion in the amplifier output, pure Class B amplifier is not common in Hi-Fi audio amplifier industry and hence will not be further considered in the following discussion.
The quiescent biasing current is a very important (if not a determinative) factor in audio power amplifier design because its value and stability directly impacts key amplifier performances like distortion (sound quality), cost, weight, dimension, reliability, etc. However, on the other hand, designing a biasing scheme to be able to establish a well defined quiescent current and keep it over varying operation condition including ambient temperature changes is very challenging for solid state output stages constructed with any of the aforementioned circuit architectures as mentions above (i.e., EF, SF and CFP).
The biasing difficulty comes from the temperature dependency of the V-I characteristics of the semiconductor devices used in the output stage. BJT transistors' base-emitter voltage Vbe has negative temperature correspondence when current is held constant. It implies that the transistor Vbe will drop if its conducting current is kept constant as its junction temperature increases, or its conduction current will increase if the Vbe is kept constant while its junction temperature increases. The Vbe vs. Temperature relationship is characterized as Temperature Coefficient (TC). BJTs typically have −2.2mV/° C. TC on Vbe at room temperature. MOSFETs have more complicated temperature dependency as the TC changes with the conducting current, but at typical audio power amplifier operating condition the TC of Vgs is negative as well and typically is around −6 mV/° C. at room temperature.
Because of the negative TC of the power transistor device, the biasing voltage has to be able to compensate the Vbe or Vgs variation as temperature changes, otherwise the biasing current will deviate, resulting in performance variation including distortion behavior changes and reliability deterioration.
Traditional solution of this problem is to rely on a thermally-compensated Vbe multiplier circuit to generate a biasing voltage with desired temperature dependency able to compensate that of the output devices. A typical circuit implementing this technique is illustrated in
However, in reality such an ideal thermal-electrical compensation condition is very difficult (if not impossible) to achieve, and even if it is accomplished under certain condition the situation is still difficult to maintain as temperature and other operating condition changes, the reasons are explained as below.
First, in order to be able to do quantitative analysis and design of the thermal-electrical behavior of the circuit, thermal related aspects like thermal resistance, thermal capacitance and thermal models of all the devices and components are needed. Furthermore, since the ventilation and air circulation condition of the amplifier also affect the thermal behavior of the amplifier, those aspects need to be taken into account as well. However, in reality, except for very limited parameters like thermal resistance of power transistors, most thermal related quantities and aspects are either not available or difficult (if not impossible) to quantitative, hence accurate thermal modeling and analysis for such a system is almost impossible. Therefore, this thermal-electrical compensation technique in practice usually ends up with relying on mostly cut-and-tries on a prototype built on extremely simplified thermal modeling/calculation.
Second, the thermal conducting path in the compensation loop as described above possesses significant propagation delay due to the big mass of components like heat-sink. The thermal response speed in such a system is usually in the order of minutes or even tens of minutes. Such a long compensation lag could cause significant under-biasing or over-biasing under certain conditions. For example, assuming a music program containing an extended period of highlight followed by low level passage, in this case the biasing voltage generated corresponding to the hot condition of the heat-sink due to the prolonging high-level reproduction will postpone for a substantial period before the heat-sink cools down as the music changes from highlights to low level and continues. Since the junction temperature of the power transistors drops much faster than that of the heat-sink due to the significant mass difference, the transistors will be significantly under-biased before the heat-sink temperature finally catches up the already cooled down transistor junction temperature. Such an under-biasing condition will cause significant cross-over distortion, leading to real music reproduction performance worse than what the product datasheet would suggest as the distortion number of which is obtained under static thermal condition where a sine wave signal with constant amplitude is kept being applied to the amplifier during the measurement.
Third, the ambient temperature plays an important role in the thermal compensation scheme while this parameter is completely out of the control of the designer. The bias condition obtained through the thermal compensation technique can change dramatically from one ambient temperature to the other, resulting in unpredictable biasing condition in real operation.
On the other hand, despite of the problems mentioned above, the thermal compensation based biasing technique has been adopted in almost all amplifier products since solid state power amplifier is introduced and appeared to be successful for decades. This is because of two reasons which make the biasing issues less profound than it otherwise would be. First, in almost all power output stages, there is an emitter or source degeneration resistor connected in series with the transistor emitter or source node. The use of such a resistor g greatly reduces the equivalent trans-conductance of the combined transistor-resistor circuit hence decrease the sensitivity of the biasing current as related to the biasing voltage, resulting in a higher tolerance of the biasing voltage variation which helps maintaining biasing stability and preventing thermal run-away. The other reason is the application of global negative feedback. Many of the biasing issues and corresponding performance degradation are greatly mitigated by the feedback correction effect along with other imperfections, at least on measurement base. As a matter of fact, the traditional thermal static measurement technique used to measure amplifier distortion and other performances also helps hiding thermal dynamic related problems since the static measurement can't reveal music profile related amplifier dynamic behavior as mentioned before. In fact, the discrepancy between the real dynamic behavior and the statically measured datasheet numbers could be one reason to explain why amplifiers with similar measured distortion performance could sound audibly different.
In fact, biasing techniques without using thermal compensation have also been reported in the past. Most of them tried to use the more reliable and controllable electrical feedback to regulate the biasing. One representative example is the “Novel Quiescent Current Controller” proposed by Douglas Self in his book “Audio Power Amplifier Design Handbook, third edition” from Newnes. A circuit diagram of which is shown in
Back to the conventional counteractions against the thermal compensation related problems, neither the use of degeneration resistor nor the overall feedback is a preferred solution or fashionable design in today's audio power amplifier industry. First, the use of degeneration resistors not only reduces the equivalent trans-conductance of the output transistor hence increases output impedance, resulting in lower damping factor, but also exacerbates the so called “gm-doubling” phenomenon by bringing sharp bumps in the voltage transfer curve in the cross-over region as the insertion of the degeneration resistor disrupts the originally more smoothly conjugated combined trans-conductance of the complimentary transistors when the current conduction is handed over from one type of transistor to the other. The abrupt trans-conductance change in the crossover region simply implies that extra crossover distortions comprised of higher order harmonics are added to the amplifier output. On the other hand, despite of the controversial over the claimed superiority, eliminating or reducing the use of overall feedback is an undeniably prevailing trend among hi-end audio amplifier manufactures and audiophile users. However, by simply removing or reducing the powerful global feedback without taking other counteractions, all the biasing related issues, pairing with the emitter/source degeneration resistor related problems like increased output impedance and extra high order crossover distortions will become serious problems. Therefore, a new biasing technology which can overcome all these problems by its own and applicable on both Class A and Class AB while bring in only reasonable complexity and none or less performance degradation is highly called for.
The present invention is accomplished with the previously mentioned circumstances in mind. An object of the invention is to provide an accurate and reliable biasing technique able to overcome all the issues associated with the conventional thermal compensation based biasing technology and capable of working on both Class A and Class AB amplifiers at a cost of only reasonably increased complexity.
The proposed biasing technique is built up on pure electrical feedback and only well defined electrical parameters are needed for the design. Thermal coupling and thermal compensation is no longer necessary. By excluding the use of thermal related aspects in the feedback scheme, the biasing quality and performance in almost all aspect is greatly improved.
Compared to other electrical feedback based biasing techniques, this new method devised a unique current summing technique which automatically monitors the output stage upper and lower transistors' current only in the Class A region and stops doing so once the transistors move beyond this region. Because of this, the new method is applicable on both Class A and Class AB amplifiers. In addition, because the current summing is not done directly over the emitter/source degeneration resistors, the use of those resistors are not necessary, greatly increase amplifier performance improvement potential especially when non overall feedback design is in mind.
An implementation example of the proposed new biasing technique is shown in
The key uniqueness of the new design is that the complimentary differential amplifier pair is connected in a back-to-back fashion that the otherwise the power supply nodes of the N-type and P-type differential amplifier is tied together and left floating. By doing so the output voltage, the voltage across R4 and R6, can be done in a way that it only tracks the summed current on R11 and R12 for a small dynamic range corresponding to a certain output swing range of the power transistors and stops doing so once the power transistors move beyond this region as signal increases. Since a Class A or Class AB amplifier always has an output range within which the transistors are under Class A operation, as long as this Class A operation region is bigger than the tracking range of the complimentary differential amplifier, the output voltage of the complimentary differential amplifier can then be a good corresponding value of the output stage biasing current, hence a correct biasing voltage will be established for the output stage.
In order to make this happen, the value of R3˜R6 should be chosen in a way that when half of I3 or I5 flows in these resistors the voltage drop along R4 and R6 generates the Vbe voltage needed to conduct a current equal to I1 for Q2 and Q3 at room temperature; or in other words, it should be designed that Q4/Q5 pair conduct equal current on each side under quiescent condition (i.e., when no AC input applied), similarly the same requisite should holds true for Q6/Q7 pair as well.
The details of the desired Class-A-region-only common mode current tracking capability is discussed as below.
Under static condition, let's assume the desired biasing is already established through the feedback regulation mechanism and the complimentary differential pairs are under normal linear operation region since Q4/Q5 and Q6/Q7 pairs are designed with equal current conducting in each path under static condition as mentioned above. Now, assuming a small biasing current deviation occurs in the complimentary power device pair Q10/Q11, for example, in the case when the quiescent current starts increasing due to the heating up of the transistor and the negative temperature coefficient of the BJTs' base-emitter voltage after power-on. This then results in small increased voltage drops across R11 and R12, as this input change is small, the differential amplifier can be assumed still in normal linear amplification region hence resulting in an amplified bigger summed voltage output across R4 and R6. Since this summed voltage is also the input of the voltage multiplier, the multiplier output voltage, which determines the biasing current of the output stage, will decrease and hence counteract against the original quiescent current increasing, resulting in a regulatory function and finally stabilize the biasing.
During a dynamic situation under which a music signal is applied to the amplifier, the output complimentary transistor pair Q10/Q11 will operate in a push-pull manner, the instant current of each transistor moves around their quiescent value in an opposite direction until reaching a point at which one transistor starts shutting off while the other keeps increasing its current, indicating the Class-AB region is surpassed. When the instant current of the power devices Q10/Q11 dramatically changes, the complimentary differential pairs (i.e., Q4/Q5 and Q6/Q7) will stay on balanced condition only for the moment when output voltage resides in the close vicinity of its midpoint corresponding to zero input and enter un-balanced condition for most of the time due to the open loop essence of the circuit topology in terms of differential mode reaction. This is because, when small differential current component occurs between Q10 and Q11 and assuming a plus (i.e., increasing) current in Q10 and a minus (i.e., decreasing) current in Q11, the Q6/Q7 pair will generate a increased voltage drop on R4, and Q4/Q5 pair will generate a decreased voltage drop on R6. To the first order, this opposite voltage changes will cancel with each other and result in unchanged summed voltage across R4 and R6, hence no feedback reaction will take effect in terms of bias voltage/current regulation. Consequently, no feedback induced counteraction will take effect as well in terms of forcing the inputs of the differential pairs to approach the equalized situation as it does with common mode disturbances. Therefore, as the differential current instant increases and reaches a meaningful value, the relatively big open loop gain of the differential pairs will make the circuit enter unbalanced mode at which one path conducts the whole biasing current (i.e., I3 or I5) while the other path is completely shut-off. Under this unbalance condition, the summed voltage across R4 and R6 is still unchanged (to the first order) since the voltage drop across one resistor (i.e., R4 or R6) equals to the whole nominal value while the other is zero.
Another implementation example of the proposed new biasing technique is shown in
One more implementation of the proposed new biasing technique is that the current sensing resistors used in previous embodiments as denoted as R11, R12, R1 and R2 are replaced with diode connected transistors. The reason for this is to mitigate the tracking errors as the summed current of the push-pull transistors even under Class A region is not constant if a constant biasing voltage is applied. By using these diode connected transistors the non-linearity of the current-to-voltage conversion can cancel that of the output transistors, hence resulting in more stable biasing especially for Class A operation.
This is a regular application of a provisional application having an application No. of 62/467,133 and filing date of Mar. 5, 2017.
