The present invention relates to a wireless communication receiver device, and particularly relates to a binary frequency-shift keying demodulator.
Among wireless communication devices, the demodulator is often seen as one of the most important component in receiver end. Demodulators are utilized at the rear end of the receiver to demodulate the signal modulated from the front end, matching the initial information signal. Bit Error-Rate (BER) is the important key to rate such demodulators. Current Binary Frequency-Shift Keying (BFSK) signal demodulation methods can be categorized as coherent demodulation and incoherent demodulation, where the incoherent demodulation has lower resistance to noise. Among several coherent demodulation implementations, differential demodulator is easily structured and it also provides lower Bit Error-Rate. In addition, differential demodulator does not require local carrier wave, and it also demands lower precision of the resonator while it has lower phase error caused by the carrier signal. It is one of the most common demodulation methods, as it is referred in
The present invention is to provide a BFSK demodulator that is without external support and has a simpler but more condensed circuit structure design. The present invention provides a BFSK demodulator comprising a frequency-to-voltage converter, a differentiator circuit and a sampling selector circuit, wherein a BFSK information signal passes through the frequency-to-voltage converter and becomes a voltage input into a differentiator circuit. The sampling selector circuit receives an output produced by the differentiator circuit and reproduces a demodulated signal after filtering possible noises.
The present invention does not require any external support elements. The present invention has a simpler, smaller circuit board design, and has a lower power consumption rate.
As is seen in
The output voltage wave from the frequency-to-voltage converter has various spikes from the discreteness caused by charge injection. When the wave passes through a differentiator, the spikes would be exposed along with rising and falling edges. Since the ΔV signal at BFSK is considerably high compared with the narrow amplitude at the spikes, the output from the differentiator is a series of pulse signals with small influence from the spikes. Through proper voltage limitation in sampling selector circuit, demodulated digital signals can be retrieved by filtering the pulse signals.
Mp7 are ON and transistor Mn2 is OFF, while signals φ1
φ2 are both LOW. Capacitor C1 is being charged by Iin and Capacitor C3 is being charged by Ic. When the voltage on capacitor C3 is lower than Vref, D is HIGH turning transistor Mn6 ON, voltage on capacitor C1 is zero. When the voltage on capacitor C3 is higher than Vref, D is LOW, turning transistor Mn6 OFF, voltage on capacitor C1 is therefore rising. When the input signal Fin is HIGH, transistors Mp1
Mp7 are both OFF and transistor Mn2 is ON, φ2 turns HIGH first while φ1 stays LOW, charges being rearranged on capacitors C1 and C2. Then φ2 turns LOW, φ1 turns HIGH, capacitors C1
C3 start discharging until the voltage reach zero, and therefore φ1
φ2 both turn back to LOW, until next signal period. The voltage on capacitor C2 is referring to the voltage of the information frequency signal. It is well known that with a smaller capacitor C2, more frequent capacitor C1 charges, the voltage on capacitor C2 is closer to the initial voltage on capacitor C1. The purpose of adding a charging time control circuit here is to reduce the BER while operating at a better signal to noise ratios by enlarging the BFSK differential voltage Δ V under a limited source voltage. Transistor Mp5 is implemented to reduce the charge injection effect caused from the ON/OFF actions of transistor Mn4.
The present invention adopts the current mode differentiator because a simple structured differentiator does not employ a traditional feedback circuit, and it not only has a lower power consumption rate, but also has a broader bandwidth.
The transmitting function of the differentiator circuit is as follows.
gin is the output admittance from the last level.
Since the output from the frequency-to-voltage converter is a voltage signal, a converting process conducted by a voltage-to-current converter is necessary to produce a current signal input to the current mode differentiator, as it is designed at the first level in the present differentiator circuit. It is therefore needed a current-to-voltage converter to convert the current output from the differentiator into a voltage signal.
Properly selecting reference voltage Vref1 and Vref2 can filter out numerous high frequency noises, especially the discreteness caused by the charge injection effect from the frequency-to-voltage converter.
Number | Date | Country | Kind |
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200410017458.4 | Apr 2004 | CN | national |