Claims
- 1. In a system including a communication path for transmitting data on a network and receiving data from the network, apparatus for adaptively adjusting the system to reduce data transmission errors comprising:
a transmitter arranged to convert the data to a form transmittable on the network; a receiver arranged to convert the data received from the network to converted data having a form suitable for analysis; at least a first component in the communication path having a transfer characteristic adjustable by at least a first control signal; a module arranged to analyze the converted data to generate one or more error signals responsive to errors in the converted data; and a controller responsive to the one or more error signals arranged to generate at least the first control signal to adjust the transfer characteristic of the first component.
- 2. The apparatus of claim 1 wherein the network comprises an optical network.
- 3. The apparatus of claim 1 wherein the component comprises a laser operated with a bias current and wherein the first control signal adjusts the bias current in order to adjust the transfer characteristic.
- 4. The apparatus of claim 3 wherein the laser is included in the transmitter.
- 5. The apparatus of claim 1 wherein component comprises an amplifier, wherein the transfer characteristic comprises an adjustable nonlinear transfer characteristic and wherein the first control signal adjusts the nonlinear transfer characteristic.
- 6. The apparatus of claim 1 wherein the amplifier is included in the receiver.
- 7. The apparatus of claim 6 wherein the controller generates a second control signal and further comprising a second component comprising a laser included in the transmitter, said laser defining a second transfer characteristic and being operated with a bias current, said second control signal adjusting the bias current in order to adjust the second transfer characteristic.
- 8. The apparatus of claim 1 wherein the module comprises:
a detector arranged to generate a first error signal corresponding to the number of errors in a number of bits of the data; and a counter arranged to generate a second error signal corresponding to the number of bits of the data.
- 9. The apparatus of claim 8 wherein the controller comprises a processor arranged to divide the number of errors by the number of bits.
- 10. The apparatus of claim 1 wherein the communication path includes the transmitter and the receiver.
- 11. In a system including a communication path defining at least a first transfer characteristic for transmitting data on a network and receiving data from the network, a method for adaptively adjusting the system to reduce data transmission errors comprising:
converting the data in the communication path to a form transmittable on the network; converting the data in the communication path received from the network to converted data having a form suitable for analysis; analyzing the converted data to generate one or more error signals responsive to errors in the converted data; generating at least a first control signal in response to the one or more error signals; and adjusting at least the first transfer characteristic of the communication path in response to the first control signal.
- 12. The method of claim 11 wherein the network comprises an optical network.
- 13. The method of claim 11 wherein the first transfer characteristic comprises a laser transfer characteristic controlled with a bias current and wherein the first control signal adjusts the bias current.
- 14. The method of claim 11 wherein the first transfer characteristic comprises an adjustable nonlinear transfer characteristic and wherein the first control signal adjusts the nonlinear transfer characteristic.
- 15. The method of claim 11 wherein the communication path defines a second transfer characteristic, said method further comprising:
analyzing the converted data to generate a second control signal in response to the one or more error signals; and adjusting the second transfer characteristic of the communication path in response to the second control signal.
- 16. The method of claim 11 wherein said generating one or more error signals comprises:
generating a first error signal corresponding to the number of errors in a number of bits of the data; and generating a second error signal corresponding to the number of bits of the data.
- 17. The method of claim 16 wherein said generating the first control signal comprises dividing the number of errors by the number of bits.
CROSS-REFERENCE TO RELATED APPLICATIONS/INCORPORATION BY REFERENCE
[0001] U.S. Pat. No. 6,424,194, U.S. application Ser. No. 09/540,243 filed on Mar. 31, 2000, U.S. Pat. No. 6,389,092, U.S. Pat. No. 6,340,899, U.S. application Ser. No. 09/919,636 filed on Jul. 31, 2001, U.S. application Ser. No. 09/860,284 filed on May 18, 2001, U.S. application Ser. No. 10/028,806 filed on Oct. 25, 2001, U.S. application Ser. No. 09/969,837 filed on Oct. 1, 2001, U.S. application Ser. No. 10/159,788 entitled “Phase Adjustment in High Speed CDR Using Current DAC” filed on May 30, 2002, U.S. application Ser. No. 10/179,735 entitled “Universal Single-Ended Parallel Bus; fka, Using 1.8V Power Supply in 0.13MM CMOS” filed on Jun. 21, 2002, and U.S. application Serial No. 60/402,097 entitled “SYSTEM AND METHOD FOR IMPLEMENTING A SINGLE CHIP HAVING A MULTIPLE SUB-LAYER PHY” filed on Aug. 7, 2002 with attorney docket #1772-13906US01, are each incorporated herein by reference in their entirety. The applicants claim the benefit of provisional application No. 60/402,121, filed Aug. 7, 2002.
Provisional Applications (1)
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Number |
Date |
Country |
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60402121 |
Aug 2002 |
US |