Claims
- 1. A method for designing a circuit block, comprising the steps of:
(a) selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, at least one of said circuit blocks being programmable; (b) collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method; (c) accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk; (d) upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks (FEA); and (e) upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, in compliance with the criteria and modified constraints without changing the selected circuit block and the processing method.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part of copending U.S. Provisional Patent Application Ser. No. 09/410,356 filed Sep. 30, 1999, and also claims priority to U.S. Provisional Patent Application Ser. No. 60/102,566 filed Sep. 30, 1998, both of which applications are incorporated herein by reference in their entireties.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60102566 |
Sep 1998 |
US |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09410356 |
Sep 1999 |
US |
Child |
09812068 |
Mar 2001 |
US |