Patent Application
20190187493
Processors and associated applications have developed to a level that enable enormous amounts of information to be generated and utilized. The capability of processors and associated applications to utilize vast amounts of information spurs the development of communication systems that enable the dissemination of such vast amounts of information. Communication systems are under constant pressure to increase the bandwidth available for distribution of information.
A communication system can have sufficient bandwidth allocated for distribution of vast amounts of information, but the rate that the information can be distribute across the communication system may be limited by the limitations of the communications hardware. The operating bandwidth of integrated circuits used in conjunction with high speed communication systems has continued to increase to help satisfy the desire to increase communication rates.
Transistors can play an integral part of providing high-band width communications, the pursuit of high speed technology has taught that reducing the size of the transistors generally reduces barriers to achieving higher bandwidths. Reducing the physical size of individual transistors reduces the parasitic effects, such as parasitic capacitance, that can reduce the bandwidth of the transistor. The operating voltage and the breakdown voltage of the transistors can be reduced due, in part, to the physical reduction in size. Although a reduction in the operating voltage can provide some benefits in the form of reduced power consumption, the combination of reduced operating voltage and reduced breakdown voltage can severely limit the applicability of integrated circuits implementing such high-speed transistors.
The present inventor has recognized techniques to overcome low breakdown voltage limitation of high-speed amplifiers that include high-speed, high-voltage swing transistor circuits.
There are several breakdown voltages that are often reported for bipolar junction transistors (BJT). The collector-emitter breakdown voltage, BVce, is typically the main limiting factor in the design of a high-voltage driver. This breakdown voltage is a function of the total base resistance, RB, to an AC ground. The most commonly reported value is the collector-emitter breakdown voltage when the base is open, i.e. when RB=∞. It is noteworthy that BVce is the lower bound of the collector-emitter breakdown voltage of the transistor. The value of breakdown voltage increases when the base is driven with a lower source impedance. For example, BVce=1.8V for RB=∞ compared to BVce>3.0V for RB<1000. The dependence on source impedance can be exploited in the designs of driver output stages utilizing breakdown voltage enhancement.
High-speed drivers typically use some form of a current steering or current switch at the output stage. When a single active device withstands the entire output voltage swing, BVce sets the limit on the maximum output voltage. By distributing the output voltage swing across multiple transistors, the output voltage swing can exceed the breakdown voltage of any individual transistor in the output stage.
The communication system 100 can include carrier signal generator such as a laser 110 to provide a carrier signal. The laser 110 can be coupled to a modulator 120 that can be configured to amplitude modulate the laser 110 optical output, a laser signal or optical signal, based on a received modulation signal. A modulation driver 130 can be configured to receive a modulation signal and amplify it using a driver configuration that includes a breakdown enhancement output stage 132. The modulation signal can represent the information to be transmitted to a remote destination. The output of the modulation driver 130 can be coupled to the modulation input of the modulator 120 to modulate the optical signal.
The modulated signal output from the modulator 120 can be coupled to a channel, such as an optical fiber 140. The optical fiber 140 can be configured to couple the modulated optical signal to a remote destination. Although the optical fiber 140 is shown as a direct link, a communication channel may include one or more intervening elements, such as switches, couplers, and amplifiers.
While most of the building blocks in a fiber optic communication system 100 can be implemented in silicon for high speed communication links operating at 10 Gb/s and above, the optical modulator electrical driver 130 has been primarily done in compound semiconductors. This is mainly due to breakdown limitations of silicon transistors and large voltage swings used to operate the high-speed optical modulators 120. However, the process technology disparity between a compound semiconductor driver and the remainder of the transceiver can result in additional cost and performance penalties. The driver 130 can include an output stage 132 including a breakdown voltage enhancement circuit that overcomes the breakdown limitations of high-frequency transistors. The output stage 130 employing the breakdown voltage enhancement circuit 132 can enable high-speed broadband drivers 120 manufactured in silicon to have a large voltage swing, and in particular, a voltage swing that exceeds the breakdown voltage of the individual transistor in the output stage 132 that experience a portion of the voltage swing.
Existing electro-absorption and Mach-Zehnder (MZ) optical modulators 120 typically require voltage swings in the range of 3 volts or more to achieve a high extinction ratio. That is, these voltage swings are typically required to effectively switch the light on and off. Such a large voltage swing poses a challenge for silicon-based transistors (SiGe HBT or Si CMOS) whose breakdown voltages can decrease when the transistors are scaled for higher speed. While there have been reports of driver circuits in SiGe for optical applications, these circuits typically drop the entire voltage swing across single transistors and thus cannot exceed the collector-emitter breakdown voltages and are hence limited to a voltage swing approximately equal to the breakdown voltage of a single transistor manufactured according to SiGe processes, which can be typically be less than 3 volts.
Some conventional differential input stages would provide an output voltage at the collector of the input transistor. However, such an approach for a high-speed transistor would limit the output voltage swing to less than the break down voltage of the input transistor. To overcome this limitation, traditional techniques can stack the input transistor with a high breakdown voltage transistor having a control node coupled to a fixed reference. Such a technique can provide additional output voltage swing greater than the breakdown voltage of the input transistor, however, high breakdown voltage devices are typically larger and include parasitic capacitance electrical characteristics, for example parasitic capacitance, that renders such an arrangement unsuitable for high-speed applications of, for example, 45 GHz.
The present solution, as briefly discussed above, stacks two high-speed, low breakdown voltage transistors to provide a high-speed, high voltage swing solution. In addition, various examples, can derive a drive signal for one of the stacked transistors using a representation of the output voltage (VOUT) which can limit the voltage swing across the other stacked transistor. In the illustrated solution, the drive circuitry of the second, or buffer transistor (Q11, Q12), is executed to also limit the voltage swing across the buffer transistor (Q11, Q12). In the illustrated example of
The buffer driver transistor (Q13, Q14) can be biased with a current source 345, 346 and can be arranged as an emitter follower with the emitter coupled to the control node of the buffer transistor (Q11, Q12). The voltage divider 343, 344 coupled in series with the collector of the buffer transistor (Q11, Q12) can scale the voltage swing of the buffer transistor (Q11, Q12) via the buffer driver transistor (Q13, Q14). In the illustrated example, each of the two resistors of the voltage divider 343, 344 can be equal to scale the voltage swing of the buffer transistor (Q11, Q12) to be half of the output voltage swing of the high-speed amplifier 332. The capacitive parasitic of the buffer transistor (Q11, Q12) and the buffer driver transistor (Q13, Q14), among other things, in combination with the resistors of the voltage divider 343, 344, can contribute to a gain roll-off at higher frequencies. In certain examples, a capacitor 360, 361 can be coupled between the control node of the buffer driver transistor (Q13, Q14) and a conduction node of the buffer transistor (Q11, Q12) to provide a little more bandwidth instead of using relatively small resistances for the voltage divider 343, 344.
The emitter followers comprised of the buffer diver transistor (Q13, Q14) and corresponding current source (345, 346) can allows the control node of the buffer transistor (Q11, Q12) to be driven with a signal in the same phase as the output (+VOUT, −VOUT) and with a fraction of the full swing of the output voltage (VOUT). The buffer transistors (Q11, Q12), although in a cascode configuration to pass the current regulated by the input transistors (Q9, Q10), also can act as emitter followers and thus, the voltage swing across the collector and emitter of the buffer transistors (Q11, Q12) is limited by the voltage swing derived from the output voltage (VOUT) via the corresponding voltage divider (343, 344). The limited voltage swing of the buffer transistors (Q11, Q12) can then limit the voltage swing across the input transistors (Q9, Q10)
In certain examples, the above solution can provide a simplified, yet elegant, circuit that can provide a full output swing of the output voltage (VOUT) that is about double the breakdown voltage (BVce) of each of the stacked amplifier transistors (Q9, Q10, Q11, Q12) and the buffer driver transistors (Q13, Q14). Also, it is possible to extend this solution to provide an output voltage that is K times the breakdown voltage, where K is an integer number greater than one and is indicative of the number of stacked buffer and input transistors. As a result, the amplifier can employ comparatively smaller and more dynamic transistor than a conventional configuration which can allow for an efficient and robust high-frequency amplifier.
In certain examples, the differential amplifier can include a current source to couple the input transistors to a supply rail and to allow for a good range of common mode voltage to be received on the input signals (+VIN, −VIN). However, to conserve voltage headroom and reduce power, both of which would be consumed by a current source, the input transistors (Q9, Q10) can be coupled to a supply rail (e.g., VCC) via an inductor 347. At high frequency, the inductor 347 appears as a high impedance, just as a current source would, and the circuit behaves accordingly. Each branch can include a resistor-inductor network 348, 349 located between the input transistor (Q9, Q10) and the buffer transistor (Q11, A12) to assist with rise and fall times at high frequency. Such improvement can extend the bandwidth of the circuit. More particularly, the inductor assists with faster rise and fall times while the resistor helps dampen ringing associated with the inductors.
The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments in which the invention can be practiced. These embodiments are also referred to herein as “examples.” Such examples can include elements in addition to those shown or described. However, the present inventors also contemplate examples in which only those elements shown or described are provided. Moreover, the present inventors also contemplate examples using any combination or permutation of those elements shown or described (or one or more aspects thereof), either with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.
All publications, patents, and patent documents referred to in this document are incorporated by reference herein in their entirety, as though individually incorporated by reference. In the event of inconsistent usages between this document and those documents so incorporated by reference, the usage in the incorporated reference(s) should be considered supplementary to that of this document; for irreconcilable inconsistencies, the usage in this document controls.
In this document, the terms “a” or “an” are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of “at least one” or “one or more.” In this document, the term “or” is used to refer to a nonexclusive or, such that “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise indicated. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein.” Also, in the following claims, the terms “including” and “comprising” are open-ended, that is, a system, device, article, or process that includes elements in addition to those listed after such a term in a claim are still deemed to fall within the scope of that claim. Moreover, in the following claims, the terms “first,” “second,” and “third,” etc. are used merely as labels, and are not intended to impose numerical requirements on their objects.
Method examples described herein can be machine or computer-implemented at least in part. Some examples can include a computer-readable medium or machine-readable medium encoded with instructions operable to configure an electronic device to perform methods as described in the above examples. An implementation of such methods can include code, such as microcode, assembly language code, a higher-level language code, or the like. Such code can include computer readable instructions for performing various methods. The code may form portions of computer program products. Further, the code can be tangibly stored on one or more volatile or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media can include, but are not limited to, hard disks, removable magnetic disks, removable optical disks (e.g., compact disks and digital video disks), magnetic cassettes, memory cards or sticks, random access memories (RAMs), read only memories (ROMs), and the like.
The above description is intended to be illustrative, and not restrictive. For example, the above-described examples (or one or more aspects thereof) may be used in combination with each other. Other embodiments can be used, such as by one of ordinary skill in the art upon reviewing the above description. The Abstract is provided to comply with 37 C.F.R. § 1.72(b), to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. This should not be interpreted as intending that an unclaimed disclosed feature is essential to any claim. Rather, inventive subject matter may lie in less than all features of a particular disclosed embodiment. Thus, the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separate embodiment, and it is contemplated that such embodiments can be combined with each other in various combinations or permutations. The scope of the invention should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.
This patent application claims the benefit of priority of Mactaggart, U.S. Provisional Patent Application Ser. No. 62/608,336, entitled “BREAKDOWN VOLTAGE ENHANCEMENT TECHNIQUES FOR A HIGH-SPEED AMPLIFIER,” filed on Dec. 20, 2017 (Attorney Docket No. 3377.006PRV), which is hereby incorporated by reference herein in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 62608336 | Dec 2017 | US |
