1. Field of invention
This invention is related to the field of high-frequency, pulse-width-modulated (PWM), ac-to-dc unity power factor correcting (PFC) circuits whose input impedance appears purely resistive to the AC source which allows the input line current to follow the input AC line voltage eliminating reactive power.
2. Prior Art
In the art prior to U.S. Pat. No. 4,412,227A (Mitchell), all PFC circuits comprised a high-frequency, PWM, dc-to-dc converter, a full-bridge rectifier for converting the input ac voltage waveform to a full-wave rectified voltage waveform, and a feedback control circuit which for sensing the input current and forcing it to follow the input voltage. The universally used dc-to-dc converter mentioned above is the boost converter operating in continuous conduction mode for which the feedback control loop can be implemented in a variety ways. For low power applications, the flyback or buck-boost PWM dc-to-dc converter, operating in discontinuous conduction mode, is also used widely. This converter is called an automatic power factor correcting circuit because its input impedance is real without the need of a current feedback control loop. Regardless of the control loop implementation, or the type of the converter used, all the PFCs described above require six switching devices: four diodes in the bridge rectifier, a MOSFET and a diode in the dc-to-dc converter.
In U.S. Pat. No. 4,412,227A (Mitchell), the input bridge rectifier circuit was eliminated by having two boost converters each operate on one half of the input ac cycle. Hence, this invention claimed to reduce the number of switches required to perform power factor correction from six to four. Variations and improvements of this patent since its introduction have been introduced but they all require four or five switches and one or two boost converters. These variations have been covered by the following US patents:
U.S. Pat. No. 6,411,535 B1 (Roux)
U.S. Pat. No. 6,570,366 B1 (Lin et al.)
U.S. Pat. No. 6,671,192 B2 (Maeda et al.)
U.S. Pat. No. 7,215,560 B2 (Soldano et al.)
In US patent 2010/0259240 (Cuk) a new resonant-PWM hybrid dc-to-dc converter has been introduced which accepts a bipolar input voltage and produces a unipolar output voltage. In this patent it is explained that the unique ability of this new dc-to-dc converter to accept bipolar input enables it to be used as an ac-to-dc PFC converter requiring neither an input rectifier bridge nor two dc-to-dc converters each operating on one half of the input ac cycle voltage. In paragraph [0038] of this patent the inventor clearly explains that until his invention of the new hybrid PWM-resonant converter, there were no PWM dc-to-dc converters which could accept bipolar input voltage and produce a unipolar output voltage.
All of the PFCs in the entire prior art described above share the misconception that high-frequency, PWM, dc-to-dc converters cannot accept a bipolar input voltage and produce a unipolar output voltage. This invention shows that this is not true and that indeed there are certain known PWM dc-to-dc converters which, by proper control and physical realization of the switches using MOSFETS, diodes or IGBTs, can be made to accept a bipolar input voltage and produce a unipolar dc output voltage. All these PWM dc-to-dc converters share the common feature of being able to produce a bipolar output voltage from a unipolar dc input voltage. The synthesis of these converters using two, four or a larger even number of switches has been discussed in the works of Tymerski and Maksimovich in [2,3]. Since the primary goal of this invention is the discovery of PFCs with the least number of switches, only those dc-to-dc converters with two switches and bipolar output reported in [2,3] are considered while the rest are discarded.
Thus the PFC circuits introduced in this patent, which are based on the dc-to-dc converters described above, are true bridgeless PFC circuits which require only two switches which is the smallest possible number of switches that a PFC can have. All PFCs in the prior art have three or more switches.
a: The Watkins-Johnson PFC in which the switches are realized by the parallel combination of an IGBT and a diode. This PFC produces a dc output voltage which is greater than or equal to the amplitude of the ac input voltage.
b: The rotated SEPIC PFC in which the switches are realized by the parallel combination of an IGBT and a diode. This PFC produces a dc output voltage which is greater than or equal to the amplitude of the ac input voltage.
c: The rotated inverse SEPIC PFC in which the switches are realized by the parallel combination of an IGBT and a diode. This PFC produces a dc output voltage which is greater than or equal to the amplitude of the ac input voltage.
d: The inverse Watkins-Johnson PFC in which the switches are realized by the series combination of a MOSFET and a diode. This PFC produces a dc output voltage which is smaller than the amplitude of the ac input voltage.
e: The inverse rotated SEPIC PFC in which the switches are realized by the series combination of a MOSFET and a diode. This PFC produces a dc output voltage which is smaller than the amplitude of the ac input voltage.
f: The inverse rotated inverse SEPIC PFC in which the switches are realized by the series combination of a MOSFET and a diode. This PFC produces a dc output voltage which is smaller than the amplitude of the ac input voltage.
a: The Watkins-Johnson dc-to-dc converter using ideal switches. The voltage conversion ratio of this converter is singular at D=0.5.
b: The rotated SEPIC dc-to-dc converter using ideal switches. The voltage conversion ratio of this converter is singular at D=0.5.
c: The rotated inverse SEPIC dc-to-dc converter using ideal switches. The voltage conversion ratio of this converter is singular at D=0.5.
d: The inverse Watkins-Johnson dc-to-dc converter using ideal switches. The current conversion ratio of this converter is singular at D=0.5 and its voltage conversion ratio is zero.
e: The inverse rotated SEPIC dc-to-dc converter using ideal switches. The current conversion ratio of this converter is singular at D=0.5 and its voltage conversion ratio is zero.
f: The inverse rotated inverse SEPIC dc-to-dc converter using ideal switches. The current conversion ratio of this converter is singular at D=0.5 and its voltage conversion ratio is zero.
a: Non-inverting Watkins-Johnson converter which operates with a duty cycle less than 0.5 and whose conversion ratio is given by Eq. (3).
b: Inverting Watkins-Johnson converter which operates with a duty cycle less than 0.5 and whose conversion ratio is given by Eq. (4).
The first three PFCs in this invention are shown in
The dc-to-dc converters, on which these PFCs are based, are shown in
In Eq. (1) Vg is the dc input voltage and D is the duty cycle taken with respect to S1. The voltage conversion ratio of a dc-to-dc converter is defined as the ratio of the dc output voltage to the dc input voltage, so that we have:
Equation (2) is plotted in
When the active and passive switches in
In a PFC, the goal is to accept a bipolar input and produce a unipolar dc output voltage. Hence, according to the conversion ratio characteristics in
A plot of MR is shown in
In which Mo is the ideal conversion ratio in Eq. (2):
A plot of a typical practical rectification ratio MR=|MV| based on Eq. (6) is shown in
The switch realization of the PFCs shown in
Finally, the drain-to-source voltage, in all three converters is given by:
Therefore, the maximum value of VDS is given by:
V
DS
max=2Vo+Vp (9)
Since, the minimum possible value of the output voltage in all three converters is equal to the peak line voltage, we have:
V
DS
max=3Vo (10)
Simulation results are shown in
S
r(t)=(k1+k2 sin2(ωlt))u(vin)+u(−vin)(k3+k4 sin2(ωlt)) (11)
is used to improve the distortion in the current waveform at zero-crossing.
The remaining three PFC circuits shown in
Equation (12) is plotted in
Following the same argument given earlier for the first three PFCs, we arrive at the conclusion that these PFCs can be operated controllably and produce a dc output voltage which is less than the peak input voltage if the duty cycle is restricted to greater than 50% and transferred from S1, (M1, D1), to S2, (M2, D2), as the input voltage reverses from positive to negative in accordance with the rectification ratio shown in
The switches, S1 and S2, in these PFCs are two quadrant switches which conduct current in one direction but block voltage in both directions whose maximum value is:
V
DS
max=2Vp+Vo (13)
The switches in these converters can be physically realized by an ideal IGBT but, since a practical IGBT cannot block voltages effectively in the reverse direction, a diode must be added in series with the drain as shown.
Finally, for these PFCs, when the duty cycle is transferred from one MOSFET to the other as the input voltage reverses, the other MOSFET is turned on for the entire duration of the half cycle of the input voltage. A logic circuit that accomplishes this is shown in the PWM section of the real time simulation circuit shown in