Buck-converter-based drive circuits for driving motors of compressors and condenser fans

Description

FIELD

The present disclosure relates to systems for displaying messages with respect to compressor system operation.

BACKGROUND

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

Compressors are used in a wide variety of industrial and residential applications including, but not limited to, heating, ventilating, and air conditioning (HVAC) systems. Electric motors are used to power and/or actuate elements of the compressors. A control system for controlling operation of an electric motor of a compressor can include a drive. The drive can include: a power factor correction (PFC) circuit; filters, such as an electromagnetic interference (EMI) filter and a direct current filter; an inverter power circuit; a processor; and other circuit components.

A drive of a compressor may include a rectifier that converts, for example, alternating current (AC) power received via utility power source via power lines to a direct current (DC) voltage, which is received at a DC bus. The DC bus provides the DC voltage to an inverter. The inverter converts the DC voltage to an AC voltage that is supplied to a compressor. A condenser fan motor may be connected (i) to the power lines that provide power to the drive, (ii) via a fan inverter, to a DC bus connected to an output of a PFC circuit, or (iii) to power lines connected to and providing power to the compressor. The power lines and the DC bus can be at high voltage potentials. For example, the utility power lines may be at 575 VAC and the DC bus may be at 810 VDC. As a result, the condenser fan motor is rated for 575 VAC. Typically, the condenser fan motor is rated for the same AC voltage as the power lines supplying power to the drive. In general, the higher the AC voltage rating of the condenser fan motor, the more specialized and/or costly the condenser fan motor.

SUMMARY

A drive circuit is provided and includes a rectification circuit, a buck converter, a first inverter, and a second inverter. The rectification circuit is configured to rectify a first AC voltage signal to generate a rectified voltage signal. The buck converter is configured to downconvert the rectified voltage signal to a DC voltage signal, wherein the DC voltage signal is supplied to a DC bus. The first inverter is configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor. The second inverter is configured to convert the DC voltage signal to a third AC voltage signal and supply the third AC voltage signal to a condenser fan motor. Peak voltages of the second AC voltage signal and the third AC voltage signal are less than peak voltages of the first AC voltage signal.

In other features, a drive circuit includes a rectification circuit, a buck converter, a first inverter and a condenser fan motor. The rectification circuit is configured to rectify a first AC voltage signal to generate a rectified voltage signal. The buck converter is configured to downconvert the rectified voltage signal to a first direct current (DC) voltage signal, wherein the first DC voltage signal is supplied to a DC bus. The first inverter is configured to convert the first DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor. The condenser fan motor assembly is configured to receive the first DC voltage signal and one of: convert the first DC voltage signal to a third AC voltage signal and supply the third AC voltage signal to a condenser fan motor; pulse the first DC voltage signal and supply the pulsed first DC voltage signal to the condenser fan motor; and convert the first DC voltage signal to a second DC voltage signal and supply a pulsed version of the second DC voltage signal to the condenser fan motor.

In other features, a drive circuit is provided and includes a rectification circuit, a buck converter, and a first inverter. The rectification circuit is configured to rectify a first AC voltage signal to generate a rectified voltage signal. The buck converter is configured to downconvert the rectified voltage signal to a DC voltage signal, where the DC voltage signal is supplied to a DC bus. The first inverter is configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor and to a condenser fan motor. Peak voltages of the second AC voltage signal are less than peak voltages of the first AC voltage signal.

Further areas of applicability of the present disclosure will become apparent from the detailed description, the claims and the drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the disclosure.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a functional block diagram of an example refrigeration system.

FIG. 2 is a block diagram of an example implementation of the compressor motor drive of FIG. 1.

FIG. 3A is a block diagram of an example implementation of the power factor correction (PFC) circuit of FIG. 2.

FIG. 3B is a block diagram of another example implementation of the PFC circuit of FIG. 2.

FIG. 4 is schematic and block diagram of an example of portions of a PFC circuit and an inverter power circuit of a multi-phase drive including a buck converter in accordance with an embodiment of the present disclosure.

FIG. 5 is a functional block diagram of an example of a PFC switch control module in accordance with an embodiment of the present disclosure.

FIG. 6 is schematic and block diagram of an example of a portion of an inverter power circuit of a drive in accordance with another embodiment of the present disclosure.

FIG. 7 is a schematic and block diagram of an example of portions of a PFC circuit and an inverter power circuit of a single-phase drive including a buck converter in accordance with an embodiment of the present disclosure.

FIG. 8 is a flow diagram illustrating an example method of operating the multi-phase drive of FIG. 4 in accordance with an embodiment of the present disclosure.

In the drawings, reference numbers may be reused to identify similar and/or identical elements.

DESCRIPTION

A refrigeration system includes a drive, a compressor and a condenser fan motor. The drive receives power from a utility power source via power lines and supplies the power to a compressor. The condenser fan motor may receive power from the power lines supplying power to the drive or receive power directly from the drive. The condenser fan motor may be rated for an AC voltage on the power lines. If this AC voltage is high (e.g., 575 VAC), the cost of the condenser fan motor is also high due to the need for high-voltage rated windings and satisfaction of high-voltage insulation to ground requirements. These types of condenser fan motors are typically produced in low volumes, which further increase costs of the condenser fan motors.

To minimize cost of a condenser fan motor, a required peak voltage rating of the condenser fan motor may be decreased by connecting the condenser fan motor to power lines supplying power to the drive via a transformer. The transformer downconverts a first AC voltage (e.g., 575 VAC or 600 VAC) of power lines supplying power to the drive to provide a second AC voltage (e.g., 480 VAC or 230 VAC), which can then be provided to the condenser fan motor. Although this reduces the peak voltage requirements and costs of the condenser fan motor, costs are increased due to use of the transformer. Also, the transformer to perform the stated downconversion can be large and heavy.

Compressor drives and corresponding circuits set forth herein include the use of buck converters to reduce peak voltage requirements of condenser fan motors. The buck converters reduce peak voltages received by condenser fan motors and provide output voltages that may be adjusted during operation. The disclosed embodiments are applicable to AC motors, DC motors, Induction motors, permanent magnetic motors, single phase motors, 3-phase motors, and/or other types of condenser fan motors.

Refrigeration System

FIG. 1 is a functional block diagram of an example refrigeration system 100 including a compressor 102, a condenser 104, an expansion valve 106, and an evaporator 108. According to the principles of the present disclosure, the refrigeration system 100 may include additional and/or alternative components, such as a reversing valve or a filter-drier. In addition, the present disclosure is applicable to other types of refrigeration systems including, but not limited to, heating, ventilating, and air conditioning (HVAC), heat pump, refrigeration, and chiller systems.

The compressor 102 receives refrigerant in vapor form and compresses the refrigerant. The compressor 102 provides pressurized refrigerant in vapor form to the condenser 104. The compressor 102 includes an electric motor (or compressor motor) that drives a pump. For example only, the pump of the compressor 102 may include a scroll compressor and/or a reciprocating compressor.

All or a portion of the pressurized refrigerant is converted into liquid form within the condenser 104. The condenser 104 transfers heat away from the refrigerant, thereby cooling the refrigerant. When the refrigerant vapor is cooled to a temperature that is less than a saturation temperature, the refrigerant transforms into a liquid (or liquefied) refrigerant. The condenser 104 may include an electric fan that increases the rate of heat transfer away from the refrigerant.

The condenser 104 provides the refrigerant to the evaporator 108 via the expansion valve 106. The expansion valve 106 controls the flow rate at which the refrigerant is supplied to the evaporator 108. The expansion valve 106 may include a thermostatic expansion valve or may be controlled electronically by, for example, a system controller 130. A pressure drop caused by the expansion valve 106 may cause a portion of the liquefied refrigerant to transform back into the vapor form. In this manner, the evaporator 108 may receive a mixture of refrigerant vapor and liquefied refrigerant.

The refrigerant absorbs heat in the evaporator 108. Liquid refrigerant transitions into vapor form when warmed to a temperature that is greater than the saturation temperature of the refrigerant. The evaporator 108 may include an electric fan that increases the rate of heat transfer to the refrigerant.

A utility 120 provides power to the refrigeration system 100. For example only, the utility 120 may provide single-phase alternating current (AC) power at approximately 230 Volts root mean squared (V_RMS). In other implementations, the utility 120 may provide three-phase AC power at approximately 400 V_RMS, 480 V_RMS, or 600 V_RMSat a line frequency of, for example, 50 or 60 Hz. When the three-phase AC power is nominally 600 V_RMS, the actual available voltage of the power may be 575 V_RMS.

The utility 120 may provide the AC power to the system controller 130 via an AC line, which includes two or more conductors. The AC power may also be provided to a drive 132 via the AC line. The system controller 130 controls the refrigeration system 100. For example only, the system controller 130 may control the refrigeration system 100 based on user inputs and/or parameters measured by various sensors (not shown). The sensors may include pressure sensors, temperature sensors, current sensors, voltage sensors, etc. The sensors may also include feedback information from the drive control, such as motor currents or torque, over a serial data bus or other suitable data buses.

A user interface 134 provides user inputs to the system controller 130. The user interface 134 may additionally or alternatively provide the user inputs directly to the drive 132. The user inputs may include, for example, a desired temperature, requests regarding operation of a fan (e.g., a request for continuous operation of the evaporator fan), and/or other suitable inputs. The user interface 134 may take the form of a thermostat, and some or all functions of the system controller (including, for example, actuating a heat source) may be incorporated into the thermostat.

The system controller 130 may control operation of the fan of the condenser 104, the fan of the evaporator 108, and the expansion valve 106. The drive 132 may control the compressor 102 based on commands from the system controller 130. For example only, the system controller 130 may instruct the drive 132 to operate the motor of the compressor 102 at a certain speed or to operate the compressor 102 at a certain capacity. In various implementations, the drive 132 may also control the condenser fan.

A thermistor 140 is thermally coupled to the refrigerant line exiting the compressor 102 that conveys refrigerant vapor to the condenser 104. The variable resistance of the thermistor 140 therefore varies with the discharge line temperature (DLT) of the compressor 102. As described in more detail, the drive 132 monitors the resistance of the thermistor 140 to determine the temperature of the refrigerant exiting the compressor 102.

The DLT may be used to control the compressor 102, such as by varying capacity of the compressor 102, and may also be used to detect a fault. For example, if the DLT exceeds the threshold, the drive 132 may power down the compressor 102 to prevent damage to the compressor 102.

Drive

In FIG. 2, an example implementation of the drive 132 includes an electromagnetic interference (EMI) filter and protection circuit 204, which receives power from an AC line. The EMI filter and protection circuit 204 reduces EMI that might otherwise be injected back onto the AC line from the drive 132. The EMI filter and protection circuit 204 may also remove or reduce EMI arriving from the AC line. Further, the EMI filter and protection circuit 204 protects against power surges, such as may be caused by lightening, and/or other types of power surges and sags.

A charging circuit 208 controls power supplied from the EMI filter and protection circuit 204 to a power factor correction (PFC) circuit 212. For example, when the drive 132 initially powers up, the charging circuit 208 may place a resistance in series between the EMI filter and protection circuit 204 and the PFC circuit 212 to reduce the amount of current inrush. These current or power spikes may cause various components to prematurely fail.

After initial charging is completed, the charging circuit 208 may close a relay that bypasses the current-limiting resistor. For example, a control module 220 may provide a relay control signal to the relay within the charging circuit 208. In various implementations, the control module 220 may assert the relay control signal to bypass the current-limiting resistor after a predetermined period of time following start up, or based on closed loop feedback indicating that charging is near completion.

The PFC circuit 212 provides a power factor correction between an inputted AC and a generated DC. A power factor is an indicator of a relationship between current and voltage in a circuit, or how effectively a circuit uses real power as compared to reactive power, which is stored and returned to a power source. A power factor can be expressed as a value between zero and one. A power factor can be equal to a ratio of actual electrical power dissipated by a circuit relative to a product of root mean squared (RMS) values of current and voltage for the circuit. The power factor approaches 1 as this ratio increases. The PFC circuit can be implemented to increase a power factor of a drive, thereby increasing an amount of real power used by the circuit as compared with an amount of reactive power the circuit stores and returns to the power source.

The PFC circuit 212 converts incoming AC power to DC power. The PFC circuit 212 may not be limited to PFC functionality—for example, the PFC circuit 212 may also perform voltage conversion functions, such as acting as a boost circuit and/or a buck circuit. In some implementations, the PFC circuit 212 may be replaced by a non-PFC voltage converter. The DC power may have voltage ripples, which are reduced by filter capacitance 224. Filter capacitance 224 may include one or more capacitors arranged in parallel and connected to the DC bus. The PFC circuit 212 may attempt to draw current from the AC line in a sinusoidal pattern that matches the sinusoidal pattern of the incoming voltage. As the sinusoids align, the power factor approaches one, which represents the greatest efficiency and the least demanding load on the AC line.

The PFC circuit 212 includes one or more switches that are controlled by the control module 220 using one or more signals labeled as power switch control. The control module 220 determines the power switch control signals based on a measured voltage of the DC bus, measured current in the PFC circuit 212, AC line voltages, temperature or temperatures of the PFC circuit 212, and the measured state of a power switch in the PFC circuit 212. While the example of use of measured values is provided, the control module 220 may determine the power switch control signals based on an estimated voltage of the DC bus, estimated current in the PFC circuit 212, estimated AC line voltages, estimated temperature or temperatures of the PFC circuit 212, and/or the estimated or expected state of a power switch in the PFC circuit 212. In various implementations, the AC line voltages are measured or estimated subsequent to the EMI filter and protection circuit 204 but prior to the charging circuit 208.

The control module 220 is powered by a DC-DC power supply 228, which provides a voltage suitable for logic of the control module 220, such as 3.3 Volts, 2.5 Volts, etc. The DC-DC power supply 228 may also provide DC power for operating switches of the PFC circuit 212 and an inverter power circuit 232. For example only, this voltage may be a higher voltage than for digital logic, with 15 Volts being one example.

The inverter power circuit 232 also receives power switch control signals from the control module 220. In response to the power switch control signals, switches within the inverter power circuit 232 cause current to flow in respective windings of a motor 236 of the compressor 102. The control module 220 may receive a measurement or estimate of motor current for each winding of the motor 236 or each leg of the inverter power circuit 232. The control module 220 may also receive a temperature indication from the inverter power circuit 232.

For example only, the temperature received from the inverter power circuit 232 and the temperature received from the PFC circuit 212 are used only for fault purposes. In other words, once the temperature exceeds a predetermined threshold, a fault is declared and the drive 132 is either powered down or operated at a reduced capacity. For example, the drive 132 may be operated at a reduced capacity and if the temperature does not decrease at a predetermined rate, the drive 132 transitions to a shutdown state.

The control module 220 may also receive an indication of the discharge line temperature from the compressor 102 using the thermistor 140. An isolation circuit 260 may provide a pulse-width-modulated representation of the resistance of the thermistor 140 to the control module 220. The isolation circuit 260 may include galvanic isolation so that there is no electrical connection between the thermistor 140 and the control module 220.

The isolation circuit 260 may further receive protection inputs indicating faults, such as a high-pressure cutoff or a low-pressure cutoff, where pressure refers to refrigerant pressure. If any of the protection inputs indicate a fault and, in some implementations, if any of the protection inputs become disconnected from the isolation circuit 260, the isolation circuit 260 ceases sending the PWM temperature signal to the control module 220. Therefore, the control module 220 may infer that a protection input has been received from an absence of the PWM signal. The control module 220 may, in response, shut down the drive 132.

The control module 220 controls an integrated display 264, which may include a grid of LEDs and/or a single LED package, which may be a tri-color LED. The control module 220 can provide status information, such as firmware versions, as well as error information using the integrated display 264. The control module 220 communicates with external devices, such as the system controller 130 in FIG. 1, using a communications transceiver 268. For example only, the communications transceiver 268 may conform to the RS-485 or RS-232 serial bus standards or to the Controller Area Network (CAN) bus standard.

PFC Circuits

In FIG. 3A, a PFC circuit 300 is one implementation of the PFC circuit 212 of FIG. 2. The PFC circuit 300 includes a rectifier 304 that converts incoming AC into pulsating DC. In various implementations, the rectifier 304 includes a full-wave diode bridge. The DC output of the rectifier 304 is across first and second terminals. The first terminal is connected to an inductor 308, while the second terminal is connected to a current sensor 312. An opposite end of the inductor 308 is connected to a node that is common to the inductor 308, an anode of a diode 316, and a first terminal of a switch 320.

The PFC circuit 300 generates a DC bus, where a first terminal of the DC bus is connected to a cathode of the diode 316 while a second terminal of the DC bus is connected to the second output terminal of the rectifier 304 via the current sensor 312. The current sensor 312 can, therefore, sense the current within the switch 320 as well as the current in the DC bus and current in the inductor 308. The second terminal of the DC bus is also connected to a second terminal of the switch 320.

A driver 324 receives the power switch control signal from the control module 220 of FIG. 2 and rapidly charges or discharges a control terminal of the switch 320. For example, the switch 320 may be a field effect transistor with a gate terminal as the control terminal. More specifically, the switch 320 may be a power metal-oxide-semiconductor field-effect transistor (MOSFET), such as the STW38N65M5 power MOSFET from STMicroelectronics. The driver 324, in response to the power switch control signal, charges or discharges the capacitance at the gate of the field effect transistor.

A switch monitor circuit 328 measures whether the switch is on or off. This closed loop control enables the control module 220 to determine whether the switch 320 has reacted to a command provided by the power switch control signal and may also be used to determine how long it takes the switch 320 to respond to that control signal. The measured switch state is output from the switch monitor circuit 328 back to the control module 220. The control module 220 may update its control of the power switch control signal to compensate for delays in turning on and/or turning off the switch 320.

In FIG. 3A, the inductor, the switch 320, and the diode 316 are arranged in a boost configuration. In brief, the switch 320 closes, causing current through the inductor 308 to increase. Then the switch 320 is opened, but the current through the inductor 308 cannot change instantaneously because the voltage across an inductor is proportional to the derivative of the current. The voltage across the inductor 308 becomes negative, meaning that the end of the inductor 308 connected to the anode of the diode 316 experiences a voltage increase above the voltage output from the rectifier 304.

Once the voltage at the anode of the diode 316 increases above the turn-on voltage of the diode 316, the current through the inductor 308 can be fed through the diode 316 to the DC bus. The current through the inductor 308 decreases and then the switch 320 is closed once more, causing the current and the inductor 308 to increase.

In various implementations, the switch 320 may be turned on until the current sensor 312 determines that a predetermined threshold of current has been exceeded. At that time, the switch 320 is turned off for a specified period of time. This specified period may be adaptive, changing along with the voltage of the DC bus as well as the voltage of the AC input change. However, the off time (when the switch 320 is open) is a specified value. Once a time equal to the specified value has elapsed, the switch 320 is turned back on again and the process repeats. The off time can be fixed or variable. In the case of the off time being variable, the off time can be limited to at least a predetermined minimum off time.

To reduce the physical size and parts cost of the PFC circuit 300, the inductance of the inductor 308 (which may be the largest contributor to the physical size of the PFC circuit 300) may be lowered. However, with a lower inductance, the inductor 308 will saturate more quickly. Therefore, the switch 320 will have to operate more quickly. While more quickly and smaller are relative terms, present power switching control operates in the range of 10 kilohertz to 20 kilohertz switching frequencies. In the present application, the switching frequency of the switch 320 may be increased to more than 50 kilohertz, more than 100 kilohertz, or more than 200 kilohertz. For example, the switching frequency of the switch may be controlled to be approximately 200 kilohertz.

The switch 320 is therefore chosen to allow for faster switching as well as to have low switching losses. With faster switching, the inductance of the inductor 308 can be smaller. In addition, the diode 316 may need to be faster. Silicon carbide diodes may have fast response times. For example, the diode 316 may be an STPSC2006CW Silicon Carbide dual diode package from STMicroelectronics.

In order to accurately drive the switch 320 when operating at higher speeds, the control strategy must similarly be accelerated. For example only, the control module 220 may include multiple devices, such as a microcontroller configured to perform more involved calculations and an FPGA (field programmable gate array) or PLD (programmable logic device) configured to monitor and respond to inputs in near real time. In this context, near real time means that the time resolution of measurement and time delay in responding to inputs of the FPGA or PLD is negligible compared to the physical time scale of interest. For faster switching speeds, the near real time response of the FPGA/PLD may introduce non-negligible delays. In such cases, the delay of the FPGA/PLD and driving circuitry may be measured and compensated for. For example, if the turn-off of a switch occurs later than needed because of a delay, the turn-off can be instructed earlier to compensate for the delay.

A bypass rectifier 340 is connected in parallel with the rectifier 304 at the AC line input. A second output terminal of the bypass rectifier 340 is connected to the second terminal rectifier 304. However, a first output terminal of the bypass rectifier 340 is connected to the cathode of the diode 316.

As a result, when the PFC circuit 300 is not operating to boost the DC bus voltage, the bypass rectifier 340 will be active when the line-to-line voltage of the AC input exceeds the voltage across the DC bus. The bypass rectifier 340, in these situations, diverts current from passing through the diode 316. Because the inductor 308 is small, and the switch 320 switches rapidly, the diode 316 is also selected to exhibit fast switching times. The diode 316 may, therefore, be less tolerant to high currents, and so current is selectively shunted around the diode 316 by the bypass rectifier 340.

In addition, the current path through the rectifier 304 and the diode 316 experiences three diode voltage drops or two diode voltage drops and the switch voltage drop, while the path through the bypass rectifier 340 experiences only two diode voltage drops. While the single phase AC input in FIG. 3A is associated with a boost converter topology, the present disclosure also encompasses a buck converter topology or a buck-boost converter topology.

In FIG. 3B, a buck converter topology is shown with a three-phase AC input signal. Note that the principles of the present disclosure also apply to a boost converter or buck-boost converter topology used with a three-phase AC input. A PFC circuit 350 represents another implementation of the PFC circuit 212 of FIG. 2.

A three-phase rectifier 354 receives three-phase AC and generates pulsating DC across first and second terminals. A switch 358 is connected between the first terminal of the three-phase rectifier 354 and a common node. The common node is connected to an inductor 366 and a cathode of a power diode 370.

An anode of the power diode 370 is connected to a second terminal of the three-phase rectifier 354. An opposite terminal of the inductor 366 establishes one terminal of the DC bus, while the second output of the three-phase rectifier 354 establishes the other terminal of the DC bus. In the configuration shown in FIG. 3B, the switch 358, the inductor 366, and the diode 370 are configured in a buck topology.

A current sensor 362 is connected in series between the anode of the diode 370 and the DC bus. In other implementations, the current sensor 362 may be located in series with the inductor 366. In other implementations, the current sensor 362 may be located in series with the switch 358. In other implementations, the current sensor 362 may be located in series between the anode of the diode 370 and the second output of the three-phase rectifier 354. The current sensor 362 measures current through the inductor 366 as well as current through the DC bus and provides a current signal indicative of the amount of the current.

A driver 374 drives a control terminal of the switch 358 based on a power switch control signal from the control module 220 in FIG. 2. A switch monitor circuit 378 detects whether the switch 358 has opened or closed and reports the switch state to the control module 220. With the location of the current sensor 362, the current sensor 362 will measure approximately zero current when the switch 358 is open.

Various voltages are described with respect to the following FIGS. 4-8; each of the voltages is of a corresponding voltage signal. FIG. 4 shows portions 400, 402 of a PFC circuit (e.g., the PFC circuit 212 of FIG. 2) and an inverter power circuit (e.g., the inverter power circuit 232 of FIG. 2) of a multi-phase drive (e.g., the drive 132 of FIG. 1) including a buck converter 404. The portions 400, 402 may collectively be referred to as a drive circuit.

The portion 400 includes an EMI filter 406, a rectification circuit 408, an inductor 410, a diode 412, a switch 414, a driver 416 and one or more current sensors 418a, 418b. The EMI filter 406 receives a 3-phase AC voltage V_ACfrom a 3-phase AC input 422. The EMI filter 406 may be connected to the output of the bridge rectifier 420 or an output of the first current sensor 418a. The EMI filter 406 filters the 3-phase AC voltage V_AC. The rectification circuit 408 includes a bridge rectifier 420. The bridge rectifier 420 may include six diodes, as shown. The bridge rectifier 420 includes AC inputs, a return input and an output. The AC inputs of the bridge rectifier 420 receive a 3-phase AC voltage output from the EMI filter 406. The return inputs are connected to a same output 424 of the second current sensor 418b. The output of the bridge rectifier 420 is connected to the switch 414. An output voltage of the bridge rectifier 420 may be referred to as a main voltage. A DC output of the portion 400 is provided to a DC bus 426, which may refer to the DC bus connected between the PFC circuit 212 and the inverter power circuit 208 of FIG. 2.

The inductor 410, diode 412, switch 414 and driver 416 provide an example implementation of the buck converter 404. The buck converter 404 may be configured differently than shown. The buck converter 404 operates as voltage and power converter. The buck converter 404 reduces a first (or main) voltage provided to the buck converter 404 to a second voltage provided to the DC bus 426. In one embodiment, the driver 416 controls ON time, OFF time, duty cycle and/or frequency of the switch 414 to adjust the voltage on the DC bus 426. The driver 416 may transition the switch between ON and OFF states based on an average mode control with a predetermined frequency, a variable minimum off time of the switch 414, a peak voltage mode control, and/or other control mode of operation. The average mode control referring to adjusting a duty cycle of the switch 414 and cycling the switch at the predetermined frequency.

The peak voltage mode control includes adjusting a peak voltage. The buck converter 404 reduces a peak voltage out of the bridge rectifier 420. The buck converter 404 may step down voltage while stepping up current. The buck converter 404 may be (i) OFF (operating in an inactive mode and switch 414 is held in an open state) or ON and operating in a low activity mode and switching the switch 414 between ON and OFF states at a low frequency for rising and falling portions of rectified AC signal out of the bridge rectifier 420, or (ii) ON, operating in a high activity mode, and switching the switch 414 between ON and OFF states at a high frequency near peaks of the rectified AC signal out of the bridge rectifier 420. The operation of the buck converter 404 limits the DC output voltage V_DCOUTat the DC bus 426 while reducing power losses of the buck converter 404. In one embodiment, the buck converter 404 may be turned ON (i.e. the switch 414 is closed) and maintained in the ON state, such that there is no switching loses. This may occur during light load conditions. A peak voltage of the DC output voltage V_DCOUTis based on (i) an average voltage at an output of the switch 414 minus a minor voltage drop across the inductor 410, and (ii) a duty cycle of the switch and voltage received at the switch 414.

The inductor 410 is connected (i) at a first end, to the switch and a cathode of the diode 412, and (ii) at a second end, to the DC bus 426 and a capacitor 430. The inductor 410 operates as a choke and may be small (e.g., 80 micro-Henry (μH)). The diode 412 may be formed of, for example, silicon carbide SiC. The anode of the diode 412 is connected to an input 432 of the second current sensor 418b and a reference terminal 434 (e.g., a ground reference). The switch 414 is connected in series with the inductor 410 between (i) the output of the primary bridge rectifier 420 and/or the first current sensor 418a and (ii) the inductor 410.

The switch 414 may be a transistor, such as a super-junction field effect transistor (FET), a power metal oxide semiconductor field-effect transistor (MOSFET), and/or a super-junction MOSFET. The switch 414 may be configured to be oscillated between ON (e.g., closed) and OFF (e.g., open) states at a high frequency (e.g., greater than or equal to 200 kilo-hertz (kHz)). A first terminal of the switch 414 is connected to the output of the bridge rectifier 420 or an output of the first current sensor 418a. A second terminal of the switch 414 is connected to the inductor 410 and a cathode of the diode 412.

A control terminal of the switch 414 receives a control signal SW_CTRLfrom the driver (or switch driving control circuit) 416. The driver 416 generates the control signal SW_CTRLbased on an output signal PFC_OUTof the control module 220. The control module 220 generates the output signal PFC_OUTand the inverter signals INV_OUTbased on: one or more current sense signal PFC_INC1, PFC_INC2from the current sensors 418; an AC signal PFC_ACREPrepresentative of the AC voltage V_AC; and a DC signal PFC_DCREPthat is representative of the DC output voltage V_DCOUT. The current sense signal PFC_INC1may be equal to and/or indicative of an amount of current (i) passing through the inductor 410, and/or (ii) passing through the PFC circuit. The current sense signal PFC_INC2may be equal to and/or indicative of an amount of current (i) returning from the DC bus 426 to the second current sensor 418b, and/or (ii) passing through the PFC circuit. The AC signal PFC_ACREPmay be equal to and/or indicative of the AC voltage V_AC. The DC signal PFC_DCREPmay be equal to and/or indicative of the DC output voltage V_DCOUT.

The capacitor 430 may be connected between the DC bus 426 and the reference terminal 434. The capacitor 430 may be connected (i) at a first end, to the inductor 410 and the DC bus 426, and (ii) at a second end, to the input 432 of the second current sensor 418b and the reference terminal 434.

The control module 220, which is further described below with respect to FIG. 5, controls operation of the driver 416. This may include adjusting the duty cycle and/or frequency of the SW_CTRL. Operation of the driver 416 may also include generating an inverter control signal INV_CONTto control generation of inverter outputs signals INV_1-n, which are generated by the driver 416, where n is the number of inverter output signals. In one embodiment, the inverter outputs signals INV_1-nare generated by the control module 220. The inverter outputs signals INV_1-nn may control operation of switches 440, 442, 444, 446, 448, 450 of the portion 402 of the inverter power circuit for the compressor 102 and/or switches of another inverter for a condenser fan, as shown in FIG. 6. The switches 440, 442, 444, 446, 448, 450 collectively operate as an inverter. The switches 440, 446 are connected in series between the DC bus 426 and the reference terminal 434. The switches 442, 448 are connected in series between the DC bus 426 and the reference terminal 434. The switches 444, 450 are connected in series between the DC bus 426 and the reference terminal 434. Compressor power lines 452, 454, 456 are connected to respective terminals 458, 460, 462. The terminal 458 is connected to switches 440, 446. The terminal 460 is connected to switches 442, 448. The terminal 462 is connected to switches 444, 450.

The control module 220 may command a DC output voltage V_DCOUTthat is less than a peak voltage of the input voltage V_ACand/or the output of the bridge rectifier 420 during a period when the DC output voltage V_DCOUTis within a predetermined range. The predetermined range may be centered on the peak voltage of the input voltage V_ACand/or the output of the bridge rectifier 420. The commanded voltages may be determined by the control module 220.

Since the buck converter 404 reduces the voltage provided to the DC bus 426, a low voltage condenser fan can be connected to the compressor power lines 452, 454, 456 or may be connected directly or indirectly to the DC bus 426 and reference terminal 434. As a first example embodiment, a 3-phase AC condenser fan motor 470 is connected to the compressor power lines 452, 454, 456 and receives power from the inverter. The 3-phase AC condenser fan motor 470 may be an induction motor, a permanent magnet motor, a single speed motor, a variable speed motor and/or other suitable motor. The 3-phase AC condenser fan motor 470 is configured to receive a predetermined peak voltage, such as 575 VAC, 480 VAC, 230 VAC, 208 VAC, or other AC voltage.

In another embodiment and as an alternative to using the 3-phase AC condenser fan motor 470, a condenser fan motor assembly 472 is connected to the DC bus 426 and the reference terminal 434 via lines 474, 476. The condenser fan motor assembly 472 includes a condenser fan motor 473 (e.g., a permanent magnet motor, an induction motor, a synchronous reluctance motor or other AC condenser fan motor) that may be a single speed or a variable speed motor. In one embodiment the condenser fan motor 473 is a switched reluctance motor that receives pulsed DC. The condenser fan motor assembly 472 is configured to receive a predetermined peak voltage, such as 810 VDC, 675 VDC, 300 VDC, or other DC voltage. The condenser fan motor assembly 472 may be directly connected to the DC bus 426 and the reference terminal 434 and may include a control circuit 480. The control circuit 480 may include a relay 482, a controller 484, a variable speed interface (VSI) 486 and/or other circuit components to transfer, adjust, and/or convert the received DC voltage signal from the DC bus 416. The predetermined peak voltage may be converted to AC via the control circuit 480 or may be pulsed by the control circuit 480 and provided to the condenser fan motor 473. Another example embodiment for indirectly connecting a condenser fan to the DC bus 426 and reference terminal 434 is described below with respect to FIG. 6. The control circuit 480 may adjust the voltage, peak voltage, frequency, and/or duty cycle of the voltage signal provided to the condenser fan motor 473.

In one embodiment, inductors 490, 492, 494 are connected respectively to the compressor power lines 452, 454, 456 and to power inputs of the AC condenser fan motor 470. The inductors 490, 492, 494 may be included, for example, to reduce peak voltages seen by the AC condenser fan motor 470. The inductors 490, 492, 494 may be included based on an insulation rating of the AC condenser fan motor 470.

The relay 482 when in an open state disables the condenser fan motor 472 and when in a closed state enables the condenser fan motor 472. The VSI 486 may receive a control signal CONT from the control module 220 to adjust speed of the condenser fan motor 472. The control circuit 480 may close the relay 482 and/or adjust voltage to the condenser fan motor 472 based on the control signal CONT. The controller 484 may convert the DC voltage (first DC voltage) received from the DC bus 426 to (i) another (or second) DC voltage, or (ii) to an AC voltage. Thus, the control circuit 480 and/or the controller 484 may include a transformer to convert the first DC voltage. The controller 484 may vary the second DC voltage, a pulsed frequency of the first DC voltage, a pulsed frequency of the second DC voltage, or the AC voltage provided to the condenser fan motor 473 based on the control signal CONT.

During operation, the buck converter 404 downconverts a received voltage (e.g., 575 VAC) out of the bridge rectifier 420 to the DC voltage (e.g., 480 VAC, 230 VAC, or 208 VAC) received by the DC bus 426. The reduced DC voltage may be (i) converted to AC via the inverter and supplied to the compressor 102 and the AC condenser fan motor 470, or (ii) provided to the condenser fan motor assembly 472. The inverter outputs pulse width modulated (PWM) signals on the compressor power lines 452, 454, 456 that are received by the compressor 102 and the AC condenser fan motor 470. In one embodiment, the buck converter 404 may operate such that the received voltage is not downconverted, where a peak voltage provided to the inverter is a same as a peak voltage supplied to the bridge rectifier 420.

In one embodiment, the motor 488 of the compressor 102 and the AC condenser fan motor 470 are variable speed motors. In an embodiment, the motor 488 is an induction motor or a permanent magnet motor and the AC condenser fan motor 470 is an induction motor. The number of poles of the AC condenser fan motor 470 may be higher than the number of poles of the motor 488. The higher pole count causes the AC condenser fan motor 470 to spin at a lower speed than a speed of the motor 488 of the compressor 102. In one embodiment, the number of poles of the AC condenser fan motor 470 is twice the number of poles of the motor 488 of the compressor 102. In one embodiment, the number of poles of the AC condenser fan motor 470 is three times the number of poles of the motor 488 of the compressor 102. In another embodiment, both of the motors 470, 488 are induction motors and the number of poles of the AC condenser fan motor 470 is greater than the number of poles of the motor 488.

For further defined structure of the modules of FIGS. 2-4 and 10 see below provided methods of FIGS. 11-12 and below provided definition for the term “module”.

FIG. 5 shows an example of the control module 220. The control module 220 may include a load module 502, an AC voltage module 504, a DC voltage module 506, a current module 508, an output module 510 and a memory 512. Although the modules 502, 504, 506, 508, 510 and the memory 512 are shown as part of the control module 220, one or more of the modules 502, 504, 506, 508, 510 and the memory 512 may be part of or also included in the system control module 270. The information (data, parameters, and signals) received and/or generated by the module 502, 504, 506, 508, 510 may be shared between the modules 502, 504, 506, 508, 510. The output module 510 may include a timing module 513, a reference generation module 514, timers 515 and/or a peak detector 517. The memory 512 may include one or more tables 516. Operation of the modules 502, 504, 506, 508, 510 and memory 512 are further described below with respect to the method of FIG. 8.

The output module 510 may operate in an active mode, an inactive mode, a low activity mode, a high activity mode, a full PFC mode, and a partial PFC mode. In an embodiment, frequency of oscillated operation of the switch 414 is decreased rather than deactivated. The frequency may be decreased to less than, for example, 200 kHz during low activity periods (or low activity mode). Timing of the low activity periods may be the same or similar to that of inactive periods. As an example, the frequency during the low activity periods may be an order of magnitude less than during the active periods (or active mode). As such, operation of the switch 414 may be transitioned between low activity modes and high activity modes rather than between inactive modes and active modes.

The full PFC mode may refer to when the buck converter 404 is continuously in an active or high activity mode to buck (or decrease) the DC bus voltage to match a commanded DC voltage V_DCCOM. The partial PFC mode refers to switching between operating in (i) an active or high activity mode and (ii) an inactive or low activity mode.

In one embodiment, the timing module 513 switches from operating in the full PFC mode to operating in the partial PFC mode. The partial PFC mode reduces power losses by operating at reduced DC voltages and provides improved operating efficiency. The timing module 513 may, for example, operate in the partial PFC mode during light compressor loading conditions (e.g., load on compressor less than a predetermined load) and operate in the full PFC mode during heavy compressor loading conditions (e.g., load on compressor greater than or equal to the predetermined load). During the light load conditions, frequency of the switch 414 is decreased since the amount of current through the inductor 410 is low. As the current through the inductor 410 increases for increased load, the switch 414 may be pulse width modulated at a higher frequency to further decrease the bus voltage. This prevents overheating the inverter power circuit 232 of FIG. 2 during heavy load conditions.

The output module 510 generates signals PFC_OUTand INV_1-nbased on outputs of the module 502, 504, 506, 608. In one embodiment, the inverter signals INV_1-ninclude the inverter signals provided to the inverter of the compressor 102. In an alternative embodiment, the inverter signals INV_1-ninclude the inverter signals provided to the compressor 102 and to an inverter of an AC condenser motor. This alternative embodiment is shown in FIG. 6. Speeds of the motor of the compressor 102 and of the AC condenser fan motor 470 may be adjusted by adjusting: a duty cycle of the switch 414 and thus the DC voltage on the DC bus 426; and switching frequencies of the switches 440, 442, 444, 446, 448, 450. Adjusting the DC voltage on the DC bus 426 and the switching frequencies of the switches 440, 442, 444, 446, 448, 450 adjusts the voltage to frequency ratios of the compressor power lines 452, 454, 456, which adjusts the speeds of the motors 470, 488.

FIG. 6 shows a portion 600 of an inverter power circuit (e.g., the inverter power circuit 232 of FIG. 2) including a first inverter for the compressor 102 and a second inverter for an AC condenser fan motor 602. The portion 600 includes the buck converter 404. The buck converter 404 includes the inductor 410, diode 412, switch 414, driver 416, and capacitor 430. The inverter includes the switches 440, 442, 444, 446, 448, 450. The driver 416 generates the switch control signal SW_CTRLbased on the signal PFC_OUT. The driver 416 also generates inverter output signals INV_1-n, which may be generated based on the control signal INV_CONTfrom the control module 220, where n is the number of inverter control signals. Some of the inverter output signals INV_1-nare provided to the inverter of the AC condenser fan motor 602.

The inverter of the AC condenser fan motor 602 is provided by switches 610, 612, 614, 616, 618, 620. The switches 610, 612, 614, 616, 618, 620 are connected similar as the switches 440, 442, 444, 446, 448, 450 and to the DC bus 426 and reference terminal 434.

The AC condenser fan motor 602 is connected to and receives power from output terminals 630, 632, 634 via power lines 640, 642, 644. The output terminals 630, 632, 634 are connected respectively to (i) switches 610, 616, (ii) switches 612, 618, and (iii) switches 614, 620. In one embodiment, inductors 650, 652, 654 are connected to the output terminals 630, 632, 634 and inputs of the AC condenser fan motor 602 to reduce peak voltages seen by the AC condenser fan motor 602.

Although the example implementation of FIG. 6 is for a 3-phase condenser fan motor, the implementation may be modified for a single phase condenser fan motor. For example, a single phase AC fan condenser motor may be connected via a respective inverter to DC bus 726 and reference terminal 734 of FIG. 7.

FIG. 7 shows an example of portions 700, 702 of respectively a PFC circuit (e.g., the PFC circuit 212 of FIG. 2) and an inverter power circuit (e.g., the inverter power circuit 232 of FIG. 2) of a single-phase drive including a buck converter 704. The portions 700, 702 are configured similarly as the portions 400, 402 of FIG. 4. The portions 700, 702 may collectively be referred to as a drive circuit. The buck converter 704 may operate similarly as the buck converter 404 of FIG. 4.

The portion 700 includes an EMI filter 706, a rectification circuit 708, an inductor 710, a diode 712, a switch 714, a driver 716 and one or more current sensors 718a, 718b. The EMI filter 706 receives a single phase AC voltage V_ACfrom a single phase AC input 722. The EMI filter 706 may be connected to the output of the bridge rectifier 720 or an output of the first current sensor 718a. The EMI filter 706 filters the single phase AC voltage V_AC. The rectification circuit 708 includes a bridge rectifier 720. The bridge rectifier 720 may include four diodes, as shown. The bridge rectifier 720 includes AC inputs, a return input and an output. The AC inputs of the bridge rectifier 720 receive a single phase AC voltage output from the EMI filter 706. The return inputs are connected to a same output 724 of the second current sensor 718b. The output of the bridge rectifier 720 is connected to the switch 714. An output voltage of the bridge rectifier 720 may be referred to as a main voltage. A DC output of the portion 700 is provided to a DC bus 726, which may refer to the DC bus connected between the PFC circuit 212 and the inverter power circuit 208 of FIG. 2.

The inductor 710, diode 712, switch 714 and driver 716 provide an example implementation of the buck converter 704. The buck converter 704 may be configured differently than shown. The buck converter 704 operates as voltage and power converter. The buck converter 704 reduces a first (or main) voltage provided to the buck converter 704 to a second voltage provided to the DC bus 726. In one embodiment, the driver 716 controls ON time, OFF time, duty cycle and/or frequency of the switch 714 to adjust the voltage on the DC bus 726. The driver 716 may transition the switch between ON and OFF states based on an average mode control with a predetermined frequency, a variable minimum off time of the switch 714, a peak voltage mode control, and/or other control mode of operation. The average mode control referring to adjusting a duty cycle of the switch 714 and cycling the switch at the predetermined frequency.

The peak voltage mode control includes adjusting a peak voltage. The buck converter 704 reduces a peak voltage out of the bridge rectifier 720. The buck converter 704 may step down voltage while stepping up current. The buck converter 404 may be (i) OFF (operating in an inactive mode and switch 714 is held in an open state) or ON and switching the switch 714 between ON and OFF states at a low frequency for rising and falling portions of rectified AC signal out of the bridge rectifier 720, or (ii) ON, operating in a high activity mode, and switching the switch 714 between ON and OFF states at a high frequency near peaks of the rectified AC signal out of the bridge rectifier 720. The operation of the buck converter 704 limits the DC output voltage V_DCOUTat the DC bus 726 while reducing power losses of the buck converter 704. In one embodiment, the buck converter 704 may be turned ON (i.e. the switch 714 is closed) and maintained in the ON state, such that there is no switching loses. This may occur during light load conditions.

The inductor 710 is connected (i) at a first end, to the switch and a cathode of the diode 712, and (ii) at a second end, to the DC bus 726 and a capacitor 730. The inductor 710 operates as a choke and may be small (e.g., 80 micro-Henry (μH)). The diode 712 may be formed of, for example, silicon carbide SiC. The anode of the diode 712 is connected to an input 732 of the second current sensor 718b and a reference terminal 734 (e.g., a ground reference). The switch 714 is connected in series with the inductor 710 between (i) the output of the primary bridge rectifier 720 and/or the first current sensor 718a and (ii) the inductor 710.

The switch 714 may be a transistor, such as a super-junction FET, a MOSFET, and/or a super-junction MOSFET. The switch 714 may be configured to be oscillated between ON (e.g., closed) and OFF (e.g., open) states at a high frequency (e.g., greater than or equal to 200 kilo-hertz (kHz)). A first terminal of the switch 714 is connected to the output of the bridge rectifier 720 or an output of the first current sensor 718a. A second terminal of the switch 714 is connected to the inductor 710 and a cathode of the diode 712.

A control terminal of the switch 714 receives a control signal SW_CTRLfrom the driver (or switch driving control circuit) 716. The driver 716 generates the control signal SW_CTRLbased on an output signal PFC_OUTof the control module 220. The control module 220 generates the output signal PFC_OUTand the inverter control signal INV_CONTbased on: one or more current sense signal PFC_INC1, PFC_INC2from the current sensors 718; an AC signal PFC_ACREPrepresentative of the AC voltage V_AC; and a DC signal PFC_DCREPthat is representative of the DC output voltage V_DCOUT. The current sense signal PFC_INC1may be equal to and/or indicative of an amount of current (i) passing through the inductor 710, and/or (ii) passing through the PFC circuit. The current sense signal PFC_INC2may be equal to and/or indicative of an amount of current (i) returning from the DC bus 726 to the second current sensor 718b, and/or (ii) passing through the PFC circuit. The AC signal PFC_ACREPmay be equal to and/or indicative of the AC voltage V_AC. The DC signal PFC_DCREPmay be equal to and/or indicative of the DC output voltage V_DCOUT.

The capacitor 730 may be connected between the DC bus 726 and the reference terminal 734. The capacitor 730 may be connected (i) at a first end, to the inductor 710 and the DC bus 726, and (ii) at a second end, to the input 732 of the second current sensor 718b and the reference terminal 734.

The control module 220, which is further described above with respect to FIG. 5, controls operation of the driver 716. This may include adjusting the duty cycle and/or frequency of the SW_CTRL. This may also include generating an inverter control signal INV_CONTto control generation of inverter outputs signals INV_1-n, which are generated by the driver 716. In one embodiment, the inverter outputs signals INV_1-nare generated by the control module 220. The inverter outputs signals INV_1-nmay control operation of switches 740, 742, 744, 746 of the portion 702 of the inverter power circuit for a compressor 750 and/or switches of another inverter for a condenser fan. The switches 740, 742, 744, 746 collectively operate as an inverter. The switches 740, 744 are connected in series between the DC bus 726 and the reference terminal 734. The switches 742, 746 are connected in series between the DC bus 726 and the reference terminal 734. Compressor power lines 752, 754 are connected to respective terminals 758, 760. The terminal 758 is connected to switches 740, 744. The terminal 760 is connected to switches 742, 746.

The control module 220 may command a DC output voltage V_DCOUTthat is less than a peak voltage of the input voltage V_ACand/or the output of the bridge rectifier 720 during a period when the DC output voltage V_DCOUTis within a predetermined range. The predetermined range may be centered on the peak voltage of the input voltage V_ACand/or the output of the bridge rectifier 720. The commanded voltages may be determined by the control module 220.

Since the buck converter 704 reduces the voltage provided to the DC bus 726, a low voltage condenser fan can be connected to the compressor power lines 752, 754 or may be connected directly or indirectly to the DC bus 726 and reference terminal 734. As a first example embodiment, the single phase AC condenser fan motor 750 is connected to the compressor power lines 752, 754 and receives power from the inverter. The single phase AC condenser fan motor 752 may be an induction motor, a permanent magnet motor, a single speed motor, a variable speed motor and/or other suitable motor. The single phase AC condenser fan motor 752 is configured to receive a predetermined peak voltage, such as 575 VAC, 480 VAC, 230 VAC, 208 VAC, or other AC voltage.

In another embodiment and as an alternative to using the single phase AC condenser fan motor 752, a condenser fan motor assembly 754 is connected to the DC bus 726 and the reference terminal 734 via lines 774, 776. The condenser fan motor assembly 754 may be directly connected to the DC bus 726 and the reference terminal 734 and/or may include a control circuit 780, which may be configured similar to the control circuit 480 of FIG. 4. The condenser fan motor assembly 754 includes a condenser fan motor 755, which may be a single speed or a variable speed motor. The condenser fan motor assembly 754 is configured to receive a predetermined peak voltage, such as 810 VDC, 675 VDC, 300 VDC, or other DC voltage. The predetermined peak voltage may be provided to the condenser fan motor 755 or may be adjusted and/or converted by a controller of the control circuit 755 and then provided to the condenser fan motor 755. The control circuit 780 may include a relay, a controller, and/or a VSI. Another example embodiment for indirect connecting of a condenser fan to the DC bus 726 and reference terminal 734 is described above with respect to FIG. 6.

In one embodiment, inductors 790, 792 are connected respectively to the compressor power lines 752, 754 and to power inputs of the AC condenser fan motor 752. The inductors 790, 792 may be included, for example, to reduce peak voltages seen by the AC condenser fan motor 752. The inductors 790, 792 may be included based on an insulation rating of the AC condenser fan motor 752.

In one embodiment, the compressor 750 and the AC condenser fan motor 752 are variable speed devices. The number of poles of AC condenser fan motor 752 may be higher than the number of poles of a motor 788 of the compressor 750. The higher pole count causes the AC condenser fan motor 752 to spin at a lower speed than a speed of the motor 788 of the compressor 750. In one embodiment, the number of poles of the AC condenser fan motor 752 is twice the number of poles of the motor of the compressor 750.

For further defined structure of the modules of FIGS. 2-7 see below provided method of FIG. 8 and below provided definition for the term “module”

The systems disclosed herein may be operated using numerous methods, an example methods is illustrated in FIG. 8. In FIG. 8, a method of operating a multi-phase drive (e.g., the multi-phase drive of FIG. 4) is shown. Although the following tasks are primarily described with respect to the implementations of FIGS. 4-6, the tasks may be easily modified to apply to other implementations of the present disclosure including the single phase implementation of FIG. 7. The tasks may be iteratively performed.

The method may begin at 800. At 802, the load module 502 may receive various signals and parameters from (i) the PFC circuit 212 of FIG. 2 including signals and parameters from the drive circuit of FIG. 4, and (ii) the inverter power circuit 208 of FIG. 2. The signals and parameters may include a voltage DC_DCoutof the DC bus 426 between the PFC circuit 212 and the inverter power circuit 208. At least some of the signals and parameters are disclosed in and described with respect to FIG. 2. The signals and parameters may include DC signals and/or measured DC voltages corresponding to DC voltages on the DC bus, amounts of current supplied to the compressor (e.g., one of the compressors 102, 750), voltages of power supplied to the compressor, sensor input data, commanded and/or manually entered parameters, and/or other shared data and parameters. The load module 502 may generate a load signal LD that is indicative of a load on the compressor based on the stated signals and parameters. The load signal LD may be generated based on a load algorithm, one or more maps, one or more equations, one or more tables (e.g., one or more of the tables 516), predetermined (or historical) data, and/or predicted (or estimated) future data. The load algorithm, maps, equations and/or tables may relate the signals and parameters to provide a calculated load and/or value indicative of the load on the compressor.

At 804, the AC voltage module 504 may receive or generate the AC signal PFC_ACREP. The AC voltage module 504 may detect voltages at the output of the bridge rectifier 420. The AC signal PFC_ACREPmay be set equal to and/or be representative of one or more of the output of the bridge rectifier 420.

At 806, the DC voltage module 506 may receive or generate the DC signal PFC_DCREP. The DC voltage module 506 may (i) detect the voltage DC_DCoutat the DC bus between the PFC circuit 212 and the inverter power circuit 208, and/or (ii) receive a DC bus voltage indication signal from a sensor and/or module external to the control module 220 and/or the DC voltage module 506.

At 808, the current module 508 may determine an amount of current supplied to the compressor and/or passing through one or more of the current sensors 418. This may be based on the current sense signals PFC_INC1, PFC_INC2.

At 810, the reference generation module 514 may generate a reference sinusoidal signal and/or a reference rectified sinusoidal signal. The references signals may be generated based on the AC input signal V_AC, an output of the EMI filter 406, and/or the output of the bridge rectifier 420. In one embodiment, the reference signals are generated based on the output of the EMI filter 406 or the output of the bridge rectifier 420. This may include estimating the phase of the output of the EMI filter 406 or the output of the bridge rectifier 420. The AC input signal V_AC, the output of the bridge rectifier 420 and/or the output of the EMI filter 406 may have noise or irregular activity as not to be perfect sinusoidal and/or rectified sinusoidal waves. The reference generation module 514 generates the reference signals to be pure sinusoidal and/or rectified sinusoidal reference signals having the same phase as the AC input signal V_AC, the output of the bridge rectifier 420 and/or the output of the EMI filter 406. This synchronizes the reference signals to the AC input signal V_AC, the output of the bridge rectifier 402 and/or the output of the EMI filter 406. The reference generation module 514 may output reference data including phase, frequency, period, and/or other time-varying derivative (or gradient) of the reference signals. The reference data may include scaled versions of the reference signals.

At 812, the timing module 513 may generate the commanded DC voltage V_DCCOMto be less than a peak (or maximum) AC input voltage V_ACand/or a peak (or maximum) output voltage of the bridge rectifier 420. This is unlike traditional PFC circuits, which always have the commanded DC voltages above a peak AC input voltage. The commanded DC voltage V_DCCOMmay be set to be within a predetermined range of the peak output voltage of the bridge rectifier 420. As an example, as the load on the compressor increases, the commanded DC voltage V_DCCOMmay be decreased. By lowering the commanded DC voltage V_DCCOM, the amount of time between end times and successive start times (or times between active modes and following inactive modes) of oscillated switch control operation increases. This allows the DC output voltage V_DCOUTto increase during inactive periods to a higher peak voltage. Mode transition points refer to transitions between (i) the active (and/or high activity) mode (oscillated switch operation enabled) and (ii) the low activity mode. Examples of mode transition points are shown as cross-over points in FIG. 5, however the mode transition points may not match corresponding cross-over points depending on the start times and end times (i.e. phase angles) of the mode transition points. As another example, by increasing the commanded DC voltage V_DCCOMrelative to the peak voltage of V_ACand/or output of the bridge rectifier 420, periods when oscillated operation of the switch 414 are decreased in length. A small change in the commanded DC voltage V_DCCOMcan make a large difference in peak current supplied.

At 814, the timing module 513 may adjust: next start times and/or end times of the oscillated operation of the switch 414; duty cycle of the oscillated operation of the switch 414; frequency of the oscillated operation of the switch 414; frequency of inverter switches (e.g., the switches 442, 444, 446, 448, 450, 610, 612, 614, 616, 618, 620, 740, 742, 744, 746, and/or the control signal DC_CONT. This may include adjusting times of rising and/or falling edges of the control signal SW_CTRL. The stated adjustments may be performed to adjust a speed of one of the motors 470, 472, 602, 752, 754. The stated adjustment(s) may be based on the load of the compressor determined at 802, the AC voltage received and/or generated at 804, the DC voltage received and/or generated at 606, one or more of the current levels detected at 808, and/or one or more of the reference signals generated at 810. The adjustments may also be based on capacitance of the DC bus, torque commanded of the compressor, predicted voltages of the output of the bridge rectifier 420, and/or other parameters associated with operation of the drive circuit. The adjustments may advance or delay the transition start times and/or the transition end times. The adjustments may be determined based on equations, algorithms, maps, and/or tables relating the stated parameters, which may be stored in the memory 512 and accessed by the timing module 513. The adjustments may also be based on previous (historical) values and/or results, which may also be stored in and accessed from the memory 512. For example, if a last peak DC bus voltage or peak detected current (current detected by one of the current sensors 418a, 418b) was above a predetermined threshold, than the next transition end time or transition start time may be advanced to reduce the peak DC bus voltage and/or peak detected current.

At 816, the timing module 513 determines whether the phase angle of the output of the bridge rectifier 420 matches a predetermined start time of an active period. In addition or alternatively, voltages of the output of the bridge rectifier 420 (or input to switch 414) and/or the output of the buck converter 404 (or output of the inductor 410) may be compared to predetermined voltages for the predetermined start time to determine whether the stated condition exists. If there is a match, task 818 is performed, otherwise task 620 is performed.

At 818, the timing module 513 transitions to the inactive mode or low activity mode. If the timing module 513 transitions to the inactive mode, then the buck converter 404 is transitioned to an OFF state and the switch 414 is switched to an open state. If the timing module 513 transitions to the low activity mode, then oscillated operation of the switch 414 continues, but at a reduced frequency and/or at a reduced duty cycle, such that OFF times of the switch 414 are increased and/or ON times of the switch 414 are decreased. Task 802 may be performed subsequent to task 818.

At 820, the timing module 513 may determine whether the DC bus voltage is less than or equal to the commanded DC voltage V_DCCOMand/or whether a next transition phase angle (next phase angle at which point a transition between operating modes occurs) is an end time (e.g., one of the end times e1-e6 of FIGS. 5-6) for an inactive mode and/or low activity mode. In addition or alternatively, voltages of the output of the bridge rectifier 420 and/or the buck converter 404 may be compared to predetermined voltages for the predetermined end time to determine whether one or more of the stated conditions exist. The timing module 513 may also or alternatively determine whether the current transition phase angle is within a predetermined range (e.g., between a last start time and a subsequent end time) of a current inactive mode or low activity mode. In addition or alternatively, voltages of the output of the bridge rectifier 420 and/or the buck converter 404 may be compared to predetermined voltages for the predetermined range to determine whether the stated condition exists. At the end time, the timing module 513 transitions from an inactive mode or low activity mode to an active and/or high activity mode. If the DC bus voltage is less than or equal to the commanded DC voltage V_DCCOMand/or the next transition phase angle is at an end time for an inactive mode or low activity mode, then task 822 is performed, otherwise task 821 is performed.

At 821, the timing module 513 determines whether (i) a light load condition exists, (ii) V_ACis less than a “high-line” voltage (is at or near a maximum operating voltage) and/or voltage out of the bridge 420 (or Vbridge) is less than a predetermined maximum voltage, and/or (iii) if temperature of the inverter power circuit 232 is inbound (i.e. within a predetermined temperature range). By checking if V_ACis less than the “high-line” voltage and/or output of the bridge 420 Vbridge is less than the predetermined maximum voltage, the system prevents stress on the inverter power circuit 232 of FIG. 2. If a light load condition exists, V_ACis less than a “high-line” voltage, Vbridge is less than a predetermined maximum voltage, and/or the temperature of the inverter power circuit 232 is inbound, then task 830 is performed, otherwise task 824 is performed. In one embodiment, when (i) a light load condition exists, (ii) V_ACis less than a “high-line” voltage and/or Vbridge is less than a predetermined maximum voltage, and (iii) the temperature of the inverter power circuit 232 is inbound, task 830 is performed, otherwise task 824 is performed.

At 822, the timing module 513 remains in or transition to the low activity mode. Task 802 may be performed subsequent to task 822. At 824, the timing module 513 determines whether the phase angle is an end time of an active mode and/or a high activity mode. In addition or alternatively, a voltage of the output of the bridge rectifier 420 and/or the buck converter 404 may be compared to predetermined voltages for the end time to determine whether the stated condition exists. If the phase angle is an end time, task 826 is performed, otherwise task 828 is performed.

At 826, the timing module 513 transitions to the active (or high activity) mode. This includes oscillated operation of the switch 414 at a first (or high) frequency. The duty cycle of the switch 808, including durations of ON times and OFF times, may correspond to duty cycle information determined at 814. Task 802 may be performed subsequent to task 826. At 828, the timing module 513 operates in the active mode or high activity mode. Task 802 may be performed subsequent to task 828.

At 830, the switch 414 is held in a closed (or ON) state and is not switched between states. When the switch is ON, the portion 400 performs as a 3-phase rectifier with a DC choke. Thus, no switching occurs when V_ACis at a nominal or low-line voltage. Task 802 may be performed subsequent to task 830.

When V_ACis too high, switching of the switch 414 (or bucking) occurs to decrease the bus voltage V_DCOUT. As the load increases, the bus voltage V_DCOUTis decreased, the amount of current through the inductor 410 increases and the control module 220 begins bucking by pulse width modulating the switch 414 to lower the bus voltage V_DCOUT(e.g., at tasks 826, 828) to a selected command voltage. The control module 220 may shape the current by adjusting the duty cycle of SW_CTRLduring this period for PFC operation. This may include providing a flat (or constant) amount of current through the choke or a profiled current shape. The ability to buck during certain conditions and not to buck during other conditions is referred to as “partial buck” operation.

During the light load condition, the switch 414 may be switched at a low frequency since the amount of current through the inductor 410 is low. As the current through the inductor 410 increases for increased load, the frequency of the switch 414 may be increased to decrease the bus voltage. This prevents overheating the inverter power circuit 232 of FIG. 2 during heavy load conditions.

Although the above tasks 816-830 are provided in a particular order, tasks 816-830 may be performed in a different order. As an example, task 821, 824, 826, 828 may be performed prior to tasks 816, 818, 820 and 822. If task 821, 824, 826, 828 are performed prior to tasks 816, 818, 820 and 822, then task 820 may be modified to determine whether the DC bus voltage is greater than or equal to the commanded voltage, the next transition phase angle is a start time of an active mode and/or high activity mode, and/or the current phase angle is within a predetermined range (e.g., between an end time of an inactive mode or a low activity mode and a subsequent start time of the inactive mode or low activity mode). This may include comparing a voltage of the outputs of the bridge rectifier 420 and/or the buck converter 404 to corresponding predetermined voltages and ranges to effectively determine if the next transition phase angle is a start time of an active mode and/or high activity mode, and/or the current phase angle is within a predetermined range.

The above-described operations of FIG. 8 are meant to be illustrative examples; the tasks may be performed sequentially, synchronously, simultaneously, continuously, during overlapping time periods or in a different order depending upon the application. Also, any of the tasks may not be performed or skipped depending on the implementation and/or sequence of events.

The peak voltages for the condenser fan motors described above are not higher than and may be lower than peak voltages seen at the mains and/or voltages received by the buck converters. Levels of the peak voltages seen by the condenser fan motors can be adjusted by controlling the buck converters to adjust the DC voltage on the DC buses. Inclusion of a buck converter is less expensive than inclusion of a transformer for high-to-low voltage conversion. To adjust the speeds of the condenser motors, the DC bus voltages may be adjusted, frequencies of inverter switches may be adjusted, and/or control signals to condenser fan motor assemblies may be adjusted.

In one embodiment, a high AC voltage (e.g., 575 VAC or 600 VAC) is downconverted by a buck converter to a low DC voltage (e.g., 675 VDC or 300 VDC), which is provided to an inverter that outputs a low AC voltage (e.g., 480 VAC or 230 VAC). This allows for a low voltage inverter and low voltage condenser fan motor. In one embodiment, the condenser fan motor is an induction motor and the condenser fan motor is “slaved” to a compressor, such that the power inputs of the condenser are connected to power lines of the compressor. The condenser fan motor may run at the same stator frequency as the compressor. The speed of the condenser fan motor is related to the speed of the compressor. In this example, the number of poles of the condenser fan motor is greater than the number of poles of the compressor. Since the buck output voltages and the peak voltages supplied to the condenser fan motor are reduced, insulation phase-to-phase and winding to ground ratings of the condenser fan motor are reduced and rated for the peak voltages.

In another embodiment, the speed of the condenser fan motor is adjusted by adjusting PWM of the corresponding inverter. The PWM adjustment is controlled to maintain the output voltage of the inverter below or equal to a predetermined voltage (e.g., 230 VAC).

The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be executed in different order (or concurrently) without altering the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the disclosure can be implemented in and/or combined with features of any of the other embodiments, even if that combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with one another remain within the scope of this disclosure.

Spatial and functional relationships between elements (for example, between modules, circuit elements, semiconductor layers, etc.) are described using various terms, including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” Unless explicitly described as being “direct,” when a relationship between first and second elements is described in the above disclosure, that relationship can be a direct relationship where no other intervening elements are present between the first and second elements, but can also be an indirect relationship where one or more intervening elements are present (either spatially or functionally) between the first and second elements. As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.”

In the figures, the direction of an arrow, as indicated by the arrowhead, generally demonstrates the flow of information (such as data or instructions) that is of interest to the illustration. For example, when element A and element B exchange a variety of information but information transmitted from element A to element B is relevant to the illustration, the arrow may point from element A to element B. This unidirectional arrow does not imply that no other information is transmitted from element B to element A. Further, for information sent from element A to element B, element B may send requests for, or receipt acknowledgements of, the information to element A.

In this application, including the definitions below, the term “module” or the term “controller” may be replaced with the term “circuit.” The term “module” may refer to, be part of, or include: an Application Specific Integrated Circuit (ASIC); a digital, analog, or mixed analog/digital discrete circuit; a digital, analog, or mixed analog/digital integrated circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor circuit (shared, dedicated, or group) that executes code; a memory circuit (shared, dedicated, or group) that stores code executed by the processor circuit; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system-on-chip.

The module may include one or more interface circuits. In some examples, the interface circuits may include wired or wireless interfaces that are connected to a local area network (LAN), the Internet, a wide area network (WAN), or combinations thereof. The functionality of any given module of the present disclosure may be distributed among multiple modules that are connected via interface circuits. For example, multiple modules may allow load balancing. In a further example, a server (also known as remote, or cloud) module may accomplish some functionality on behalf of a client module.

Some or all hardware features of a module may be defined using a language for hardware description, such as IEEE Standard 1364-2005 (commonly called “Verilog”) and IEEE Standard 1076-2008 (commonly called “VHDL”). The hardware description language may be used to manufacture and/or program a hardware circuit. In some implementations, some or all features of a module may be defined by a language, such as IEEE 1666-2005 (commonly called “SystemC”), that encompasses both code, as described below, and hardware description.

The term code, as used above, may include software, firmware, and/or microcode, and may refer to programs, routines, functions, classes, data structures, and/or objects. The term shared processor circuit encompasses a single processor circuit that executes some or all code from multiple modules. The term group processor circuit encompasses a processor circuit that, in combination with additional processor circuits, executes some or all code from one or more modules. References to multiple processor circuits encompass multiple processor circuits on discrete dies, multiple processor circuits on a single die, multiple cores of a single processor circuit, multiple threads of a single processor circuit, or a combination of the above. The term shared memory circuit encompasses a single memory circuit that stores some or all code from multiple modules. The term group memory circuit encompasses a memory circuit that, in combination with additional memories, stores some or all code from one or more modules.

The term memory circuit is a subset of the term computer-readable medium. The term computer-readable medium, as used herein, does not encompass transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); the term computer-readable medium may therefore be considered tangible and non-transitory. Non-limiting examples of a non-transitory computer-readable medium are nonvolatile memory circuits (such as a flash memory circuit, an erasable programmable read-only memory circuit, or a mask read-only memory circuit), volatile memory circuits (such as a static random access memory circuit or a dynamic random access memory circuit), magnetic storage media (such as an analog or digital magnetic tape or a hard disk drive), and optical storage media (such as a CD, a DVD, or a Blu-ray Disc).

The apparatuses and methods described in this application may be partially or fully implemented by a special purpose computer created by configuring a general purpose computer to execute one or more particular functions embodied in computer programs. The functional blocks and flowchart elements described above serve as software specifications, which can be translated into the computer programs by the routine work of a skilled technician or programmer.

The computer programs include processor-executable instructions that are stored on at least one non-transitory computer-readable medium. The computer programs may also include or rely on stored data. The computer programs may encompass a basic input/output system (BIOS) that interacts with hardware of the special purpose computer, device drivers that interact with particular devices of the special purpose computer, one or more operating systems, user applications, background services, background applications, etc.

The computer programs may include: (i) descriptive text to be parsed, such as HTML (hypertext markup language), XML (extensible markup language), or JSON (JavaScript Object Notation) (ii) assembly code, (iii) object code generated from source code by a compiler, (iv) source code for execution by an interpreter, (v) source code for compilation and execution by a just-in-time compiler, etc. As examples only, source code may be written using syntax from languages including C, C++, C#, Objective-C, Swift, Haskell, Go, SQL, R, Lisp, Java®, Fortran, Perl, Pascal, Curl, OCaml, Javascript®, HTML5 (Hypertext Markup Language 5th revision), Ada, ASP (Active Server Pages), PHP (PHP: Hypertext Preprocessor), Scala, Eiffel, Smalltalk, Erlang, Ruby, Flash®, Visual Basic®, Lua, MATLAB, SIMULINK, and Python®.

None of the elements recited in the claims are intended to be a means-plus-function element within the meaning of 35 U.S.C. § 112(f) unless an element is expressly recited using the phrase “means for,” or in the case of a method claim using the phrases “operation for” or “step for.”

Claims

1. A drive circuit comprising: a rectification circuit configured to rectify a first alternating current (AC) voltage signal to generate a rectified voltage signal;a buck converter configured to downconvert the rectified voltage signal to a direct current (DC) voltage signal, wherein the DC voltage signal is supplied to a DC bus;an inverter configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor and to a condenser fan motor,wherein peak voltages of the second AC voltage signal are less than peak voltages of the first AC voltage signal; anda control module configured to (i) transition a switch of the buck converter between ON and OFF states at a first frequency for rising and falling portions of the rectified voltage signal, and (ii) transition the switch of the buck converter between ON and OFF states at a second frequency for portions of the rectified voltage signal at a peak AC voltage, wherein the second frequency is higher than the first frequency.
2. The drive circuit of claim 1, wherein a number of poles of the condenser fan motor is greater than a number of poles of a motor of the compressor motor.
3. The drive circuit of claim 2, wherein the condenser fan motor is an induction motor; andthe compressor motor is an induction motor or a permanent magnet motor.
4. The drive circuit of claim 1, wherein a number of poles of the condenser fan motor is twice or three times the number of poles of the compressor motor.
5. The drive circuit of claim 1, wherein a speed of the condenser fan motor is based on the second AC voltage signal, such that a speed of the condenser fan motor is adjusted when a speed of the compressor motor is adjusted.
6. The drive circuit of claim 1, wherein the condenser fan motor is operated at a same stator frequency as a motor of the compressor motor.
7. The drive circuit of claim 1, wherein: the buck converter comprises a switch, anda driver configured to transition the switch between an open state and a closed state;a peak voltage of the DC voltage signal is based on an average voltage at an output of the switch; andthe driver is configured to reduce a DC voltage of the DC voltage signal by adjusting a duty cycle of the switch.
8. The drive circuit of claim 1, wherein: the buck converter comprises a switch and a driver;the driver is configured to receive a first control signal from the control module and control a state of the switch based on the first control signal;the inverter is configured to receive a plurality of control signals from the driver or the control module; andthe control module is separate from the driver.
9. The drive circuit of claim 1, wherein the first AC voltage signal and the second AC voltage signal are 3-phase AC voltage signals.
10. The drive circuit of claim 1, wherein the first AC voltage signal and the second AC voltage signal are single phase AC voltage signals.
11. The drive circuit of claim 1, further comprising: a first inductor connected from a first output of the inverter to a first input of the condenser fan motor; anda second inductor connected from a second output of the inverter to a second input of the condenser fan motor.
12. The drive circuit of claim 11, further comprising a third inductor connected from a third output of the inverter to a third input of the condenser fan motor.
13. The drive circuit of claim 1, wherein the control module is configured to limit a DC voltage of the DC bus while reducing power losses of the buck converter.
14. The drive circuit of claim 1, wherein the control module is configured to generate a DC command voltage for the DC bus that is less than the peak voltages of the first AC voltage signal.
15. The drive circuit of claim 1, wherein the control module is configured to control transition of a switch of the buck converter and states of switches of the inverter such that the peak voltages of the second AC signal are less than (i) the peak voltages of the first AC signal, and (ii) peak voltages of the rectified voltage signal.
16. A refrigeration system comprising: the drive circuit of claim 1;the compressor motor; andthe condenser fan motor,wherein the control module is configured to control states of switches of the buck converter and the inverter to control the peak voltages of the second AC voltage signal.
17. The refrigeration system of claim 16, wherein the condenser fan motor spins at a lower speed than the compressor motor.
18. A refrigeration system comprising: a rectification circuit configured to rectify a first alternating current (AC) voltage signal to generate a rectified voltage signal;a buck converter configured to downconvert the rectified voltage signal to a direct current (DC) voltage signal, wherein the DC voltage signal is supplied to a DC bus;an inverter configured to convert the DC voltage signal to a second AC voltage signal and supply the second AC voltage signal to a compressor motor and to a condenser fan motor,wherein peak voltages of the second AC voltage signal are less than peak voltages of the first AC voltage signal;a plurality of sensors configured to detect a first level of current through an inductor of the buck converter and a second level of current returning from the buck converter and the inverter; anda control module configured to control states of a switch of the buck converter and states of switches of the inverter based on the first level of current and the second level of current.
19. The refrigeration system of claim 18, wherein the control module is configured to control states of the switch of the buck converter and states of the switches of the inverter based on representative voltages of the first AC signal and the DC bus.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No. 15/487,226 filed on Apr. 13, 2017. This application claims the benefit of U.S. Provisional Application No. 62/323,498, filed on Apr. 15, 2016, U.S. Provisional Application No. 62/323,505, filed Apr. 15, 2016, U.S. Provisional Application No. 62/323,607, filed Apr. 15, 2016, U.S. Provisional Application No. 62/398,641, filed on Sep. 23, 2016, and U.S. Provisional Application No. 62/398,658, filed on Sep. 23, 2016. The entire disclosures of the applications referenced above are incorporated herein by reference.

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Related Publications (1)

	Number	Date	Country
	20220320997 A1	Oct 2022	US

Provisional Applications (5)

Number	Date	Country
62398641	Sep 2016	US
62398658	Sep 2016	US
62323607	Apr 2016	US
62323505	Apr 2016	US
62323498	Apr 2016	US

Divisions (1)

	Number	Date	Country
Parent	15487226	Apr 2017	US
Child	17849564		US

Buck-converter-based drive circuits for driving motors of compressors and condenser fans

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