CABLE CONNECTOR ASSEMBLY

BACKGROUND OF THE DISCLOSURE

The Present Disclosure relates generally to high speed data transmission systems suitable for use in transmitting high speed signals at low losses from chips or processors of a chip package to backplanes and devices, and more particularly to connectors suitable for use in integrated connector interface-chip package routing assemblies.

Electronic devices such as routers, servers, switches and the like need to transmit data at high data transmission speeds in order to serve the rising need for bandwidth and delivery of streaming audio and video in many end user devices. Chips are the heart of these routers, switches and other devices. These chips typically include a processor such as an ASIC (application specific integrated circuit) or an FPGA (field programmable gate array) and the like, these chips have dies that are typically connected to a substrate (creating a package) by way of conductive solder bumps or other convenient connection. The package may include micro-vias or plated through holes that extend through the substrate to solder balls. These solder balls comprise a ball grid array by which the package is attached to the motherboard. The motherboard includes numerous traces formed in it that define transmission lines which include differential signal pairs for the transmission of high speed data signal, ground paths associated with the differential signal pairs, and a variety of low speed transmission lines for power, clock and logic signals as well as other components. These traces include traces that are routed from the ASIC to the I/O connectors of the device into which external connectors are connected to provide a connection between one or more external plug connectors and the chip member. Other traces are routed from the ASIC to backplane connectors that permit the device to be connected to an overall system such as a network server or the like.

These conductive traces thus form transmission lines as part of the mother board and extend between the chip member and connectors to provide that provides a connection between one or more external plug connectors and the chip member. Circuit boards are usually formed from a material known as FR4, which is inexpensive. Although inexpensive, FR4 is known to promote losses in high speed signal transmission lines that transfer data at rates of about 6 Gbps and greater. These losses increase as the speed increases and therefore make FR4 material undesirable for the high speed data transfer applications of about 10 Gbps and greater. This drop off begins at about 6 Gbps (or 3 GHz using NRZ encoding) and increases as the data rate increases. In order to use such traces in FR4, a designer may have to utilize amplifiers and equalizers, which increase the final cost of the device.

Custom materials for circuit boards, such a MEGATRON, are available that reduce such losses, but the prices of these materials substantially increase the cost of the circuit board and, consequently, the electronic devices in which they are used. Additionally, when traces are used to form signal transmission lines, the overall length of the transmission lines can exceed threshold lengths at which problems to appear in operation. These lengths may approach 10 inches and longer in length and may include bends and turns that can create reflection and noise problems as well as additional losses. Losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers but these elements increase the cost of manufacturing the circuit board. Do so, however, complicates the design inasmuch as additional board space is needed to accommodate these amplifiers and repeaters. In addition, the routing of the traces of such a transmission line may require multiple turns. These turns and the transitions that occur at terminations affect the integrity of the signals transmitted thereby. These custom circuit board materials thus become more lossy at frequencies above 10 Ghz than cable transmission lines. It then becomes difficult to route transmission line traces in a manner to achieve a consistent impedance and a low signal loss therethrough.

It therefore becomes difficult to adequately design signal transmission lines in circuit boards and backplanes to meet the crosstalk and loss requirements needed for high speed applications. Accordingly, certain individuals would appreciate a cable connector suitable for use in integrated, high speed, connector interface-chip package routing assembly that provides transmission lines for transmitting high speed data signals (above 20 Gbps) without using traces on the circuit board.

SUMMARY OF THE DISCLOSURE

The present disclosure is therefore directed to a cable connector that may be used in an integrated routing assembly that is structured to fit within the housing of an electronic device as a single element and provide multiple data transmission channels that lead directly from a chip or processor (of the ASIC or FPGA type) to external connector interfaces. The routing assembly preferably utilizes twin-ax cables as its cables for transmitting differential signals from the chip package to the connector interfaces and vice-versa. The cables may be free in their extent between the chip package and the external connector interfaces and secured to the tray by way of clips or the like. The cable may alternatively be embedded or encased within the body of the tray extending from a selected end of the tray to the chip-receiving opening where the conductors of the cables are terminated to board connectors of the present disclosure that enables the cable conductors to mate with corresponding opposing contacts of the chip package. The embedding of the cables in the body of the tray protects the twin-ax cables from damage during assembly.

The cable connectors help connector the conductors to a board or package that is supporting a chip and can have a low profile to help minimize impact on air flow in the system. The cable connector can be used to terminate the free ends of the conductors of the cables to terminals of the cable connector. In this manner, the mating connectors can be used adjacent (or even on) the chip package in order to retain a low profile and their impedance and other performance parameters are better controlled. The cable connector can include a conductive carrier that holds the cables in place and oriented so their associated signal conductor and drain wire free ends are positioned for termination by welding to the terminals supported by a connector housing. The carrier can include mounting feet.

In addition to the carrier, a grounding collar can be provided and the grounding collar can have multiple tails formed at one end thereof. These tails and the mounting feet of the carrier grounding feet are contacted together, forming a double thickness region, to help common the ground structure and can also be used to adjust impedance. This double thickness extends in the horizontal direction, while a second carrier may be provided and the two carriers provide a second increased thickness in the vertical direction.

The free ends of the cables are held together in a first spacing by spacers so that the signal conductors and drain wires of the cables are arranged in a desired spacing. Sets of cables may be held together in groups of four cables to accommodate four complete signal transmission channels of four transmit paths and four corresponding receive paths. The spacers are mounted on carriers, which can be conductive and mirror images of each other. The carriers can be elongated with top and base flanges. The top flanges extend vertically and the base flanges are offset from the top flanges and extend horizontally from them. The top and base flanges provide reference ground planes in two directions for the signal pairs provided by the cables.

The carriers include structure that allows the free ends of the signal conductor and drain wire free ends to extend in opposite directions. In this arrangement, the free ends of the signal conductors extend downwardly and outwardly, while the free ends of the drain wires extend upwardly. The base flange is configured with multiple slots that are spaced apart for their length. A ground collar can be attached to each carrier and the collars extend over the spacers in a manner so that the collars and carriers cooperatively define a continuous shield that encircles a selected portion of each spacer and over the free ends of the cables fixed therein. The free ends of the signal conductors and drain wires can exit the cables about even with an edge of each collar.

The ground collar has a plurality of tails that extend generally downwardly and out from the carriers at angles to the cables. The first tails are narrow and slightly uniform in their extent. The second tails have a tapered configuration and have a width that tapers along the length of the second tails from the ground collar to their tips. The third tails can be wider than the first and second tails and the third tails preferably extend to contact multiple terminals of the sub-connector. The first tails are arranged at the lengthwise ends of the carrier, while the second tails are positioned so they extend between the signal conductors of each cable signal pair. The third tails are positioned between each cable signal pair.

An elongated, insulative wire comb is provided for each carrier and it extends lengthwise of the carrier and has a series of wire-receiving slots that receive the free ends of the signal conductors. The comb holds the free ends in place for attachment but also isolates them from contacting one another in shorting contact. The second tails have openings formed in their wider (neck) sections occurring near the top of the tails and these openings receive the free ends of the drain wires. The free ends of the drain wires are bent upwardly and lie on the exterior surface of the collar. The wider tail extend down from the ground collar and then double back inwardly to match the exterior configuration of the spacers. In this manner the widthwise edges of the tails are generally aligned with the signal conductors so that edge coupling may occur with the third tails. The widths of the carrier flange feet tends to match those of the ground collar third tails.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure is illustrated by way of example and not limited in the accompanying Figures in which like reference numerals indicate similar elements and in which:

FIG. 1 is a perspective view of the interior of a conventional electronic device with a chip package in place upon a motherboard;

FIG. 1A is a schematic sectional view of the electronic device of FIG. 1 illustrating how the circuit board is used for routing signal transmission channels between the chip package and the external connector interfaces of the device;

FIG. 2 is a perspective view of a routing assembly of the present disclosure in place underneath a motherboard and in which the chip package has a heat sink in place thereon;

FIG. 2A is another perspective view of the embodiment depicted in FIG. 2 taken from the rear;

FIG. 2B is a schematic sectional view of the routing assembly of FIG. 2 illustrating how the cables are embedded within the tray for routing signal transmission channels between a chip package substrate and the external connector interfaces of the assembly;

FIG. 3 is a perspective view of the routing assembly in place underneath a host device motherboard and contacting the chip package from below;

FIG. 3A is a schematic sectional view of the routing assembly of FIG. 8 illustrating how the tray is positioned beneath the motherboard of the host device and the connection of the cables to the chip package and the external connector interfaces of the device;

FIG. 4 is a perspective view of a wire-to-board connector assembly in the same underside orientation as provided in FIG. 3;

FIG. 4A is a partially exploded view of the embodiment depicted in FIG. 4, illustrating the receptacle portion fixed to the motherboard and the housing, and cable connector spaced apart for clarity;

FIG. 4B is an exploded view of the cable connector of FIG. 4A, but in a different orientation;

FIG. 5 is a perspective view of the cable connector depicted in FIG. 4B with the strain relief portion removed for clarity;

FIG. 5A is a side elevational view of the cable-connector assembly of FIG. 5;

FIG. 5B is a plan view of the cable-connector assembly of FIG. 5;

FIG. 5C is a vertical sectional view taken along lines C-C of the assembly of FIG. 5;

FIG. 5D is a vertical sectional view taken along lines D-D of the assembly of FIG. 5;

FIG. 5E is an elevational side view of the assembly of FIG. 5, taken along lines E-E thereof;

FIG. 6 is another perspective view of the embodiment depicted in FIG. 5;

FIG. 6A is a perspective view of the cables held in place within the assembly spacer;

FIG. 6B is a simplified side elevational view of the assembly of FIG. 6, illustrating the conductors of the cables in contact with terminals;

FIG. 6C depicts the embodiment shown in FIG. 6B with the spacer in place;

FIG. 6D depicts the embodiment shown in FIG. 6C with the ground collar in place;

FIG. 7 is an exploded perspective view of the cable connector depicted in FIG. 6;

FIG. 7A is another perspective view of the embodiment depicted in FIG. 7;

FIG. 7B is a simplified bottom view of the embodiment depicted in FIG. 7A, showing the carrier;

FIG. 7C is an elevated side view of a cable free end prepared for termination;

FIG. 7D is the same view as FIG. 7C but with the cable spacer in place;

FIG. 7E is a top plane view of the cable connector depicted in FIG. 6;

FIG. 8 is a perspective view of one of the cable carriers of the cable connector depicted in FIG. 6;

FIG. 8A is an exploded perspective view of the embodiment depicted in FIG. 8;

FIG. 8B is a perspective view of the cable connector of FIG. 6 with the carrier removed from a sub-connector and the wire combs spaced apart for clarity;

FIG. 8C is a top plan view of the wire comb depicted in FIG. 8B;

FIG. 8D is a bottom plan view of the wire comb of FIG. 8C

FIG. 9 is a perspective view of a connector assembly similar to that shown in FIG. 4 but with a cable connector having a right angle style; and,

FIG. 9A is a partially exploded view of the connector assembly of FIG. 9.

DETAILED DESCRIPTION

The detailed description that follows describes exemplary embodiments and is not intended to be limited to the expressly disclosed combination(s). Therefore, unless otherwise noted, features disclosed herein may be combined together to form additional combinations that were not otherwise shown for purposes of brevity.

FIGS. 1 and 1A illustrates a conventional electronic device 30, such as a router, switch, etc. that has a sheet metal housing 31 with a front wall 32 and an opposing rear wall 34. The device 30 supports within the housing, a motherboard 36 that includes various electronic components such as a chip package 38 with an associated processor 40, a power supply 42 and additional integrated circuits, connectors, capacitors, resistors, etc. The front wall 32 has a series of openings 33 that are aligned with first connectors 43 to define connector ports for the device 30. An array of first connectors 43 are mounted to the motherboard 36 at the front end thereof and enclosed within metal shielding cages 44, or adapter frames, that are placed over the connectors 43 and onto the motherboard 36. Likewise, a series of second connectors 46 are mounted along the rear edge of the motherboard 36 and aligned with openings in the rear wall of the housing 31. These second connectors 46 may be a different style than the first connectors 43 (e.g., they could be a backplane style instead of an IO style).

In the known structure of the device of FIG. 1, the chip package 38 is connected to the first and second connectors by way of lengthy conductive traces 47 that extend from the chip package contacts through the motherboard 36 to the connectors 43, 46. Pairs of conductive traces 47 are required to define each differential signal transmission line and a third conductive trace will provide an associated ground that follows the path of the signal transmission line. Each such signal transmission line is routed through or on the motherboard and such routing has certain disadvantages. FR4 is the material that is commonly used for circuit boards, and unfortunately, it becomes relatively lossy at frequencies above 10 Ghz. Turns, bends and crossovers of these signal transmission line traces 47 are usually required to route the transmission line on the motherboard from the chip package contacts to the connectors. These directional changes in the traces can create signal reflection and noise problems, as well as additional losses. Although losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers, these elements increase the cost of manufacturing of the final circuit (mother) board. This complicates the layout of the circuit board because additional board space is needed to accommodate such amplifiers and repeaters and this additional board space may not be available in the intended size of the device. Custom materials for circuit boards are available that are less lossy, but the cost of these materials increase the cost of the circuit board and, consequently, the host devices in which they are used. Still further, lengthy circuit traces require increased power to drive high speed signals through them and, as such, they hamper efforts by designers to develop “green” (energy-saving) devices.

In order to overcome these actual disadvantages, we have developed an integrated routing assembly 50 that incorporates the external connector interfaces of a host devices 51 into a single assembly and which provides a support for high speed differential pair signal transmission lines in the form of elongated cables 62 that extend between the connector interfaces and the chip package 88, eliminating the need for high speed routing traces on the motherboard 53. An embodiment of such an assembly is illustrated at 50 in FIG. 2. The depicted assembly 50 includes a front portion that accommodates a plurality of first connectors 57 and their associated housings 60 in preselected arrays, which are illustrated as four horizontal rows of connector housings 60 that are stacked vertically upon each other. Naturally, numerous other configurations are possible.

The connector housings 60 define the external connector interfaces for the device 50 in the form of connector ports 54, 56 and each such connector housing 60 contains a high speed connector 57, which can be a receptacle style connector. As can be appreciated, the connectors 57 can be arranged in horizontal rows in an integrated fashion, such as is depicted in FIGS. 2 & 3, where the connector housings 60 and associated connector heat sinks 61 are held in their horizontal extent and vertical alignment between support boards 67, by way of fasteners such as screws that extend through bosses 60a formed on the exterior of the connector housings 60. Such an arrangement can easily accommodate a face plate 70, or panel (see FIG. 3) that extends widthwise between two side supports 68 that cooperatively form a frame 66 of the assembly 50. The side supports 68 have rearwardly extending channels 72a, b that cooperatively define a plane in which a tray 75 extends, which, in combination with the connector housings, define a tray-like system with a general L-shaped configuration that is readily insertable into a host device housing.

The tray 75, as illustrated in FIG. 3, can be generally planar and has a predetermined thickness and can be formed of insulative or conductive materials, depending on the desire for shielding and other material properties. The tray 75 has a chip package-receiving opening 76 formed therein, which is shown in the Figures as located within the perimeter of the tray 75. The opening 76 is shown in the Figures as having a central portion 78 that may have four edges 80a-80d that define the opening 76.

The depicted connectors 57 of the connector housings 60 that form the array of connector ports 54, 56 are of the receptacle type having signal and ground terminals arranged in transmit and receive channel configurations to mate with opposing connectors having a plug connector style. Cables 62, which can be in a twin-ax configuration, are directly terminated at their distal ends 82 to the connector terminals of each connector 57 at first ends of the cables 62 and are seen in FIG. 3 to flank low speed wires 64 (which can be used for logic, clock, power and other desired uses). The cables 62 include a pair of signal conductors 119 in a desired spacing surrounded by a dielectric covering 121 and preferably include an associated drain wire 120 and can include an outer conductive covering that is enclosed in an insulative outer jacket 122. The cables 62 maintain the ordered geometry of the signal conductors throughout their lengths as they traverse from the chip package 88 to the entry and exit connectors 54, 56. Because this geometry remains ordered through their length, the cables 62 may easily be turned or bent or crossed in their paths without introducing problematic signal reflection or impedance discontinuities into the transmission lines.

Both the cables 62 and low speed wires 64 are terminated directly at their first ends to first terminals of the first connector 57. The first terminals are thus not required to be mated to the motherboard 53 and this helps avoid the impedance discontinuities which normally occur at a connector-circuit board mounting interface. The cables 62 are illustrated as arranged in vertical rows at the rear of the connector housings 60. The cables 62 are arranged in vertical rows as best shown in FIG. 2B, with the cables 62 and low speed wires 64 of the lower connector housing rows arranged inwardly of the topmost connector housing row. This promotes orderly arrangement of the cables 62 in their extent from the connectors 54, 56 to the tray 75. In the assembly 50 depicted the cables 62 associated with the top three rows of connectors 57 are seen to have a general S-shaped configuration extending downward to the level of the tray 75 and into the substrate at the front end thereof, while the cables in the bottommost row extend almost horizontally into the tray 75.

The cables 62 lead from the rear of the connectors to the front edge of the tray 75 where they enter the body of the tray 75. The proximal ends 84 of the cables 62 extend into the tray opening 76 as illustrated where they are mated to connectors 86 that will mate with the chip package 88. These connectors 86 are preferably of the wire-to-board style so that the signal conductors and ground of the cables 62 can be easily connected to contacts on the chip package substrate 91. The second ends of the cables 62 exit the tray 75 to enter the chip package-receiving opening 76. In one aspect of the present disclosure, the chip package 88 and associated chip 90 are disposed on the device motherboard 53, and the chip package 88 includes a plurality of contacts in the form of receptacle style connectors 86 that are preferably arranged around the perimeter thereof and aligned with the tray opening 76 to align with the connectors 86 at the cable proximal ends 84. In another aspect, the chip package/processor 88, 90 may be included as part of the overall routing assembly 74. In another aspect, as illustrated in FIGS. 2 & 2A, the area above the host device motherboard 53 is free to accommodate thermal transfer members 93, such as heat spreaders and/or heat sinks having perimeters larger than that of the processor 90 because the integration of the cables 62 into the tray 75 frees up most of the space above the tray 75 for other uses.

The cables 62 (and low power wires 64) may be positioned as part of the tray 75 in a variety of ways that suitably holds them in place from where they enter the routing assembly 74, such as along the leading edge 83 of the tray 75 to where they exit the tray 75 and enter the tray opening 76. The cables 62 can be accommodated in the tray 75 by enclosing them in a suitable dielectric material, such as a plastic. The body portions of the cables 62 can be completely surrounded by the dielectric material of tray 75 so that the two are integrally formed as a single part that can be inserted into the routing assembly 74 as a tray portion. One routing pattern of the cables 62 is illustrated in FIG. 5, which has the upper portion of the tray 75 removed for clarity to show the paths in which the cables 62 are laid.

The cables 62 are terminated at their second ends 84 to the aforementioned chip package connectors 86 either before or after the forming of the tray 75. Inasmuch as the first ends of the cables 62 are directly terminated to the terminals of the cable direct connectors 57, the second connectors 86 permit the cables 62 to be directly connected to the chip package 88, thereby completely bypassing the motherboard 53 as a routing support. In such an instance, the routing assembly 74 may be inserted into the host device housing and the motherboard 53 is placed in the housing of the device 51 over the tray 75, where it may be spaced apart from and above the motherboard by standoffs 92 or the like. FIGS. 3 & 3A illustrate the connectors 86 and their associated housings 87 and mating faces 89 facing upwardly in the opening 76 and into contact with the chip package 88. The connector housings 87 may take the form of chiclets which can house as little as a single pair of signal conductors. Accordingly, they can easily mate with receptacle connectors on the chip package substrate 91. The connectors 86 and their mating receptacle connectors may be made small in dimension so as to fit within the opening 76 and not project outside of the opening 76 an undesirable amount so as not to increase the size of the routing assembly 74.

FIGS. 4-4B illustrate a connector assembly 100 of the wire-to-board style that is suitable for use with an embodiment of the bypass routing assemblies. The connector assembly 100 is shown attached to the underside of a chip package substrate and it includes a cage 102 that engages a board 88 and encircles a board connector 104 and provides a receptacle for cable connector 105. The board connector 104 preferably has a receptacle configuration and being of the board-to-board style, has a low profile so that it and its cage 102 (along with the mating connector fit within the chip package opening. The cable connector 105 supports sets of cables 62 that terminate to sub-connector 129. The cable connector 105 includes a first housing 106 that has two halves, 106a, 106b that engage each other and partially enclose the sub-connector 129. The cage 102 includes a series of walls 161 that cooperatively define a hollow enclosure which receives the cable connector 105 therein. One of the connector housing halves 106a may include a tab 162 that is received within a retention slot 163. An overmolded portion 108 may be formed to provide a measure of strain relief for the cable connector 105.

Although the cable connector 105 can be used in an upside-down manner, as shown in FIGS. 3A, 4, 4A, 9 & 9A, where it connects to the underside of a board or substrate, it will be mostly illustrated in the opposite orientation in the Figures to follow. The orientation used will depend on system configuration but the operation and the structure of the cable connector 105 is not impacted by the orientation and the cable connector 105 may be used in any desired orientation.

FIGS. 5-8D illustrate features of the cable connector 105 without the first housing 106. As shown in FIG. 5, the cable connector 105 includes a plurality of cables 62, each of which contains a differential signal air that includes a pair of signal conductors 119 enclosed in a dielectric material 121 with an associated ground conductor 120, such as a drain wire, all of which are enclosed within an outer insulative jacket 122. The cables 62 are held in a carrier 110 and free ends 119a of the signal conductors 119 are terminated to corresponding terminals 132 of the sub-connector 129. The sub-connector 129 has a sub-housing 130 formed of an insulative material and a series of sidewalls 131 that form a plug portion that is received in the receptacle portion of the board connector 104. The depicted embodiments illustrate a way of connecting the cable conductor free ends to the terminals of the sub-connector 129 that reduces impedance discontinuities, noise and crosstalk and while help to keep the overall profile of the cable connector 105 low.

A carrier 110 is formed in an elongated fashion out of conductive material and has a general L-shaped configuration that is formed from a top flange 112 and a base flange 114. The base flange 114 defines a base of the carrier 110 that abuts the mating surface 171 of the sub-connector 129 when the cable connector 105 is assembled. The base flange 114 has a series of pairs of slots 116 formed in it that extend widthwise of the assembly 105 as illustrated. The slots 116 can be seen to be generally perpendicular to a centerline of the assembly 105 and which define mounting feet 117, 118 of the carrier. These mounting feet 117, 118 contact selected ground terminals 132b of the sub-connector 129.

The top flange 112 and the base flange 114 extend in two different directions, the top flange 112 extending alongside the ends of the cables and the base flange 114 extending beneath the cable ends. This extent provides two reference ground planes in two planes with respect to the ends of the cables. The carrier 110 can provided on two opposing sides of the cable connector 105.

The base flange 114 contacts the mating surface 170 of the sub-connector 129. This mating surface 170 extends lengthwise along the sub-connector 129 and includes a center base 171 that is flanked by two side slots 172 through which the terminals 132 extend in spaced-apart order along the length of the mating surface 170. As illustrated in FIGS. 7A & 7B, the base flange 114 includes slots 116. The slots 116 are located in the base flange 114 in alignment with the free ends 119a of the signal conductors 119 and they receive a least a portion of the free ends 119a therein. The slots 116 are arranged in pairs (one on each side of a mounting foot 117) as illustrated in FIG. 7B in order to accommodate the signal conductor free ends 119a of a differential signal transmission channel.

As noted above, the base flange 114 abuts the mounting surface 171 of the sub-connector 129 so that the slots 116 are aligned with signal terminals 132a of the sub-connector 129. The slots 116 extend along a length of the sub-connector 129 and have a width sufficient to prevent shorting contact from occurring between the base flange 114 and the signal conductors 119 and connector signal terminals 132a. As depicted, a ground terminal is positioned between the signal pair and two adjacent slots 116 are separated by the mounting foot 117, which provides a contact point for a ground terminal 132b of the sub-connector 129 and a second tail 142. Wider mounting feet 118 are shown located between two pairs of slots 116 and the mounting feet 118 can contact multiple adjacent ground terminals 132b in order to maintain a desired pinout and common the grounds. If two carriers 110 are aligned back to back, as illustrated, the carriers 110 may be aligned so that the cables 62 are offset (as shown).

The cables 62 are held in a spaced apart relationship by a spacer 124, which can be formed of an insulative material, and can be in the form of a lengthwise bar. The spacer 124 has a series of shoulder portions 126 also spaced apart in the lengthwise direction. These shoulder portions 126 are preferably aligned with the cables 62 as shown in FIGS. 6A & 6C. The shoulder portions 126 taper vertically inwardly toward the top flange 112 as illustrated in FIGS. 5C, 5D and 7C and define surfaces against which some of the ground collar tails may extend.

The spacer 124 further includes scallop-shaped recesses 128 that are located between the shoulder portions 126 and the ends of the spacer 124. The recesses 128 accommodate portions of the tails when they are bent inwardly as shown in FIGS. 5C & 5D. The spacers 124 are mounted to the carrier 110, preferably along the top flange 112 thereof in a fashion such that the ends of the cables 62 are disposed above the base flange 114. (FIG. 6C).) However, the free ends 119a of the signal conductors 119 extend downward and outwardly so that they align with and contact the signal terminals 132a of the sub-connector 129.

As can be appreciated from FIG. 5D, the terminals 132 have a termination portion 133 that extends outwardly and the termination portion 133 can be aligned with the free end 119a and can be aligned with mounting feet 117 or mounting feet 118 and tabs 140, 142 and 146. Thus, there can be two layers or three layers of conductive material aligned at the termination portion 133. One the features are aligned they can be connected together by welding. For example, a laser can be used to spot weld the two or three layers together.

In order to provide additional shielding to the cables 62 near the proximal ends 84 thereof, a ground collar 134 formed of a conductive material can be provided for each carrier 110. The depicted ground collars 134 have general U-shaped configurations with a lengthwise body 136 having two attachment flanges 137 at opposite ends of the body 136. The attachment flanges 137 attach to the top flange 112 near the ends of the cable connector 105. The ground collar body 136 and attachment flanges 137 cooperate with the top flange 112 to provide a conductive structure that can completely encircle the cable proximal ends as a group.

The ground collars 134 also have additional structure of importance. It can be seen that the ground collar 134 has a series of tails 138 and slots 139. The tails 138 extend downward to contact the base flange 114. They also, as illustrated in FIGS. 5C, 5D & 6D extend inwardly toward the centerline of the cable connector 105 and then outwardly in the widthwise direction. The tails 138 are of three distinct types. First tails 140 are thin and are illustrated as located near the ends of the cable connector 105. (FIG. 6D.) It can be seen that the bottom surfaces of these first tails 140 make contact or are positioned adjacent the upper surfaces of the base flange 114. The first tails 140 will not only contact opposing surfaces of the base flange 114, but they will also provide additional metal in the termination area which will increase the capacitance to thereby tailor the impedance in that area.

Second tails 142 are shown as wider than the first tails 140 (FIG. 6D) and have a tapered neck portion 143 that tapers down in its width along its downward extent. The tips of these second tails 142 also contact the base flange 114. The second tail 142 are align with each cable 62 so that the tails 142 may contact the base flange 114 at contact surfaces aligned between the cable signal conductor free ends 119a. The cable ground conductor free ends 120b pass through openings 144 disposed in the ground collar second tails 142 and are bent upwardly as illustrated in FIGS. 5D & 6D. In this manner, the ground conductor free ends 120b contact the ground collar 134 and extend vertically upwardly along the exterior surface of the ground collar 134. Lastly, third tails 146 are preferably provided and they can be seen in FIG. 6D to be wider than the first and second tails 140, 142. The third tails 146 are located on the ground collar in locations between the signal pairs of the cables 62, or in other words, aligned with the spaces which occur lengthwise between the cables 62.

The ends of the tails 138 may be considered as contact ends, and the ends of the third tails 146 are also wider than the tip portions of the first and second tails 140, 142 as illustrated in FIGS. 5C & 5D. They oppose and contact corresponding wide portions of the top flange 112. Those particular portions of the top flange are depicted as extending across three ground terminals 132b of the sub-connector 129 but could be limited as desired. The mounting feet 118 and the ground collar terminal tails are connected (the connection can be done with laser welding) at their contact areas to form double thickness ground connections. When the ground terminals 132b of the sub-connector 129 are considered, they form triple thickness ground connections and provide beneficial ground commoning while also allowing for modification of the capacitance, as is known in the art. The intervening mounting feet 117 of the base flange 114 are disposed in the flange slots 116 between the signal conductor free ends 119a so that they contact opposing corresponding ground terminals of the sub-connector 129. In this manner, a pinout for the board-to-board connector of the chip package substrate as shown in FIG. 5D of (reading from right to left) G-S-G-S-G-S-G-S-G-G-G-S-G-S-G-S-G-S-G-G for the twenty terminals on one side of the board connector. The same pattern can be maintained on the other side of the connector except the pattern can be offset if desired. It should be noted that while four pairs of signal terminals are shown in FIG. 6D, additional signal terminals can be readily added by increasing the number of cables connected in a row (and lengthening the components that form the cable connector 105).

FIGS. 8B-8D illustrate a wire comb 148 that can be formed of insulative material and that extends lengthwise along the carrier 110. The wire comb 148 has a body portion 149 with multiple legs 150 that extend from it in a widthwise direction and the legs have slots 151 that accommodate the signal conductor free ends 119a. The body portion 149 also has recesses on its top through which a portion of the ground conductor free ends 120a extend so that when the wire comb 148 is positioned no contact is made between the two elements that would compromise the integrity of the cable connector 105.

FIGS. 9 and 9A illustrate another embodiment of a cable connector 180 of the present disclosure in which the cables 62 exit the assembly at a right angle compared to a mating direction. The present disclosure utilizes structure to match the cable mating aspect of the assembly to the low profile of the board-to-board connectors to maintain an overall reduced size of the assembly so that it may fit in the opening 76 of the tray 75 and not increase the size of the tray assembly. Heights of about 7-8 mm (about 0.28 inches) are contemplated with footprints of about 6 by 14 mm and it is expected that chip packages and/or their circuit board could accommodate such a footprint.

The disclosure provided herein describes features in terms of preferred and exemplary embodiments thereof. Numerous other embodiments, modifications and variations within the scope and spirit of the appended claims will occur to persons of ordinary skill in the art from a review of this disclosure.

CABLE CONNECTOR ASSEMBLY

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