The present application claims priority from Japanese application JP 2008-269366 filed on Oct. 20, 2008, the content of which is hereby incorporated by reference into this application.
The present invention relates generally to storage device virtualization architectures, and more particularly to a cache configuration management system, management server and cache configuration management method capable of lessening the workload in estimation of a cache capacity within a virtualization apparatus while reducing complexities in cache assignment processes.
Advances in large-scaling of storage area network (SAN) environment result in increases in costs for operation and management of storage devices, which are of various model types and vendors. Consequently, for effective use of storage resources and reduction of system management costs, a virtualization technique is becoming widespread, which maps storage regions of a plurality of storage devices to inside of a virtualization apparatus to thereby consolidate the operation and management.
However, a virtualized storage system is such that data must pass through the virtualization apparatus whenever access is given from a server, resulting in a decrease in performance in some cases. JP-A-2007-179156 discloses therein an access performance enhancement method adaptable for use in a virtualization apparatus-introduced storage system, which method includes the steps of measuring a response time with respect to each external subsystem from a virtualization apparatus and then assigning an increased amount of cache to an external subsystem with a long response time to thereby improve the access performance.
The storage system as taught from JP-A-2007-179156 suffers from problems which follow: it does not obtain any predictive value of the response time after completion of cache assignment; and, it fails to take into consideration a response time which is one of target performance values (referred to as “target response time” hereinafter) to be required by an application program for storage.
This invention is the one that solves the above-noted problems, and its object is to provide a cache configuration management system, management server and cache configuration management method capable of lightening workloads of estimation of cache capacity within a virtualization apparatus and cache assignment while giving consideration to a target performance value or values.
To attain the foregoing object, a storage system is provided which has application servers (for example, application servers 101), storage devices (e.g., storages 106), a virtualization apparatus (e.g., virtualization apparatus 105) for enabling discriminative recognition of the storage devices as virtualized storages, and a management server (e.g., storage management server 107), wherein the management server predicts a response time of the virtualization apparatus with respect to any one of the application servers from cache configurations and access performances of the virtualization apparatus and storage device and then evaluates the presence or absence of the assignment to a virtual volume (e.g., virtual volume 125) of internal cache (e.g., internal cache 123) and a predictive performance value based on a to-be-assigned cache capacity to thereby perform judgment of the cache capacity within the virtualization apparatus which satisfies a target performance value and estimation of an optimal cache capacity, thus preparing an internal cache configuration change plan while letting it be modifiable by users if necessary.
According to this invention, it is possible to lighten the workload of the estimation of cache capacity in the virtualization apparatus and the cache assignment while taking account of the target performance value.
Other objects, features and advantages of the invention will become apparent from the following descriptions of the embodiments of the invention taken in conjunction with the accompanying drawings.
Currently preferred embodiments of this invention will be described in detail with reference to the accompanying drawings below. In a first embodiment, in cases where a logical volume within a storage device that is externally connected to a virtualization apparatus is taken into the virtualization apparatus side for use as a virtual volume, the capacity of a cache within the virtualization apparatus to be assigned to the virtual volume by an operations management software program is changed to a suitable capacity which ensures a target response time to be satisfied. A method for doing this will be explained in detail below.
The storage device 106 has a controller 122, external cache 124, logical volume 126, SAN interface 118 and local area network (LAN) interface 119. The controller 122 is a control unit which performs input/output control of data to be sent to and received from the external cache 124 and logical volume 126. It also measures a cache hit rate of the external cache 124 (referred to as “external cache hit rate” hereinafter). Information measured is transmitted to a storage management server 107 (management server) by way of a LAN 112 (second network).
Virtualization apparatus
The virtualization apparatus 105 has a SAN interface 115 and SAN interface 117. The virtualization apparatus 105 is connected by the SAN interface 115 to SAN 103 and also linked to the SAN 104 via SAN interface 117. Virtualization apparatus 105 also has a LAN interface 116 and is linked to the LAN 112 by this LAN interface 116.
The virtualization apparatus 105 performs virtualization in a predetermined way and is thus able to provide any one of the application servers 101 with a volume of storage device 106 as its own volume. The virtualization apparatus 105 may have therein a logical volume or, alternatively, may have no such volume.
A virtual volume 125 which is indicated by dotted line within the virtualization apparatus 105 is the one that shows a state in which the logical volume 126 within storage device 106 is taken into the virtualization apparatus 105 side. More specifically, in this embodiment, it is possible to provide the application server 101 with storage resources of the logical volume 126 while letting the logical volume 126 that externally exists when looking at from the virtualization apparatus 105 be the virtual volume 125 within the virtualization apparatus 105.
A controller 121 is a control unit which performs input/output control of data with respect to the internal cache 123 and virtual volume 125. In addition, it measures a cache hit rate of the internal cache 123 (referred to as “internal cache hit rate” hereinafter). The information measured is sent to the storage management server 107 via LAN 112.
The internal cache 123 and external cache 124 are such that a certain amount of capacity is assignable per virtual volume 125 and per logical volume 126, respectively. In this embodiment the cache assigning unit is set to a volume, although the assignment may alternatively be performed per storage device 106. Further, the cache assignment may also be done per group of redundant array of independent disks (RAID), wherein the RAID group is also called the “parity group” or “array group” in some cases.
The reference numerals 123A to 123D within the internal cache 123 and numerals 124A to 124D in the storage device 106 are each used to indicate a cache capacity which is assigned to a volume. For example, a cache capacity which is assigned to a virtual volume 125 with its volume ID being set to “Storage001—0:01” is 100 megabytes (MB) as indicated by the numeral 123A. A capacity of the external cache 124 which is assigned to a logical volume 126 with its volume ID being “0:08” within the storage device 106 with its storage device ID of “Storage007” is 100 MB as indicated by the numeral 124C.
Turning back to
The storage management server 107 is equipped with a central processing unit (CPU) 108, memory 109, display unit 110, input unit 111 and LAN interface 120, and is linked to the LAN 112 by LAN interface 120. The storage management server 107 receives via LAN 112 those information items that are gathered by the agent 127 and controllers 121-122. The CPU 108 performs various kinds of processing operations by reading and executing an operations management program 201 which is stored in the memory 109 as shown in
The operations management program 201 is generally made up of a cache configuration information collecting program 1001, access performance information collecting program 1002, policy definition information setup program 1003, internal cache configuration change plan preparing program 1004 (see
The operations management DB 202 is constituted from a cache configuration table 1005 (see
The cache configuration information collecting program 1001 collects information concerning an external cache capacity that is assigned to a logical volume 126 and an internal cache capacity that is assigned to a virtual volume 125 corresponding to the logical volume 126 and stores the collected information in the cache configuration information table 1005.
Further, this program adds an application program ID which enables the application program 102 to be uniquely identified based on the information of application program 102 as has been sent from the agent 127 of each application server 101. This application program ID is also stored in the cache configuration table 1005. Regarding the information as to assignment of an internal cache capacity, it collects information to be sent from the controller 121 within the virtualization apparatus 105. As for the information about assignment of an external cache capacity, it collects information to be sent from the controller 122 in storage device 106.
Generally, the application program 102 and the virtual volume 125 are correlatable together in a one-to-one correspondence manner by using information of three layers as will be next described. The three layers are a layer of from the application program 102 to a file system, a layer of from this file system to a logical unit number (LUN), and a layer of from the LUN to virtual volume 125.
Firstly, in the layer of from the application program 102 to the file system, the one-to-one correspondence relationship of the application program 102 and the file system is collected by the user's manual data input or by the agent 127's disk I/O monitoring or by use of an exclusive-use agent 127 capable of recognizing the configuration information of the application program 102. Next, in the layer of from the file system to LUN, the agent 127 establishes such correspondence relation by using the configuration information of an operating system (OS).
Lastly, in the layer of from the LUN to virtual volume 125, the corresponding correlation is performed based on the information as collected from the controller 121 of the virtualization apparatus 105. Based on the information items which were gathered from these three layers, the cache configuration information collecting program 1001 manages the correspondence relationship between the application program 102 and the virtual volume 125.
The access performance information collecting program 1002 collects an internal cache hit rate of each virtual volume 125 from the controller 121 and also collects an external cache hit rate thereof from the controller 122. In addition, this program obtains by means of the controller 121 an average I/O size of data at the time that the application server 101 issues a write-in or read-out command to the virtualization apparatus 105 along with a variance of the access frequency of unit-size data of such the data, and then stores them in the access performance table 1006. It should be noted that the variance of the access frequency may be obtained by the agent 127 or, alternatively, may be obtained by the access performance information collecting program 1002 based on the information collected from the controller 121 or the agent 127.
Regarding the response time at the time of cache hitting to the internal cache 123 (referred to as “internal cache response time” hereinafter) and the response time upon cache hitting to an external cache 124 (called the “external cache response time) and the response time upon accessing to logical volume 126 (say “external disk response time”), the access performance information collecting program 1002 prestores therein the performance value on a per-storage device basis; so, this value is used. Details of it will be described later.
The policy definition information setup program 1003 permits the user to input both an aimed or “target” response time (target performance value) to be obtained by the application program 102 on application server 101 and an importance degree of the application program 102 and also a permissible performance degradation degree in an event of transferring to a virtualized environment from non-virtual or “real” environment. These input values are then stored by the policy definition information setup program 1003 in the policy definition table 1007. Details of this table will be described later.
The internal cache configuration change plan preparing program 1004 prepares a configuration change plan of the internal cache 123 of the virtualization apparatus 105 based on the target response time (target performance value) and importance degree of the application program 102 on application server 101 and the internal cache configuration of the virtualization apparatus 105 and also the external cache configuration of storage device 106. The internal cache configuration as used herein refers to an amount of the cache capacity which is assigned to each virtual volume 125. Similarly, the external cache configuration means an amount of the cache capacity assigned to each logical volume 126. Details will be stated later with reference to
The internal cache configuration change executing program 1013 issues a cache configuration change request to the controller 121 of virtualization apparatus 105 based on the internal cache configuration plan that was prepared by the internal cache configuration change plan preparing program 1004 and then changes or “updates” a present configuration of the internal cache 123 of virtualization apparatus 105.
Although in this embodiment its description is given under an assumption that a cache is assigned to any one of the internal cache 123 of the virtualization apparatus 105 and the external cache 124 of storage device 106 with any one of the virtual volume 125 and the logical volume 126 being as a unit, it will also happen from time to time that such per-volume cache assignment is inexecutable due to limits of hardware, resulting in the assignment being done merely in units of array groups or in units of devices (virtualization apparatus 105 or storage device 106). Alternatively, for improvement of the cache use efficiency, there are cases where it is better to perform the cache assignment with a size-enlarged portion being as a unit, which portion is greater than the volume.
By taking these matters into consideration, the cache configuration change processing may be performed in a way which has the steps of organizing into a group those volumes which are included in the array group or the device or apparatus, obtaining a total value of cache capacities corresponding to respective volumes included in the group, and handing this total value as the cache capacity of the array group or the device.
The internal cache configuration change schedule preparing program 1014 predicts, based on a change in I/O characteristics of access from an application program 102, how the internal cache configuration is modified at which time point in order to enable the application program 102 to satisfy the target response time and then prepares a schedule. Details will be described with reference to
These contents of the cache configuration table 1005 are updated from the internal cache configuration change executing program 1013 whenever the internal cache configuration change executing program 1013 issues an internal cache configuration change request to the controller 121 of virtualization apparatus 105 and then the internal cache configuration was actually modified.
The internal cache hit rate 1006C is collected from the controller 121 whereas the external cache hit rate 1006E is gathered from the controller 122. Regarding the internal cache response time 1006D and external cache response time 1006F, the access performance information collecting program 1002 holds in advance the information relative to the virtualization apparatus 105 and storage devices 106 of a plurality of vendors and multiple model types; so, such values are used.
The average I/O size 1006H is obtained in a way which follows: within a certain measurement time period (e.g., one hour or else), the controller 121 and agent 127 monitor input/output data during access from application program 102; then, a total value of I/O sizes is subtracted by an access number. The variance 1006I of the access frequency is obtained in a similar way to the average I/O size 1006H—that is, an access frequency variance is obtained with respect to each unit-size data based on an access number which was counted up per unit-size data of input/output data during access from application program 102 within a given measurement time period.
It is noted here that although this embodiment is arranged so that the target response time, importance degree and permissible performance decrease degree are settable individually, it is modifiable to employ a policy definition information setup program which functions to determine the permissible performance decrease degree d503 based on the importance degree d502 or, alternatively, determine the target response time d501 based on the importance degree d502.
The graph at upper part of
In this equation, an increase in cache capacity results in a likewise increase in cache hit rate. In case there is a deviation or “bias” in data to be accessed within a volume (equivalent to a broken line (A)), in other words, in case the access frequency's variance is large, an increase in cache capacity does not lead to appreciable improvement of the cache hit rate in view of the fact that the cache hit rate is kept high even when the cache capacity is small. Thus it can be said that while the cache hit rate is large in increase when the cache capacity is less, the cache hit rate's increase becomes smaller when the cache capacity becomes larger.
On the other hand, in case there is no bias in the data to be accessed within the volume so that access is given evenly, i.e., when the access frequency's variance is small (equivalent to a broken line (B)), an increase of the cache capacity leads to improvement of the cache hit rate commensurate therewith although the cache hit rate is not so high when the cache capacity is small. Thus it can be said that while the increase of the cache hit rate is less when the cache capacity is small, its increase does not appreciably vary even in case the cache capacity becomes larger whereas it does not become so small when compared to the case of the variance being large. Note here that although the parameter c is dealt as the cache capacity to be assigned, similar results are obtainable by using a ratio of the cache capacity to volume capacity as the parameter in place of the cache capacity.
As has been stated in the explanation of
The cache hit rate table 1008 is the one that was obtained by modelization of the relationship of the cache capacity and cache hit rate based on the above-stated I/O characteristics (i.e., average I/O size and access frequency variance), and includes fields of a cache hit rate model name 1008A for unique identification of a model, an average I/O size 1008B, an access frequency variance 1008C, and a cache capacity model equation 1008D which numerically convert or “mathematizes” the cache capacity and cache hit rate. The cache hit rate table 1008 is the one that is prepared at a time point that the operations management program 201 is installed in the storage management server 107, although no serious problems occur in this embodiment even when the user uses measurement values during operations to tune up the correlation model or to make a new model.
The internal cache configuration change plan storage table 1009 includes as fields a storage device ID 1009A, volume ID 1009B, internal cache capacity 1009C, internal cache hit rate 1009D, internal cache response time 1009E, external cache hit rate 1009F, external cache response time 1009G, external disk response time 1009H, and predictive response time 1009I which takes into consideration respective response time values in those events of internal cache hitting, external cache hit and external disk access.
The internal cache capacity 1009C is an estimated value of the internal cache capacity which is necessary in order to satisfy the performance that is expected by the policy definition information of application program 102. In case the internal cache capacity 1009C is zero megabyte (OMB), it indicates that the expected performance is satisfied without having to assign any internal cache. In this embodiment, a negative value such as “−1 MB” as an example is set for the internal cache capacity 1009C in order to represent that the expected performance is not satisfiable in any way even when assigning a sufficiently large amount of internal cache capacity, although similar results are also obtainable by adding another field to provide such representation. Details will be described later.
In this display screen example, there are shown an internal cache capacity d603 which is allocated to the storage device ID (d601) to be accessed by an application program 102 with an application program ID (d600) being allocated thereto and the virtual volume 125 corresponding to logical volume 126 having a volume ID (d602), a predictive response time d604 of the volume upon allocation of such internal cache capacity, and a target response time of the application program 102. On this display screen, the user is allowed to change the internal cache capacity d603. When the user performs such value change, the predictive response time d604 will be automatically recalculated and displayed in a way as will be described later.
For example, in case the internal cache capacity is 80 MB (d606) and the predictive response time d604 is 5.9 ms (d607), when the internal cache capacity is changed to 120 MB (d608), a predictive response time d604 for this changed internal cache capacity 123 is recalculated, resulting in an indication of “5.5 ms” (d609) being displayed. A method of the recalculation will be described later at a step S2104 (see
Note that in case the internal cache capacity 1009C of the internal cache configuration change plan storage table 1009 is a negative value, the internal cache capacity d603 is displayed like a blank cell, which indicates that it was unable to estimate any optimal internal cache capacity value that satisfies the target response time. Additionally, by clicking on an “OK” button d610 in this display screen, the internal cache configuration change executing program 1013 is called up, which issues an internal cache configuration change request to the controller 121 of the virtualization apparatus 105 in accordance with the configuration change plan that is stored in the internal cache configuration change plan storage table 1009, followed by modification of the internal cache configuration.
Based on this I/O characteristics history table 1011, search or “exploration” is performed to determine whether there is regularity in changes of I/O characteristics of each volume. If the regularity is found, the internal cache configuration is changed at a time point immediately before the time of a regularly occurring change, e.g., a specific date, a day of the week, a time slot or else, wherein a cache capacity which is best fit to the periodically varying I/O characteristics has been obtained in advance. In
More specifically, the I/O characteristics with the average I/O size 1011D and access frequency variance 1011E having been set at “400 kB” and “25” respectively within a measurement time period of “17:00-18:00, Friday, July 25” is such that the average I/O size 1011D and access frequency variance 1011E are changed to “8 KB” and “305” respectively within a time period of “18:00-19:00, Friday, July 25”—further, the average I/O size 1011D and access frequency variance 1011E are returned to “400 KB” and “25” respectively within a following time period of “19:00-20:00, Friday, July 25.”
Rows 1012L and 1012M of
Next, an explanation will be given of main processing. The processing of the cache configuration management system of storage device in this embodiment is dividable into internal cache configuration change plan preparation processing (see
At step S2001 of
Subsequently at step S2003, the CPU 108 judges whether the internal cache capacity that was estimated at step S2001 is less than the internal cache capacity that is actually built in the virtualization apparatus 105. If so, then perform distribution processing (see
Lastly, at step S2004, the CPU 108 performs visual displaying of the resulting internal cache configuration. By means of the verify screen shown in
First, at step S2101, the internal cache capacity that is assigned to the aimed or “target” virtual volume 125 is initialized to zero (0). At its subsequent step S2102, it is verified whether the internal cache capacity assigned to target virtual volume 125 is less than or equal to an upper limit value per volume (whether the former exceeds the latter). The upper limit value here may be set to a fixed ratio with respect to a total capacity amount of the internal cache 123 which is built in the virtualization apparatus 105 or, alternatively, may be set at a fixed ratio of the volume capacity of this virtual volume 125. Here, when it is not less than the per-volume upper limit value (i.e., if “No” at step S2102), it is determined that the target performance cannot be satisfied even when assigning a sufficient amount of internal cache capacity. Then, the procedure proceeds to step S2103, which sets the to-be-assigned internal cache capacity to a negative value (e.g., −1 MB); then, go to step S2107.
Next, when the to-be-assigned internal cache capacity is less than or equal to the per-volume upper limit value at step S2102 (i.e., if “Yes” at step S2102), the procedure goes to step S2104, which performs performance prediction based on a performance model. From the access performance table 1006 (see
Δ=a(μmodel−μIO)2+b(δ2model−δ2freq)2 (A1)
From the model equation 1008D of the cache capacity that was judged to have the maximum similarity in the way stated above, there are obtained an internal cache hit rate ri corresponding to the internal cache capacity and an external cache hit rate re corresponding to an external cache capacity in the case of the internal cache capacity being assumed to be zero. A predictive response time for use as the performance prediction value at this time is obtainable using the values of the cache configuration table 1005 (see
In case the internal cache capacity is smaller than the external cache capacity 1005D, the predictive response time is given by Equation (A2) by taking into consideration the case of hitting to an external cache:
ri×ti
1006D+((re−ri)×re1006E)+((1−re)×de1006G) (A2)
where ri is the internal cache hit rate, re is the external cache hit rate, ti1006D is an internal cache response time indicated by the set value 1006D in access performance table 1006, re1006E is an external cache hit rate indicated by the value 1006E in table 1006, and de1006G is an external disk response time indicated by 1006G.
When the internal cache capacity is larger than the external cache capacity 1005D, it is very likely that there are no cases where the external cache hitting takes place. Thus, the predictive response time is given by Equation (A3) below:
ri×ti
1006D+((1−ri)×de1006G) (A3)
At step S2105, a determination is made as to whether the predicted performance satisfies the target value. Concretely, the predictive response time that is the predicted performance as obtained at step S2104 is compared to the target response time 1007B of the policy definition table 1007, which is the target performance. At this time, the application program ID 1005F is obtained by referring to the cache configuration table 1005 (see
In case the predicted performance fails to satisfy the target performance (i.e., if No at step S2105), the routine proceeds to step S2106 which adds an internal cache capacity. Then, return to step S2102, which tries to perform the performance prediction again.
In case the predicted performance is able to satisfy the target performance (i.e., if Yes at step S2105), the routine goes to step S2107, which finally determines the internal cache capacity to be assigned to the target volume. This final decision result is stored in the internal cache configuration change plan storage table 1009 (see
Finally at step S2108, it is verified whether the internal cache capacity estimation has been completed with respect to every volume involved (whether the processing was performed or not). In case such is not completed yet (i.e., if No at step S2108), return to the step S2101. In case the processing has been completed (if Yes at step S2108), the internal cache capacity estimation processing is ended.
Firstly, at step S2201, reference is made to the internal cache capacity 1009C in every row of the internal cache configuration change plan storage table 1009 (see
In case the total value that was obtained at the step S2201 is larger than the total capacity of the internal cache 123 that is built in the virtualization apparatus 105 (i.e., if No at step S2202), the procedure goes to step S2203, which prevents internal cache assignment with respect to those volumes with lower importance degrees among the assignment-aimed volumes to thereby reduce the amount of the internal cache capacity to be assigned.
Practically, the internal cache configuration change plan storage table 1009 (see
First, at step S2301, an attempt is made to check whether there is a capacity with no schedule for assignment in the internal cache 123 that is built in the virtualization apparatus 105. Practically, by referring to the internal cache capacity 1009C in every row of the internal cache configuration change plan storage table 1009 (see
When a remainder is found (if Yes at step S2301), go to step S2302 which calculates the importance degree in case internal cache capacity addition is done with respect to all the volumes involved. A size to be added at this time may be either a fixed value of the system or a value which was obtained by equally dividing a remaining amount of the internal cache by the fixed value of the system. A predictive response time in the case of an internal cache being added is computed by a method which is similar to that stated in the step S2104. The improvement degree of each volume is calculated by (pr1−pr2)/pr1, where pr1 is the predictive response time prior to the addition, and pr2 is the predictive response time after the addition.
Subsequently, at step S2303, a decision is made to add the internal cache capacity to a volume which is the largest in improvement degree calculated at step S2302. Then, this result is reflected in the internal cache configuration change plan storage table 1009 (see
Note that another embodiment of the surplus internal cache adding distribution processing is conceivable, which is not the additional distribution based on the improvement degree in the case of internal cache addition but additional distribution pursuant to the importance degree 1007C of an application program 102. One example of it may be an importance degree-based proportional distribution method, wherein a cache capacity Ci which is to be additionally distributed to a certain volume is obtainable, for example, by Equation (A4) below:
C
i
=X
i
/Σx*C
rst (A4)
where Crst is the surplus cache capacity, and Xi is the importance degree 1007C of an application program 102 in access to a volume.
At step S2401 in
At step S2403, a predictive response time of the target volume is obtained based on the I/O characteristics, followed by calculation of an internal cache capacity which becomes necessary within the time period or “slot.” This internal cache capacity calculation is substantially the same as a process of from the step S2101 to step S2106 shown in
At step S2405, a decision is made as to whether there is/are one or more volumes with regularity in I/O characteristics. In case there is no single volume which was determined to have regularity in the processing of step S2401 (if No at step S2405), this processing is ended. In case there is at least one volume with the regularity (if Yes at step S2405), go to step S2406.
At step S2406, the time point that was obtained per group at step S2402 and the internal cache capacity that was obtained at step S2406 are stored in the internal cache configuration change schedule table 1012 (see
Note that while this flowchart is shown under an assumption that the cache capacity that becomes necessary in the internal cache configuration changing process is sufficiently retained in advance, per-volume internal cache assignment OK/NG judgment may alternatively be performed by taking into consideration the entire capacity amount of the internal cache 123 that is built in the virtualization apparatus 105 as has been indicated in the internal cache assignment OK/NG judgment processing of
In the first embodiment, the internal cache capacity within virtualization apparatus which is assigned to a virtual volume in the case of letting the logical volume in an externally connected storage device be taken into the virtualization apparatus side for use as the virtual volume has been described. In a second embodiment, an explanation will be given of internal cache capacity estimation to be performed when newly introducing a virtualization apparatus into an environment with no virtualization apparatus being present therein. Note here that explanations of processings similar to those of the first embodiment will be eliminated, and its different points from the first embodiment will mainly be stated below.
Note that in this embodiment, no values are stored in those fields of the internal cache capacity 1005C of cache configuration table 1005 (see
a volume response time 5002 =(cache hit response time 5001)*(IOPS at cache hit)/(IOPS at cache hit+IOPS at cache mishit)+(cache mishit response time 5003)*(IOPS at cache mishit)/(IOPS at cache hit+IOPS at cache mishit),
where “IOPS” is input output per second.
Suppose that in the non-virtualized environment, the cache hit response time, cache mishit response time and volume response time are as indicated by 5001A, 5003A and 5002A, respectively, as shown in
Due to this access, a cache hit response time 5001B, cache mishit response time 5003B and volume response time 5002B are each delayed by the sum of a time taken to pass through the virtualization apparatus 105 and a time to pass through SAN 104, when compared to the cache hit response time 5001A, cache mishit response time 5003A and volume response time 5002A in the non-virtual environment, respectively.
On the other hand, consider a case where the internal cache assignment is performed in a transition of from the non-virtual environment to virtual environment. Assume here that an internal cache capacity to be assigned is the same as an external cache capacity which is presently assigned in the non-virtual environment and that the cache hit rate is kept unchanged. Also suppose that in cases where the internal cache and external cache are the same in capacity as each other, the data that exists on the external cache is also present on the internal cache so that there are no effects owing to the use of such external cache—therefore, this state is deemed to become substantially the same as a state with the external cache being removed away.
When comparing together the caches of storage device and the virtualization apparatus, the cache within virtualization apparatus 105 is higher in performance than the external cache 124 of storage device 106 in many cases. Consequently, when supposing that internal cache assignment is done in the transition of from the non-virtual to virtual environment, a cache hit response time 5001C in the case of an internal cache being assigned in the virtual environment becomes faster than the cache hit response time 5001A in the non-virtual environment.
A cache mishit response time 5003C in the case of the internal cache being assigned in the virtualized environment is the same as the cache mishit response time 5003B in the case of no internal cache being assigned in the virtual environment. Regarding the volume response time, it becomes faster (5002Ca) when compared to the case (5002B) of no internal cache being assigned in the virtual environment. In some cases, it becomes faster (5002Cb) than the volume response time 5002A in the non-virtual environment—this occurs depending on the quantity of input output per second (IOPS) at the time of cache hitting (5001C).
When considering it from a viewpoint of an application program 102 as another perspective, it is also thinkable that the response time of data existing on a cache to be accessed at frequent intervals is important. Thus, conceivable evaluation methodology includes a method for evaluation by using only the cache hit response time 5001 as the object to be evaluated, in addition to an evaluation method based on the volume response time 5002. Although an explanation below is directed to the evaluation method using the volume response time 5002, it is also possible to use an evaluation method using the cache hit response time 5001 only. In such case, the target response time is interpreted to be a target response time in a cache hit event.
The processing starts with step S3001, which acquires the length of a time T_vrt as taken to pass through the virtualization apparatus 105 (referred to as “virtualization apparatus pass-though time” hereinafter) and a time T_net taken to pass through the SAN 104 (referred to hereafter as “SAN pass-though time”) which exists in a route of from virtualization apparatus 105 to storage device 106 in an event that application server 101 provides access to storage device 106 through virtualization apparatus 105. Note that in a strict sense, the virtualization apparatus pass-through time T_vrt is needed to be dealt differently in a case-sensitive way with a present situation being considered appropriately.
More specifically, in a case where an internal cache 123 has already been assigned when the application server 101 reads data, typical examples of the virtualization apparatus pass-through time are a time taken for a process having the steps of letting a request from application server 101 enter to virtualization apparatus 105, conducting a search for the internal cache and, upon failure to get any cache hit, letting the request exit virtualization apparatus 105 to approach storage device 106, and a time taken for a process having the steps of letting the data as read out of storage device 106 enter virtualization apparatus 105, writing the data into a presently assigned internal cache 123, letting it output from virtualization apparatus 105, and return to the server. Furthermore, in cases where the internal cache 123 is not assigned yet, examples of the virtualization apparatus pass-through time are a time taken to leave virtualization apparatus 105 for storage device 106 without execution of on-cache data search, and a time taken to return to application server 101 without execution of writing data into internal cache 123.
In this embodiment, its objective is to perform approximate calculation for the cache capacity estimation; so, any detailed case-by-case consideration is not carried out, and computation is performed under an assumption that the virtualization apparatus pass-through time has a single value in any events. Regarding the acquisition of the virtualization apparatus pass-through time T_vrt, this embodiment is arranged so that the built-in cache capacity estimation program 1101 prestores therein several specification values that are indicated on a product model catalog(s), although it may be modified so that the user makes changes at any time after installation of the operations management program 201. As for measurement of the SAN pass-though time T_net, a time taken to pass through SAN 103 in the non-virtualized environment is used in substitution therefor. One example of the measurement method has the steps of transmitting a signal which immediately returns a response to the controller 122 of storage device 106 from SAN interface 114, measuring the length of a time consumed to wait for return of a reply, and letting the half of such measured time be the SAN pass-though time T_net. In case two or more storage devices 106 are present, it is also permissible to perform measurement with respect to some of them and then use an average value thereof. Additionally, for the SAN pass-through time T_net also, it is possible to accept a value as input by the user.
At step S3002, necessary information is acquired from the cache configuration table 1005, access performance table 1006 and policy definition table 1007. Examples of the information to be obtained here are as follows: a storage device ID 1005A ID_str, volume ID 1005B ID_vol, external cache capacity 1005D C_ext and application program ID 1005F ID_ap, which are fetched from the cache configuration table 1005; an external cache hit rate 1006E R_ext, external cache response time 1006F T_ext, external disk response time 1006G T_dsk, average I/O size 1006H μIO and access frequency variance 10061 δ2freq, which are gained from the access performance table 1006; a target response time 1007B T_tgt and permissible performance decrease degree 1007D D_prmt which are from the policy definition table 1007. Additionally, for an internal cache response time T_int, a specification value of catalog of the virtualization apparatus 105 is used.
At step S3003, upon introduction of the virtualization apparatus 105, internal cache assignment judgment processing (see
In step S3004, a decision is made as to whether the processing has been performed for every volume involved. In case the processing is not yet performed for every volume (i.e., if No at step S3004), return to the step S3003. Then, the process will be repeated until the processing is performed for all the logical volumes 126 that are being utilized from all application programs 102. In case the processing for every logical volume is completed (if Yes at step S3004), go to step S3005, which obtains through computation a total value of the amounts of internal cache capacity 1009C and then presents it to the user. Details of such presentation method will be described later with reference to
At step S3101, an internal cache capacity C_int and internal cache hit rate R_int are determined (set up) based on the external cache capacity C_ext and external cache hit rate R_ext, respectively. The internal cache capacity C_int to be assigned is made equal to the external cache capacity C_ext. Assuming that the internal cache hit rate R_int at this time is the same as the external cache hit rate R_ext, the external cache hit rate R_ext is used as the internal cache hit rate R_int.
At step S3102, a predictive response time T_vol_wc at the time of internal cache assignment and a predictive response time T_vol_cl at the time of no cache assignment are obtained (calculated). These response time values are mathematically determinable by taking into consideration the virtualization apparatus pass-through time T_vrt and SAN pass-through time T_net, using Equations (A5) and (A6) below:
T_vol—wc=R_int*T_int+(1−R_int)*{T_dsk+(T_vrt+T_net)*2} (A5)
T_vol—cl=R_ext*{T_ext+(T_vrt+T_net)*2}+(1−R_ext)*{T_dsk+(T_vrt+T_net)*2} (A6)
It is noted here that the virtualization apparatus pass-through time T_vrt and SAN pass-through time T_net are each multiplied by 2 because a signal must pass through the virtualization apparatus 105 and SAN 104 twice in outbound and inbound routes when access is given from the application server 106.
At step S3103, a decision is made as to whether the predictive response time T_vol_cl in the case of the internal cache 123 being not assigned satisfies the target response time T_tgt or, alternatively, whether resultant performance decrement is within the range of the permissible performance decrease degree D_prmt relative to the volume response time in the non-virtual environment. In case it satisfies or is in range (i.e., if Yes at step S3103), it is assumed that the target performance is satisfiable without having to perform such internal cache assignment; then, go to step S3104.
At step S3104, the to-be-assigned internal cache capacity is set to “OMB,” and the internal cache hit rate is set at “0%”; then, store in the internal cache configuration change plan storage table 1009 the storage device ID ID_str, volume ID ID_vol, internal cache hit rate R_int, internal cache response time T_int, external cache hit rate R_ext, external cache response time T_ext, external disk response time T_dsk, average I/O size μIO and access frequency variance δ2freq, followed by termination of the processing.
At step S3103, in case the predictive response time T_vol_cl in the internal cache assignment event fails to satisfy the target response time T_tgt or, alternatively, the resulting performance decrement is out of the range of permissible performance decrease degree D_prmt (i.e., if No at step S3103), the procedure goes to step S3105.
At step S3105, the predictive response time T_vol_wc upon assignment of the internal cache is compared to the target response time T_tgt to thereby determine whether the internal cache assignment results in the predictive response time satisfying the target response time T_tgt or, alternatively, whether the resultant performance degradation is within the range of the permissible performance decrease degree D_prmt with respect to the volume response time in the non-virtual environment. In case the internal cache assignment results in the predictive response time satisfying the target response time T_tgt or in case it is within the range of the permissible performance decrease degree D_prmt with respect to the volume response time in the non-virtual environment (i.e., if Yes at step S3105), the internal cache is decided to be assigned; then, data values of the storage device ID ID_str, volume ID ID_vol, internal cache hit rate R_int, external cache hit rate R_ext, external cache response time T_ext, external disk response time T_dsk are stored in the internal cache configuration change plan storage table 1009 (see
In step S3105, in case the predictive response time T_vol_wc at the time of internal cache assignment does not satisfy the target response time T_tgt or when the resulting performance decrease is out of the range of the permissible performance decrease degree D_prmt (if No at step S3105), go to step S3106.
At step S3106, in view of the fact that execution of the internal cache assignment results in the predictive response time fails to satisfy the target response time or in the resultant performance being out of the range of permissible performance decrease degree D_prmt, the internal cache assignment is prevented. As far as this is concerned, this step is the same as the step S3104 but is different from step S3104 in that the internal cache capacity is set to a negative value (e.g., −1 MB). This indicates that it is impossible to satisfy the expected performance even when assigning the internal cache as has been stated supra in conjunction with
In an on-screen display example shown at upper part of
The internal cache capacity d1003 is value-changeable by the user when the need arises. For example, the blank space d1009 may be changed to indicate “200 MB” (d1012). If this is the case, the estimated value of internal cache capacity also is updated; for example, its present value “126.5 GB” (d1008) is changed to “126.7 GB” (d1011). In addition, based on this changed internal cache capacity, a new value of the predictive response time d1004 is recalculated—e.g., its “7.1 ms” (d1010) is updated to “5.9 ms” (d1013). The recalculation of the predictive response time at this time is performed in a way which follows. First, an internal cache hit rate R_int after the value change is obtained using the average I/O size μIO, access frequency variance δ2freq and cache hit rate table 1008 (for detail, see the flowchart of
According to this embodiment, in the storage system having at least one application server 101, two or more storage devices 106, virtualization apparatus 105 which enables recognition of any one of these storage devices 106 as a routinely virtualized storage, and storage management server 107, the storage management server 107 predicts a response time with respect to the application server 101 of virtualization apparatus 105 from cache configurations and access performances of the virtualization apparatus 105 and storage device(s) 106 and then evaluates the presence or absence of assignment of internal cache 123 to virtual volume 125 and assignment amount-dependent predictive performance value to thereby perform decision or “judgment” of the cache capacity within virtualization apparatus 105 and estimation of an appropriate cache capacity, thus making it possible to prepare an internal cache configuration change plan.
According to this embodiment, efficient utilization of storage device resources is performed by a method which follows.
According to this embodiment, (1) it is possible for a storage device(s) being externally linked to the virtualization apparatus to readily perform the decision as to whether the internal cache within such virtualization apparatus is assigned or not. It is also possible to make easier the calculation of such internal cache capacity to be assigned. (2) Furthermore, the virtualization apparatus's cache resource is maximally utilizable at every part of the storage system. Prior to the introduction of virtualization apparatus, it is possible to estimate the optimum amount of internal cache capacity as built in the virtualization apparatus.
It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims.
Number | Date | Country | Kind |
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2008-269366 | Oct 2008 | JP | national |