Claims
- 1. A cache coupled to receive an input address, said cache comprising:a storage including at least a first way for storing cache lines and at least a prefetch way for storing prefetch cache lines, wherein said storage is further configured to store a plurality of counters, each of said plurality of counters corresponding to a respective prefetch cache line in said prefetch way; and a control unit coupled to said storage, said control unit configured to update a first counter of said plurality of counters responsive to said input address hitting a first prefetch cache line corresponding to said first counter, and wherein said control unit is configured to move said first prefetch cache line to said at least said first way responsive to said first counter crossing a threshold value.
- 2. The cache as recited in claim 1 wherein said control unit is configured to increment said counter responsive to said input address hitting said first prefetch cache line, and wherein said control unit is configured to move said first cache line responsive to said first counter exceeding said threshold value.
- 3. The cache as recited in claim 1 wherein said threshold value is programmable.
- 4. The cache as recited in claim 1 wherein said control unit is configured to delay moving said first prefetch cache line until said first prefetch cache line is selected for replacement by another prefetch cache line.
- 5. The cache as recited in claim 4 wherein said storage is further configured to store a plurality of referenced indications, each of said plurality of referenced indications corresponding to said respective prefetch cache line in said prefetch way, and wherein said control unit is configured to set a first referenced indication of said plurality of referenced indications to a referenced state responsive to said first counter crossing said threshold.
- 6. The cache as recited in claim 5 wherein said control unit is configured to move said first prefetch cache line further responsive to said first referenced indication being in said referenced state.
- 7. The cache as recited in claim 6 wherein said control unit is further configured to store said first prefetch cache line into said prefetch way responsive to a prefetch of said first prefetch cache line from memory, and wherein said control unit is configured to initialize said first referenced indication to a non-referenced state in response to storing said first prefetch cache line.
- 8. The cache as recited in claim 1 wherein said at least a first way comprises a plurality of ways including said first way, and wherein said control unit is configured to is configured to maintain a replacement policy among said plurality of ways, and wherein said control unit is configured to move said first prefetched cache line into one of said plurality of ways responsive to said replacement policy.
- 9. The cache as recited in claim 8 wherein said prefetch way is excluded from said replacement policy.
- 10. The cache as recited in claim 8 wherein said replacement policy comprises a least recently used (LRU) replacement policy.
- 11. The cache as recited in claim 1 wherein said control unit is configured to store said first prefetch cache line into said prefetch way responsive to a prefetch of said first prefetch cache line from memory.
- 12. The cache as recited in claim 11 wherein said control unit is configured to initialize said first counter responsive to storing said first prefetch cache line into said prefetch way.
- 13. A method comprising:receiving an input address into a cache; detecting a hit in a first cache line of a prefetch way of said cache responsive to said receiving, said prefetch way storing only prefetch cache lines; updating a counter corresponding to said first cache line responsive to said detecting; and moving said first cache line from said prefetch way to a first way of said cache responsive to said counter crossing a threshold value.
- 14. The method as recited in claim 13 wherein said updating said counter comprises incrementing said counter, and wherein said counter crossing said threshold value comprises said counter exceeding said threshold value.
- 15. The method as recited in claim 13 further comprising programming said threshold value.
- 16. The method as recited in claim 13 wherein said moving is further responsive to selecting said first cache line for replacement in said prefetch way by another prefetch cache line.
- 17. The method as recited in claim 13 wherein said moving comprises setting a referenced indication to a referenced state responsive to said counter crossing said threshold value.
- 18. The method as recited in claim 17 wherein said moving further comprises:selecting said first cache line for replacement in said prefetch way by another prefetch cache line; and moving said first cache line from said prefetch way to said first way responsive to said selecting and further responsive to said referenced indication being in said referenced state.
- 19. The method as recited in claim 13 further comprising storing said first cache line into said prefetch way responsive to prefetching said first cache line from a memory.
- 20. The method as recited in claim 19 further comprising initializing said counter responsive to said storing.
Parent Case Info
This application is a continuation of U.S. patent application Ser. No. 08/884,434, filed Jun. 27, 1997, now U.S. Pat. No. 6,138,213 (which includes a continued prosecution application filed Dec. 6, 1999).
US Referenced Citations (19)
Non-Patent Literature Citations (1)
Entry |
Mowry, “Tolerating Latency through Software-Controlled Data Prefetching,” A Dissertation Submitted to the Department of Electrical Engineering and the Committee on Graduate Studies of Stanford University in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy, pp. 121-176. |
Continuations (1)
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Number |
Date |
Country |
Parent |
08/884434 |
Jun 1997 |
US |
Child |
09/558891 |
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US |