CALIBRATION LOOP, FILTER CIRCUIT AND RELATED METHOD CAPABLE OF AUTOMATICALLY ADJUSTING CENTER FREQUENCY OF A FILTER

Information

  • Patent Application
  • 20070229174
  • Publication Number
    20070229174
  • Date Filed
    November 23, 2006
    18 years ago
  • Date Published
    October 04, 2007
    17 years ago
Abstract
A calibration loop includes an oscillator, an integrator, an amplitude comparator, and a working voltage adjuster. The oscillator is used for generating a reference clock signal. The integrator is coupled to the oscillator for generating an output amplitude according to the reference clock signal and a working voltage. The first input end of the amplitude comparator is coupled to the integrator and the second input end of the amplitude comparator is coupled to the oscillator. The amplitude comparator is used for comparing the output amplitude of the integrator with an amplitude of the reference clock signal of the oscillator and outputting a comparison result. The input end of the working voltage adjuster is coupled to the amplitude comparator, and the output end of the working voltage adjuster is coupled to the integrator. The working voltage adjuster is used for tuning the input working voltage according to the comparison result.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a diagram of a filter circuit capable of adjusting center frequency of a filter according to the present invention.



FIG. 2 is a circuit diagram illustrating the filter of the filter circuit in FIG. 1.



FIG. 3 is a diagram illustrating the gyrator of the filter in FIG. 2.



FIG. 4 is a diagram illustrating the integrator of the filter circuit in FIG. 1.


Claims
  • 1. A calibration loop capable of adjusting center frequency of a filter comprising: an oscillator for generating a reference clock signal;an integrator coupled to the oscillator for generating an output amplitude according to the reference clock signal and a working voltage;an amplitude comparator including a first input end coupled to the integrator and a second input end coupled to the oscillator, the amplitude comparator used for comparing the output amplitude of the integrator with an amplitude of the reference clock signal of the oscillator and outputting a comparison result; anda working voltage adjuster including an input end coupled to the amplitude comparator and an output end coupled to the integrator, the working voltage adjuster used for tuning the working voltage of the integrator according to the comparison result outputted from the amplitude comparator.
  • 2. The calibration loop of claim 1 wherein the integrator includes a unity gain frequency that corresponds with the output amplitude.
  • 3. The calibration loop of claim 2 wherein the unity gain frequency of the integrator corresponds with the center frequency of the filter.
  • 4. The calibration loop of claim 1 wherein the oscillator, the integrator, the amplitude comparator, and the working voltage adjuster are integrated on a same chip.
  • 5. The calibration loop of claim 1 wherein the oscillator is a quartz oscillator.
  • 6. The calibration loop of claim 1 wherein the integrator comprises: a transconductor coupled to the oscillator and the working voltage adjuster for generating a driving signal according to the reference clock signal and the working voltage; anda capacitor coupled to the transconductor for charging and discharging to generate the output amplitude according to the driving signal outputted from the transconductor.
  • 7. A filter circuit capable of adjusting center frequency of a filter comprising: an oscillator for generating a reference clock signal;an integrator coupled to the oscillator for generating an output amplitude according to the reference clock signal and a working voltage;an amplitude comparator including a first input end coupled to the integrator and a second input end coupled to the oscillator, the amplitude comparator used for comparing the output amplitude of the integrator with an amplitude of the reference clock signal of the oscillator and outputting a comparison result;a filter for generating a center frequency according to the working voltage; anda working voltage adjuster including an input end coupled to the amplitude comparator and an output end coupled to the integrator, the working voltage adjuster used for tuning the working voltage of the integrator according to the comparison result outputted from the amplitude comparator.
  • 8. The filter circuit of claim 7 wherein the integrator includes a unity gain frequency that corresponds with the output amplitude.
  • 9. The filter circuit of claim 8 wherein the unity gain frequency of the integrator corresponds with the center frequency of the filter.
  • 10. The filter circuit of claim 7 wherein the oscillator, the integrator, the amplitude comparator, the working voltage adjuster, and the filter are integrated on a same chip.
  • 11. The filter circuit of claim 7 wherein the oscillator is a quartz oscillator.
  • 12. The filter circuit of claim 7 wherein the filter is a transconductance-c filter.
  • 13. The filter circuit of claim 7 wherein the filter comprises a plurality of transconductors and a plurality of capacitors.
  • 14. The filter circuit of claim 7 wherein the integrator comprises: a transconductor coupled to the oscillator and the working voltage adjuster for generating a driving signal according to the reference clock signal and the working voltage; anda capacitor coupled to the transconductor for charging or discharging to generate the output amplitude according to the driving signal outputted from the transconductor.
  • 15. A method for adjusting center frequency of a filter, the method comprising: generating a reference clock signal;generating an output amplitude according to the reference clock signal and a working voltage;comparing the output amplitude with an amplitude of the reference clock signal and outputting a comparison result;adjusting the working voltage according to the comparison result; andadjusting the center frequency of the filter according to the adjusted working voltage.
  • 16. The method of claim 15 wherein generating the output amplitude according to the reference clock signal and the working voltage further comprises: generating a driving signal according to the reference clock signal and the working voltage; andcharging or discharging a capacitor to generate the output amplitude according to the driving signal.
Priority Claims (1)
Number Date Country Kind
095108642 Mar 2006 TW national