Claims
- 1. A capacitance measurement circuit comprising:
a drive circuit including: a power port couplable to a constant-current source; a detector port couplable to a threshold detector; a probe port couplable to a probe capacitor; a reference port couplable to a reference capacitor; a plurality of switches being actuatable to alternately couple said power port to said probe port and to said reference port; said drive circuit being configured to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port; and said drive circuit being configured to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.
- 2. The circuit of claim 1, comprising a constant-current source coupled to said power port.
- 3. The circuit of claim 1, comprising:
a probe capacitor coupled to said probe port; and a reference capacitor coupled to said reference port.
- 4. The circuit of claim 1, being configured to maintain a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor.
- 5. The circuit of claim 1, further comprising a threshold detector coupled to said detector port, said threshold detector being configured to indicate when the linear ramp waveform reaches a threshold.
- 6. The circuit of claim 5, wherein the signal comprises a linear ramp voltage waveform in which the voltage varies linearly therealong, and said threshold detector is configured to indicate when the signal reaches a threshold voltage.
- 7. The circuit of claim 6, further comprising a timer to measure time elapsed between coupling said constant-current source to one of the probe and reference capacitors, and the signal reaching the threshold.
- 8. The circuit of claim 7, comprising a microprocessor configured to actuate said switches and to measure said time elapsed.
- 9. The circuit of claim 8, wherein said microprocessor is configured to calculate a level of material into which the probe capacitor is immersed.
- 10. The circuit of claim 9, wherein said microprocessor uses said magnitude of capacitance of the probe capacitor and reference capacitor to calculate the level of material.
- 11. The circuit of claim 10, wherein said microprocessor implements a ratiometric equation.
- 12. The circuit of claim 11, wherein said microprocessor implements the equation:
- 13. The circuit of claim 11, comprising computer readable program code configured to compensate for parasitic board capacitances.
- 14. The circuit of claim 13, wherein said computer readable program code comprises:
computer readable program code to determine a value of the parasitic board capacitances; computer readable program code to store said value; computer readable program code to retrieve said value during a measurement cycle; and computer readable program code to incorporate said value to calculate the level of material.
- 15. The circuit of claim 13, wherein said computer readable program code implements the equation:
- 16. A capacitance probe comprising the capacitance measurement circuit of claim 1.
- 17. The probe of claim 16, comprising:
a constant-current source coupled to said power port; a probe capacitor coupled to said probe port; a reference capacitor coupled to said reference port; a threshold detector coupled to said detector port, said threshold detector being configured to indicate when the linear ramp waveform reaches a threshold; wherein said circuit is configured to maintain a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor to substantially eliminate parasitic capacitance therebetween.
- 18. A capacitance measurement circuit comprising:
a constant-current source; a threshold detector being configured to indicate when a linear ramp waveform reaches a threshold voltage; a drive circuit coupled to said constant-current source and to said threshold detector, said drive circuit including:
a probe port couplable to a probe capacitor; a reference port couplable to a reference capacitor; a plurality of switches configured to alternately couple said constant-current source to said probe port and to said reference port; said drive circuit being configured to generate the signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of the probe capacitor and reference capacitor alternatively coupled thereto; and said drive circuit being configured to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.
- 19. A method of fabricating a capacitance measurement circuit, said method comprising:
providing a drive circuit including:
a power port couplable to a constant-current source; a detector port couplable to a threshold detector; a probe port couplable to a probe capacitor; a reference port couplable to a reference capacitor; a plurality of switches being actuatable to alternately couple said power port to said probe port and to said reference port; configuring the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port, and: configuring the drive circuit to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.
- 20. A method of determining the capacitance of a capacitance probe, said method comprising:
providing a drive circuit; coupling a constant-current source to the drive circuit; coupling a probe capacitor to the selection/drive circuit; coupling a reference capacitor to the selection/drive circuit; providing the selection/drive circuit with a plurality of switches being actuatable to alternately couple the constant-current source to the probe capacitor and to the reference capacitor; configuring the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port; actuating the switches to alternately couple the constant-current source to the probe capacitor and to the reference capacitor; and using the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor; and maintaining a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor during said use of the drive circuit.
RELATED APPLICATION
[0001] This application claims the benefit of U.S. Provisional Application Ser. No. 60/197,195, filed on Apr. 14, 2000.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60197195 |
Apr 2000 |
US |