Klaas Bult, “Analog Broadband Communication Circuits in Pure Digital Deep Sub-Micron CMOS,” 1999 IEEE International Solid-State Circuits Conference. |
Klaas Bult, “Analog Design in Deep Sub-Micron CMOS,” Broadcom Netherlands B.V., Sep. 20, 2000. |
Yun Chiu et al., “A Study of Folding and Interpolating ADC,” EECS247, Fall 2000 Final Project Report, pp. 1 to 6. |
Pierre Coulon, “S-38.220 Postgraduate Course on Signal Processing in Communications, Fall—99,” Nov. 1, 1999, pp. 1-20. |
M. Flynn et al., “FA 9.7: A 400MSample/s 6b CMOS Folding and Interpolating ADC,” IEEE 1998, pp. 9.7-1 to 9.7-10. |
Jürgen Hertle, “High-Speed Folding and Interpolation A/D Converters,” Workshop on A/D Converters for Telecommunication, Integrated Systems Laboratory, ETH Zürich, Oct. 22, 2001. |
Hyung Hoon Kim et al., “A 12 Bit Current-Mode Folding/Interpolation CMOS A/D Converter With 2 Step Architecture,” Department of Electronic Engineering, Inha University, Korea. (Unknown Date). |
Alan Kwentus et al., “WA 19.1 A Single-Chip Universal Digital Satellite Receiver with 480MHz IF Input,” 1999 IEEE International Solid-State Circuit Conference. |
Bradley A. Minch, “Folding the Differential Pair for Low-Voltage Applications,” Mixed Analog-Digital VLSI Circuits and Systems Laboratory (MAD VLSI), Cornell University. (Unknown Date). |
Bram Nauta et al., “FA 16.3: A 70MSample/s 110mW 8b CMOS Folding Interpolating A/D Converter,” 1995 IEEE International Solid State Circuits Conference. |
M. Steyaert et al., “A 100 MHz 8 bit CMOS Interpolating A/D Converter,” IEEE 1993 Custom Integrated Circuits Conference, pp. 28.1.1 to 28.1.4. |
Robert C. Taft et al., “A 100-MS/s 8-b CMOS Subranging ADC with Sustained Parametric Performance from 3.8 V Down to 2.2 V,” IEEE Journal of Solid-State Circuits, vol. 36, No. 3, Mar., 2001. |
John van Valburg et al., “An 8-b 650-MHz Folding ADC,” IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec., 1992, pp. 1662 to 1666. |
Nauta, B. et al., “FA 16.3: A 70MSample/s 110mW 8b CMOS Folding Interpolating A/D Converter,” XP000557639, IEEE International Solid State Circuits Conference, IEEE Inc., New York, US, Feb. 1, 1995, vol. 38, pp. 276-277, 379. |
Van de Grift, Rob E.J., “An 8-Bit Video ADC Incorporating Folding and Interpolation Techniques,” XP000560513, IEEE Journal of Solid-State Circuits, IEEE Inc., New York, US, Dec. 1, 1987, vol. 22, No. 6, pp. 944-953. |
Nauta, B. et al., “A 70-MS/s 110-mW 8-b CMOS Folding and Interpolating A/D Converter,” XP000557233, IEEE Journal of Solid-State Circuits, IEEE Inc., New York, US, Dec. 1, 1995, vol. 30, No. 12, pp. 1302-1308. |
Van Valburg, J. et al., “An 8-b 650-MHz Folding ADC,” XP000329014, IEEE Journal of Solid-State Circuits, IEEE Inc., New York, US, Dec. 1, 1992, vol. 27, No. 12, pp. 1662-1666. |