Capacitor assembly

Abstract

An integrated capacitor assembly that offers improved performance characteristics in a convenient and space-saving package is provided. More specifically, the capacitor assembly contains a multi-anode stack of at least two electrolytic capacitors and at least one ceramic component, which are connected in parallel to common terminals within an encapsulating case. The resultant capacitor assembly is characterized by such performance characteristics as relatively high capacitance, low ESR, low piezoelectric noise, and space reduction. Reduced piezoelectric noise may be particularly advantageous for providing clear filtering in audio/video data processing and communication.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

A full and enabling disclosure of the present invention, including the best mode thereof, directed to one of ordinary skill in the art, is set forth more particularly in the remainder of the specification, which makes reference to the appended figures in which:

FIG. 1 is a perspective view of one embodiment of an electrolytic capacitor for use in the present invention;

FIG. 2 is a plan cross-sectional view of a multilayer ceramic capacitor (MLCC) for use in one embodiment of the present invention;

FIG. 3 is a perspective view of a terminated MLCC such as that illustrated in FIG. 2;

FIG. 4 is a perspective view of one embodiment of a capacitor assembly of the present invention;

FIG. 5 is a different perspective view of the capacitor assembly of FIG. 4;

FIG. 6 is a plan view of the capacitor assembly of FIG. 4;

FIG. 7 displays graphical results for a piezoelectric noise test simulation of a capacitor assembly formed in the Example, specifically displaying the induced voltage level versus time;

FIG. 8 displays the ESR versus frequency for a capacitor assembly formed in the Example;

FIG. 9 displays impedance versus frequency for a capacitor assembly formed in the Example;

FIG. 10 is a plan view of one embodiment of a termination frame for use in forming multiple capacitor assemblies;

FIG. 11 is a plan view of exemplary first and second lead frame portions for a capacitor assembly of the present invention;

FIG. 12 is a plan view of the first and second lead frame portions of FIG. 11 to which a multi-anode capacitor stack and a ceramic capacitor are adhered; and

FIG. 13 is a perspective view of the capacitor assembly of FIGS. 4-6, illustrated without an encapsulating case.

Claims

1. A capacitor assembly comprising: a multi-anode stack comprising at least two electrolytic capacitors positioned adjacent to each other, the capacitors comprising a cathode termination and an anode termination formed by an anode wire;a ceramic component comprising a first polarity termination and a second polarity termination;a first lead frame portion to which the anode termination and the first polarity termination are electrically connected;a second lead frame portion to which the cathode termination and the second polarity termination are electrically connected; anda case that encapsulates the electrolytic capacitors and the ceramic component, and leaves exposed respective portions of the first and second lead frame portions.

2. The capacitor assembly of claim 1, wherein the electrolytic capacitors are electrically connected.

3. The capacitor assembly of claim 1, wherein the electrolytic capacitors are electrically connected with a conductive adhesive.

4. The capacitor assembly of claim 1, wherein the electrolytic capacitors are stacked in a horizontal configuration.

5. The capacitor assembly of claim 1, wherein the electrolytic capacitors are stacked in a vertical configuration.

6. The capacitor assembly of claim 1, wherein the first lead frame portion contains a mounting surface to which the first polarity termination is electrically connected.

7. The capacitor assembly of claim 1, wherein the first lead frame portion contains a first anode portion that is substantially perpendicular to a bottom surface of the capacitor assembly and to which the anode wire of the electrolytic capacitors is electrically connected.

8. The capacitor assembly of claim 7, wherein the first anode portion defines a U-shaped region within which the anode wire is received.

9. The capacitor assembly of claim 1, wherein the first lead frame portion contains a second anode portion that defines a pocket for receiving the ceramic component.

10. The capacitor assembly of claim 9, wherein the pocket is formed by a mounting surface that is substantially parallel to a bottom surface of the capacitor assembly and a sidewall that is substantially perpendicular to the bottom surface of the capacitor assembly.

11. The capacitor assembly of claim 1, wherein the second lead frame portion contains a mounting surface to which the multi-anode stack and the second polarity termination of the ceramic component are electrically connected.

12. The capacitor assembly of claim 1, wherein the electrolytic capacitors contain an anode body formed from a valve metal composition.

13. The capacitor assembly of claim 12, wherein the valve metal composition includes tantalum.

14. The capacitor assembly of claim 12, wherein the valve metal composition includes niobium oxide.

15. The capacitor assembly of claim 12, wherein the electrolytic capacitors further contain a dielectric film overlying the anode body and a solid electrolyte overlying the dielectric film.

16. The capacitor assembly of claim 15, wherein the solid electrolyte is manganese dioxide.

17. The capacitor assembly of claim 15, wherein the solid electrolyte is a conductive polymer.

18. The capacitor assembly of claim 1, wherein the ceramic component contains a plurality of conductive layers of respective first and second polarities interleaved with a plurality of ceramic layers to form respective pairs of opposing capacitor plates in a stacked arrangement, wherein the first polarity conductive layers are electrically connected to the first polarity termination of the ceramic component, and wherein the second polarity conductive layers are electrically connected to the second polarity termination of the ceramic component.

19. The capacitor assembly of claim 18, wherein the ceramic layers comprise BaTiO3.

20. The capacitor assembly of claim 18, wherein the ceramic component is a multilayer ceramic capacitor.

21. The capacitor assembly of claim 18, wherein the ceramic component is a varistor.

22. The capacitor assembly of claim 1, wherein the capacitor assembly exhibits a piezoelectric noise having an absolute value of less than about 1 millivolt when subjected to a rated voltage level and measured at 15 G.

23. The capacitor assembly of claim 1, wherein the capacitor assembly exhibits a piezoelectric noise having an absolute value of less than about 0.1 millivolt when subjected to a rated voltage level and measured at 15 G.

24. The capacitor assembly of claim 1, wherein the ESR of the assembly is less than about 50 milliohms at an operating frequency of 300 kHz.

25. The capacitor assembly of claim 1, wherein the ESR of the assembly is less than about 10 milliohms at an operating frequency of 300 kHz.

26. A method of forming a capacitor assembly, the method comprising: stacking at least two electrolytic capacitors together to form a multi-anode stack, wherein anode wires of the electrolytic capacitors are positioned in a generally parallel arrangement;providing a multilayer ceramic capacitor characterized by first and second terminations;electrically connecting the anode wires and the first termination of the multilayer ceramic capacitor to a first terminal;electrically connecting cathode terminations of the electrolytic capacitors and the second termination of the multilayer ceramic capacitor to a second terminal; andencapsulating the multi-anode stack and the multilayer ceramic capacitor within a case.

27. The method of claim 26, further comprising filling the case with an encapsulating fill material.

28. The method of claim 26, further comprising laser welding the anode wires to the first terminal.

29. The method of claim 26, further comprising bending portions of the first and second terminals along the periphery of the case to form first and second surface mount terminations.

30. The method of claim 26, further comprising applying a conductive paste to the first and second terminals and thereafter adhering the multi-anode stack and the multilayer ceramic capacitor to the first and second terminals.