The present invention relates to micro-fluid ejection heads, such as inkjet printer actuation devices. More particularly, although not exclusively, it relates to insulating the devices to improve energy efficiency, including capping layers to stabilize resistivity.
The art of printing images with micro-fluid technology is relatively well known. Familiar devices include fax machines, all-in-ones, inkjet printers, and graphics plotters, to name a few. Conventionally, an ejection head in an inkjet printer includes access to a local or remote supply of ink, a heater chip, a nozzle plate, and an input/output connector, such as a tape automated bond (TAB) circuit. The TAB circuit electrically connects the heater chip to the printer. The heater chip typifies thin film resistors or heaters fabricated by growing, forming, depositing, patterning and etching various layers on a substrate, such as a silicon wafer. One or more ink vias cut or etched through a thickness of the wafer serve to fluidly connect the ink to an individual resistive heater. To print or emit a single ink drop, a heater is uniquely addressed with a small amount of current from adjacent electrodes. The current causes heating of a small volume of ink which vaporizes in a local ink chamber. The ink ejects through the nozzle plate toward a print medium.
Thin films overlying a resistor layer traditionally include coating layers, such as silicon nitride (SiN) and tantalum (Ta) for reasons relating to passivation and ink cavitation protection. Underneath the resistor layer, a thermal barrier layer exists above the substrate. The oxide functions to prevent energy from the heaters from migrating into the substrate. While the design has proved adequate over the years, significant heat absorption from the heaters still remains in modern designs which keeps low the thermal efficiency of the micro-fluid ejection head. More recently, artisans have suggested bolstering the barrier layer with insulative materials, such as methyl silesquioxane (MSQ). Other layers are suggested in U.S. Pat. No. 7,390,078, incorporated herein.
During recent wafer qualification testing, however, the inventors have observed that direct contact between the MSQ and the resistor layer results in resistance instability over a long term life of the head. Particularly, the inventors have seen that resistance stability changes greatly over the course of tiring a printhead with substantial changes occurring around the five millionth firing. As is seen in
Accordingly, a need exists to significantly improve stability of heater resistance. Solutions, however, should only minimally affect thermal impedance. Additional benefits and alternatives are also sought when devising such solutions.
The above-mentioned and other problems become solved by applying a capping layer to the insulators in micro-fluid ejection heads. Broadly, the insulator resides on the substrate between an oxide barrier layer and the resistor layer and a capping layer covers the insulator. In one design, the insulator embodies methyl silesquioxane (MSQ) while the cap is silicon nitride (SiN). Their thicknesses range from 5000-6000 Angstroms and from a few Angstroms to about 2000 Angstroms, respectively. It has been shown that such a design not only maintains thermal stability between 0 to 5.0% ΔR/Ri over a lifetime of firing, but also significantly improves adhesion between the MSQ and the resistor layer.
In still other designs, the capping layer can typify silicon carbide, silicon oxide or other dielectric materials. Alternatively, or in addition, plasma treatments are applied to the insulator layer to passivate the surface and seal off its pores. Contemplated treatments include H2, NH3, N2O and O2. Printheads containing the ejection heads and printers containing the printhead are also disclosed.
These and other embodiments will be set forth in the description below. Their advantages and features will become readily apparent to skilled artisans. The claims set forth particular limitations.
The accompanying drawings incorporated in and forming a part of the specification, illustrate several aspects of the present invention, and together with the description serve to explain the principles of the invention. In the drawings:
In the following detailed description, reference is made to the accompanying drawings where like numerals represent like details. The embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It is to be understood that other embodiments may be utilized and that process, electrical, and mechanical changes, etc., may be made without departing from the scope of the invention. Also, the term wafer or substrate includes any base semiconductor structure such as silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of silicon supported by a base semiconductor structure, as well as other semiconductor structures hereafter devised or already known in the art. The following detailed description, therefore, is not to be taken in a limiting sense and the scope of the invention is defined only by the appended claims and their equivalents. In accordance with the present invention, methods and apparatus describe a cap for an insulator in a micro-fluid ejection head, such as an inkjet printhead.
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At surface 18, a portion 19 of a flexible circuit is adhered to the housing, especially a tape automated bond (TAB) circuit 20. At surface 22, the other portion 21 is adhered. In this way, two surfaces can be perpendicularly arranged relative one another (about an edge 23) to orient surface 22 toward a print medium during use while orienting surface 18 toward corresponding electrical connectors in an external device. Also, the TAB circuit supports a plurality of input/output (I/O) connectors 24 for electrically connecting a heater chip 25 to the external device, such as a printer, fax machine, copier, photo-printer, plotter, all-in-one, etc. Between the I/O connectors and the heater chip, pluralities of electrical conductors 26 serve to electrically short the connectors 24 to the input terminals (bond pads 28) of the heater chip 25. In composition, the TAB circuit typifies a polyimide material, while the electrical conductors and connectors comprise copper or other conductive metals. (For simplicity,
At element 32, the heater chip 25 contains at least one ink via that fluidly connects to a supply of ink associated with the housing. To form the vias, many processes are known that cut or etch through a thickness of the heater chip. Some preferred processes include grit blasting or etching, such as wet, dry, reactive-ion-etching, deep reactive-ion-etching, or other. As shown, the heater chip contains four columns (column A-column D) of fluid firing elements or heaters (six circles) but actual practice may include several hundred or thousand, or more. Vertically adjacent ones of the fluid firing elements may also have a lateral spacing gap (not shown). In vertical pitch, the fluid firing elements have spacing comparable to the dots-per-inch resolution of an attendant printer. Some examples include spacing of 1/300th, 1/600th, 1/1200th, 1/2400th or other of an inch alone the longitudinal extent of the via.
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In various embodiments, the thin film layers become formed by any of a variety of chemical vapor depositions (CVD), physical vapor depositions (PVD), epitaxy, ion beam deposition, evaporation, sputtering or other similarly known or later developed techniques. Preferred CVD techniques include low pressure (LP), atmospheric pressure (AP), plasma enhanced (PE), high density plasma (HDP) or other. Preferred etching techniques include any variety of wet or dry etches, reactive ion etches, deep reactive ion etches, etc. Preferred photolithography steps include exposure to ultraviolet or x-ray light sources, or other.
As is apparent from the figure, the substrate 122 provides the base layer upon which all other layers are formed. In one embodiment, it comprises a silicon wafer of p-type, 100 orientation, having a resistivity of 5-20 ohm/cm. Its beginning thickness ranges about 200 to 800 microns, with more preferred sizes being 525+/−20 microns, 625+/−20 microns, 625+/−15 microns, or other. Its diameter is 100+/−0.50 mm, 125+/−0.50 mm, 150+/−0.50 mm, or other.
Adjacent the substrate is a thermal barrier layer 142. It includes a pure silicon oxide (SiO2) composition or one mixed with glass such as BPSG, PSG or PSOG. It can even include silicon nitride. In a particular ultra-low energy design, the barrier consists of BPSG in a thickness of about 7800 Angstroms, followed by silox in a thickness of about 6000 Angstroms, followed by silicon nitride in a thickness of about 500 Angstroms. Of course, the barrier can be grown on the substrate as well as being deposited, or include aspects of both.
Adjacent the barrier layer is the insulative layer 132. It includes methyl silesquioxane (MSQ) in a thickness, of about 5000-6000 Angstroms or more. As with other insulators, its atomic level structure is very porous and typically defines thermal conductivity between 0.15 and 0.45 W/m-K. Other materials include, but are not limited to, Hydrogen Silsesquioxane (HSQ), fluorosilicate glass (FSG), or the like.
Directly adjacent the insulative layer 132, in the area of the heater element 117, is a cap 146 that serves to prevent ion mobility between the resistor 126 and insulative layers during use. Not only does it inhibit migration of metal ions from the heater element to the insulative layer, but also migration of oxygen from the insulative layer into the resistor layer. Its composition can vary, but silicon nitride (SiN) has been found very useful in a thickness of about 2000 Angstroms or less. Appreciating the moderate conductivity of SiN, its thickness is made relatively thin and 500-1000 Angstroms is a more representative range. In other designs, silicon carbide, silicon oxide and dielectric materials are anticipated as serving the same function of capping the insulative layer. Similarly, plasma treatments of H2, NH3, N2O and O2 are contemplated alone or in combination with the cap layer for passivating the surface of the insulative layer and sealing off the substantial pores of the insulator.
Subsequent to the cap layer, traditional layers include the resistor layer 126, conductor layer 159, 160 and any overcoat layers 130. The resistor typifies any of a variety of compositions, such as hafnium, Hf, tantalum, Ta, titanium, Ti, tungsten, W, hafnium-diboride, HfB2, Tantalum-nitride, Ta2N, TaAl(N,O), TaAlSi, TaSiC, Ta/TaAl layered resistor, Ti(N,O) and WSi(O). In a particular ultra-low energy design of the invention, TaAlN is used in a thickness of about 350 Angstroms.
Overlying the resistor layer is the conductor layer. It includes both anode and cathode portions that define the heater element 117. Its composition is representatively aluminum in a thickness of about 11,000 Angstroms. Other designs envision thicknesses from about 4,000 to 15,000 Angstroms with materials selected from copper, gold, silver, and alloys thereof. The selection requirements relate to cost and electrical conduction, to name a few.
Lastly, the coating layers 130 reside above the conductor layer and the resistor layer. They serve traditional notions of passivation and cavitation protection. They can be single or multiple layers. In one embodiment, the bottom coating layer is SiN in a thickness of about 1500 Angstroms, while the top coating layer is Ta in a thickness of about 500 Angstroms.
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In addition, SiN as a cap to an MSQ insulative layer has revealed improved adhesion between the MSQ and the resistor layer. With reference to
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The foregoing has been presented for purposes of illustrating the various aspects of the invention. It is not intended to be exhaustive or to limit the claims. Rather, it is chosen to provide the best illustration of the principles of the invention and its practical application to enable one of ordinary skill in the art to utilize the invention, including its various modifications that naturally follow. All such modifications and variations arc contemplated within the scope of the invention as determined by the appended claims.