Patent Application
20090087010
This application relates to carrier chips with cavities.
Hybrid circuits can utilize thick film technology. A thick film circuit can be fabricated by patterning conductive, resistive and/or dielectric paste materials onto a ceramic substrate in order to form thick film conductors, and possibly also to form passive circuit components, such as resistors and capacitors. The thick film material can include a functional component that determines its electrical properties, a binder component that provides adhesion between the thick film material and the ceramic substrate, and a vehicle to establish printing characteristics. Typically, the thick film paste is patterned on the ceramic substrate, dried to evaporate the solvents from the printed film, and fired in an oven. A hybrid circuit can then be fabricated by soldering conventional electronic components, active or passive, to thick film bonding pads printed on the substrate with conductive thick film materials.
The functional component in conductive thick film materials is typically a fine metal powder, such as copper, gold, silver, palladium-silver, platinum-silver, palladium-gold, or platinum-gold. Bonding pads and circuit traces are typically patterned from such thick film materials by screen printing the conductive metallic paste onto a ceramic substrate, although other patterning methods can be used, such as spin coating or a combination of screen printing and wet chemical etching.
A solder mask layer is then typically added to cover the conductive traces and separate adjacent bonding pads. The solder mask layer is generally screen printed in a pattern onto the ceramic substrate and cured, leaving an area of bare substrate between the solder mask layer and the thick film bonding pads. In this manner, the thick film pads are left entirely uncovered by the solder mask layer, and may be coated with a layer of solder by immersing the entire circuit in a solder bath. Because the solder mask layer typically covers everything but the bonding pads, the pads can be coated with solder without causing solder shorts between adjacent pads and traces.
A hybrid circuit can then be formed by aligning the connection terminals of a surface-mount component onto the bonding pads, and reflowing the solder layer to form solder joints between the thick film pads and connection terminals.
The microphone apparatus 10 shown in
The microphone apparatus 10 is an audio transducer. It includes a microphone chip 12 that converts sound to a raw electrical signal, an ASIC (Application Specific Integrated Circuit) chip 14 that converts the raw signal to a processed signal, and a carrier chip 16. The carrier chip 16 supports the other chips 12 and 14 and electrically and physically (i.e., mechanically) couples the other chips 12 and 14 together.
As shown in
The ASIC chip 14 processes the raw signal by amplifying and offsetting it. The ASIC has terminal pads 44 for drawing supply power, inputting the raw signal, and outputting the processed signal.
The carrier chip 16 is shown in
The top-most and bottom-most layers 64 respectively define top and bottom surfaces 71 and 72 of the carrier chip 16. The top surface 71 has solder pads 74 for connecting to the terminal pads 34 and 44 of the microphone and ASIC chips 12 and 14. The bottom surface 72 has terminal pads 76 for drawing supply power and outputting the processed signal.
A carrier cavity 80 extends through the top metallization layer 61 and partially through the substrate 50. It is bounded by a flat bottom surface 82 and a cylindrical side surface 84. The bottom surface 82 is parallel with the carrier substrate's top and bottom surfaces 51, 52. The carrier cavity's side surface 84 is bounded mainly by the substrate 50. In this example, the cavity's side surface 84 is bounded also by an edge 91 of the top metallization layer 61, comprising edges of conductor layers 66 and/or dielectric layers 68 that comprise the top metallization layer 61. In this example, the edge 91 of the metallization layer 61 bounds the cavity 80 about the entire circumference of the cavity 80, with portions the conductor layers 66 and/or dielectric layers 68 extending up to the carrier cavity 80. In alternative examples, the metallization layer 61 can be spaced radially away from the carrier cavity 80, so that boring the cavity 80 does not include boring through the metallization layer 61.
The microphone cavity 30 functions as a front acoustic cavity in front of the diaphragm 32, and the carrier cavity 80 functions as a rear acoustic cavity behind the diaphragm 32. In this example, the cavities 30 and 80 are the same shape. They are cylindrical, which reduces corner stresses that can develop during fabrication. The inner diameters IDF and IDR of the front and rear cavities 30 and 80 are about 1 mm. They differ by less than 10% and are preferably equal. The depths DF and DR of the front and rear cavities 30 and 80 are about 0.2 mm and 0.3 mm, respectively. In this example, the cavities 80 do not contain any terminal pad, trace or metallization layer. Nor do the walls of the cavities 30 and 80 support any terminal pad, trace or metallization layer. Even the top metallization layer 61, whose edge 91 bounds the carrier cavity 80, is not supported by any of the cavity's surfaces 82 and 84 but instead by the carrier substrate's top surface 51.
In a first step 101, a blank substrate material 50 is laser machined to create the via holes 70, which extend from the substrate's top surface 51 to its bottom surface 52.
In a second step 102, the via holes 70 are filled with conductive material described above.
In a third step 103, the top and bottom metallization layers 61 and 62 are formed on the top and bottom surfaces 51 and 52 of the substrate 50. This can be done using electroplating, chemical etching, or photochemical printing.
As shown in
In a fourth step 104 in
This fourth step 104 is preferably done by ultrasonic milling, which applies less heat to the chip 16 than alternate boring methods such as laser milling. The lower temperature yields less deformation of adjacent structures—such as the substrate surface 51, metallization layer 61 and cavity walls 82, 84—than other methods that produce higher temperatures. This decreased deformation enables components to be located closer to the edge of the cavity 80 than if a hotter boring method were used. The decreased deformation also improves accuracy and repeatability of the cavity's volume, which can improve sound quality.
In a fifth step 105, the microphone chip 12 is physically and electrically coupled to the carrier chip 16. In this step, the microphone chip 12 is placed on the carrier chip 16, with the microphone pads 34 (
By fabricating the surface metallization before boring the cavity, the planarity of the top surface can be maintained, even up to the top edge of the cavity. The planar surface allows photosensitive materials and patterning techniques to be used so that high density high precision circuitry can be generated.
The lower temperature of ultrasonic milling relative to other boring methods reduces the chance of thermal damage to adjacent portions of the metallization layer. Since the substrate is fired ceramic, not green tape, the lower temperature eliminates shrinkage factors to compensate for. This allows more precise and repeatable metallization features and cavity chambers, in terms of diameter, depth and x/y placement, to be fabricated across a large area. The higher precision enables higher density features. The improved planarity and reduced damage near the cavity enables circuitry to be located closer to the edge of the cavity. The improved planarity near the cavity edge further enables photosensitive materials and patterning techniques to be used so that high-density high-precision circuitry can be generated. The lower temperature further improves dimensional control of the cavity chamber in x, y and z directions, especially relative to features of the surface metallization.
Compared to LTCC (low temperature co-fired ceramic) and HTCC (high temperature co-fired ceramic) methods, this method provides better precision on 1) the layered interconnect structure (tighter layer to layer tolerances), 2) integrated cavity x/y placement (relative to the surface metallization), 3) cavity diameter, and 4) cavity depth.
Compared to silicon based substrates, the ceramic substrate 1) enables higher performing electrical connections from topside to bottom-side interconnect, 2) is more mechanically robust, and 3) withstands higher processing temperatures.
Compared to PCBs (printed circuit boards), this method provides 1) closer thermal expansion match to silicon, 2) higher density and higher precision circuitry, 3) can withstand higher process temperature, 4) yields more precise cavity features
Accordingly, the apparatus of
The apparatus and the method further provide examples of the following method steps: In one step, a metallization layer is formed on a top surface of a substrate. In a subsequent step, a cavity is bored from the top surface partially through the substrate. The metallization layer includes a conductor layer, and the boring step includes boring through the conductor layer into the substrate. The metallization layer includes a dielectric layer, and the boring step includes boring the cavity through the dielectric layer into the substrate. The cavity is cylindrical. The substrate is of fired ceramic material. A further step entails physically and electrically coupling a microphone chip to the metallization layer, with the microphone chip completely covering the cavity. A diaphragm of the microphone chip completely covers the cavity by the coupling step. The cavity contains no trace, pad or metallization layer after the coupling step.
The apparatus further provides an example of the following features. A carrier chip includes a substrate with parallel top and bottom surfaces, a cylindrical cavity extending from the substrate top surface partially through the carrier substrate, and a metallization layer overlying the carrier top surface. A microphone chip includes a substrate with parallel top and bottom surfaces, a cylindrical cavity extending from the microphone substrate top surface to the microphone substrate bottom surface, and a diaphragm. The diaphragm is attached to the microphone substrate bottom surface and extends across the microphone cavity. The microphone chip is fixed to the carrier chip, with the microphone cavity overlying the carrier cavity, and the diaphragm covering the carrier cavity and electrically connected to the metallization layer.
This written description uses examples to disclose the invention, including best mode, and to enable any person skilled in the art to make and use the invention. The patentable scope of the invention is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal language of the claims.
