1. Field of Invention
The present invention relates generally to digital communication systems using quadrature modulation techniques. More specifically, the invention relates to a system and method for blind detection of carrier frequency offsets in such systems.
2. Description of the Prior Art
A digital communication system typically transmits information or data using a continuous frequency carrier with modulation techniques that vary its amplitude, frequency or phase. After modulation, the signal is transmitted over a communication medium. The communication media may be guided or unguided, comprising copper, optical fiber or air and is commonly referred to as the communication channel.
The information to be transmitted is input in the form of a bit stream which is mapped onto a predetermined constellation that defines the modulation scheme. The mapping of each bit as symbols is referred to as modulation.
Each symbol transmitted in a symbol duration represents a unique waveform. The symbol rate or simply the rate of the system is the rate at which symbols are transmitted over the communication channel. A prior art digital communication system is shown in
One family of modulation techniques is known as quadrature modulation and is based on two distinct waveforms that are orthogonal to each other. If two waveforms are transmitted simultaneously and do not interfere with each other, they are orthogonal. Two waveforms generally used for quadrature modulation are sine and cosine waveforms at the same frequency. The waveforms are defined as
s1(t)=A cos(2πfct) Equation 1
and
s2(t)=A sin(2πfct) Equation 2
where fc is the carrier frequency of the modulated signal and A is the amplitude applied to both signals. The value of A is irrelevant to the operation of the system and is omitted in the discussion that follows. Each symbol in the modulation alphabet are linear combinations generated from the two basic waveforms and are of the form a1 cos(2πfct)+a2 sin(2πfct) where a1 and a2 are real numbers. The symbols can be represented as complex numbers, a1+ja2, where j is defined as j=√−1.
The waveforms of Equations 1 and 2 are the most common since all passband transmission systems, whether analog or digital, modulate the two waveforms with the original baseband data signal. Quadrature modulation schemes comprise various pulse amplitude modulation (PAM) schemes (where only one of the two basic waveforms is used), quadrature amplitude modulation (QAM) schemes, phase shift keying (PSK) modulation schemes, and others.
A prior art quadrature modulator is shown in
A prior art quadrature demodulator is shown in
r(t)=a1(t)cos (2πfct+φ0)+a2(t)sin(2πfct+φ0) Equation 3
where a1(t) represents the plurality of amplitudes modulated on waveform s1(t) as defined by Equation 1 and a2(t) represents the plurality of amplitudes modulated on waveform s2(t) as defined by Equation 2. φ is an arbitrary phase offset which occurs during transmission.
The cosine and sine demodulator signal components are defined as:
The carrier frequency components, fc+fLO, are suppressed by the lowpass filters. The signals after filtering are:
If the local oscillator frequency in Equations 6 and 7 is equal to the carrier frequency, fLO=fc, and the phase offset is equal to zero, φo=0, the right hand sides of Equations 6 and 7 become ½a1(t) and ½a2(t) respectively. Therefore, to effect precise demodulation, the local oscillator must have the same frequency and phase as that of the carrier waveform. However, signal perturbations occurring during transmission as well as frequency alignment errors between the local oscillators of the transmitter and receiver manifest a difference between the carrier and local oscillator frequencies which is known as carrier offset. A phase difference between the carrier and local oscillator frequency is created as well. However, if the difference in frequencies is corrected, the difference in phase is simple to remedy. Phase correction is beyond the scope of the present disclosure.
Carrier frequency offset is defined as:
Δf=fc−fLO. Equation 8
To synchronize either parameter, the frequency and phase offsets need to be estimated. In prior art receivers, frequency offset estimation is performed after a significant amount of data processing. Without correcting offset first, the quality of downstream signal processing suffers.
“Estimation of Frequency Offset in Mobile Satellite Modems” by Cowley et al. International Mobile Satellite Conference, 16-18 Jun. 1993, pp. 417-422, discloses a circuit for determining a frequency offsets in mobile satellite applications. The frequency offset estimation uses a low pass filter, an Mth power block, a square fast Fourier transform block and a peak search block.
“A method for Course Frequency Acquisition for Nyquist Filtered MPSK” by Ahmed IEEE Transactions on Vehicular Technology, vol. 5, no. 4, 1 Nov. 1996, pp. 720-731, discloses a frequency offset estimator for mobile satellite communications. The estimator uses a low pass filter, a decimator, a fast Fourier transform block and a search algorithm.
“Carrier and Bit Synchronization in Data Communication—A tutorial Review” by Franks IEEE Transactions on Communications, US, IEEE Inc. New York, vol. COM-28, no. 8, 1 Aug. 1980, pp. 1107-1121, discloses carrier phase recovery circuits using elementary statistical properties and timing recovery based on maximum-likelihood estimation theory.
What is needed is a system and method of detecting and estimating carrier frequency offset before any data signal processing is performed.
The present invention is related to a system for estimating a carrier offset. The system includes a transmitter configured to transmit a quadrature modulated signal, and a receiver. The receiver includes an input configured to receive the quadrature modulated signal, a local oscillator configured to generate cosine and sine waves at a carrier frequency of the quadrature modulated signal, at least one cosine mixer configured to generate a carrier frequency demodulated output, at least one sine mixer configured to generate a carrier frequency demodulated output, a plurality of lowpass filters configured to filter the demodulated output of the cosine and sine mixers to produce filtered cosine and sine signal components, and a carrier offset detection processor to estimate a carrier offset between the carrier frequency and a local oscillator frequency based on the filtered output of the lowpass filters.
A more detailed understanding of the invention may be had from the following description of a preferred embodiment, given by way of example and to be understood in conjunction with the accompanying drawing(s) wherein:
When referred to hereafter, the terminology “wireless transmit/receive unit (WTRU)” includes but is not limited to a user equipment (UE), a mobile station, a fixed or mobile subscriber unit, a pager, a cellular telephone, a personal digital assistant (PDA), a computer, or any other type of user device capable of operating in a wireless environment. When referred to hereafter, the terminology “base station” includes but is not limited to a Node-B, a site controller, an access point (AP), or any other type of interfacing device capable of operating in a wireless environment.
The embodiments will be described with reference to the drawing figures where like numerals represent like elements throughout.
Shown in
The carrier-frequency demodulated outputs rc(t), rs(t) from each mixer 21c, 21s are input to respective lowpass filters 29c, 29s which suppress high-frequency noise components impressed upon the received signal r(t) during transmission through the transmission media and mixer sum frequencies, fc+fLO, (Equations 6 and 7). As in prior art demodulators, the response characteristics of the lowpass filters 29c, 29s may be a bandwidth as narrow as ΔfMAX—the maximum allowable carrier offset. The output yc(t), ys(t) from each lowpass filter 29c, 29s is coupled to inputs 31c, 31s of a carrier offset estimator 33.
The carrier offset estimator 33 produces an estimate of the carrier offset 35 before data signal processing commences using a complex power processor 37 in conjunction with a complex Fourier transform processor 39. The filtered, carrier frequency demodulated cosine and sine components of the quadrature signal yc(t) and ys(t) are coupled to the complex power processor 37 which performs an intermediate power calculation of each quadrature component in the form of xy where the powers y comprise integer multiples of four; i.e. y=4, 8, 12, 16 . . . . In the preferred embodiment, the power y is 4.
The complex power processor 37 may be implemented to raise the input complex signal to a power which is any positive integer multiple of four. Carrier offset detection systems which use a complex power processor with a power of two or its positive integer multiples are known in the art. However, these prior art systems do not work in quadrature-modulated digital communication systems. To properly detect a carrier offset in a quadrature-modulated digital communication system demodulator, a complex power of four or its integer multiples are necessary.
The complex power processor 37 combines the lowpass filter outputs yc(t) and ys(t) into a single complex value signal y(t) defined as:
y(t)=yc(t)+jys(t) Equation 9
where j is defined as j=√−1. The complex power processor 37 generates two power output signals
qc(t)=Re{(y(t))4} Equation 10
and
qs(t)=Im{(y(t))4} Equation 11
where Re{x} denotes the real part of a complex number x, and Im{x} denotes the imaginary part of the complex number x. The complex power processor 37 removes the modulation component from each received symbol leaving the carrier frequency. The real qc(t) and imaginary qs(t) signal components are output and coupled to the complex Fourier transform processor 39.
The complex Fourier transform processor 39 treats the real qc(t) and imaginary qs(t) signal components as a single complex input signal q(t)=qc(t)+jqs(t). The processor observes q(t) for a finite period of time TW and computes a complex Fourier transform of the observed signal q(t) over this period of time.
The Fourier processor 39 performs a Fourier transform of the power processed signals from the observed period TW and outputs a frequency at which the amplitude of the transform was measured to be maximal ΔfMAX during that time period TW. The output 35 represents an accurate estimate of Δf and is signed since the transform input signal is complex. The sign identifies whether the local oscillator LO frequency is less than or greater than the carrier frequency.
A detailed, low-complexity digital implementation of the present invention 53 is shown in
The sampled signals yc[n] and ys[n] are input 51c, 51s to a complex power processor 57 and combined as a single complex signal, y[n], where y[n]=yc[n]+jys[n]. The power processor 57 produces a complex output defined by q[n]=(y[n])4. The output q[n] is coupled to a buffer 59 for accumulating N outputs from the complex power processor 57.
The accumulated block of complex numbers N is coupled to a digital Fourier transform (DFT) processor 61 which performs a transform from the time domain to the frequency domain for the N complex numbers. The DFT processor 61 outputs N complex numbers corresponding with the input N. Each number is associated with a particular frequency ranging from −fs/2 to (+fs/2−fs/N). Each frequency is fs/N away from a neighboring frequency. The frequency domain values output by the DFT 61 are assembled and compared with one another. The value having the largest magnitude represents the best estimate of the carrier frequency offset Δf.
The embodiment described in
The present invention 33, 53 may be physically realized as digital hardware or as software. The lowpass filters shown in
While the present invention has been described in terms of the preferred embodiments, other variations which are within the scope of the invention as outlined in the claims below will be apparent to those skilled in the art.
Although the features and elements of the present invention are described in the preferred embodiments in particular combinations, each feature or element can be used alone without the other features and elements of the preferred embodiments or in various combinations with or without other features and elements of the present invention. The methods or flow charts provided in the present invention may be implemented in a computer program, software, or firmware tangibly embodied in a computer-readable storage medium for execution by a general purpose computer or a processor. Examples of computer-readable storage mediums include a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs).
Suitable processors include, by way of example, a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors in association with a DSP core, a controller, a microcontroller, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) circuits, any other type of integrated circuit (IC), and/or a state machine.
A processor in association with software may be used to implement a radio frequency transceiver for use in a wireless transmit receive unit (WTRU), user equipment (UE), terminal, base station, radio network controller (RNC), or any host computer. The WTRU may be used in conjunction with modules, implemented in hardware and/or software, such as a camera, a video camera module, a videophone, a speakerphone, a vibration device, a speaker, a microphone, a television transceiver, a hands free headset, a keyboard, a Bluetooth® module, a frequency modulated (FM) radio unit, a liquid crystal display (LCD) display unit, an organic light-emitting diode (OLED) display unit, a digital music player, a media player, a video game player module, an Internet browser, and/or any wireless local area network (WLAN) module.
This application is a continuation of application Ser. No. 10/258,626, filed on Mar. 25, 2003; which claims priority from PCT Application No. PCT/US00/11125, filed on Apr. 25, 2000, all of which are incorporated herein by reference.
Number | Date | Country | |
---|---|---|---|
Parent | 10258626 | Mar 2003 | US |
Child | 11888168 | Jul 2007 | US |