Claims
- 1. A method of generating a verification condition for a computer program that comprises a collection of program statements and that contains a pair of conditional program execution paths preceding a control join point and an expression following the control join point, the method comprising:
when the program statements in the computer program include at least one assignment statement,
transforming said at least one assignment statement into an assume command, wherein said transforming includes mapping a variable that is assigned a value by said at least one assignment statement into an expression denoting a value of the variable after said at least one assignment statement; and applying at least one precondition operator to the computer program to produce a verification condition which includes a single instance of a subexpression derived from the expression following the control join point, wherein, while applying the at least one precondition operator to the computer program, a label is given to a value, at the control join point, of a variable that is modified on at least one of the conditional program execution paths.
- 2. The method of claim 1, additionally comprising:
when the program statements in the computer program include at least one assignment statement that assigns a simple expression to a variable,
transforming, when said at least one assignment statement is present, said at least one assignment statement into an assume command, wherein said transforming also produces a mapping that maps said variable to the result of applying to said simple expression a mapping corresponding to a program state before said assignment statement.
- 3. The method of claim 1 wherein said at least one precondition operator comprises at least one instance of a norm operator.
- 4. The method of claim 1 wherein said at least one precondition operator comprises at least one instance of a bad operator.
- 5. The method of claim 1 wherein said at least one precondition operator comprises at least one instance of an exc operator.
- 6. The method of claim I additionally comprising, prior to said transforming, converting said computer program to an intermediate form.
- 7. The method of claim 6 wherein said intermediate form is a guarded command form.
- 8. The method of claim 7 wherein the at least one pair of conditional program execution paths is converted into a first group of guarded commands coupled by a choice operator to a second group of guarded commands and wherein the verification condition includes:
a logical OR of a first condition corresponding to said first group of guarded commands and a second condition corresponding to said second group of guarded commands; connected by an implication to a single instance of a post-condition, corresponding to said expression following the control join point, that must always be true after execution of either the first or the second groups of guarded commands.
- 9. The method of claim 8, wherein the variable mapping resulting from said at least one assignment statement is produced by a transformation function, the transformation function having as one of its outputs a modified variable mapping for application to a subsequent statement of the computer program, wherein the modified mapping is based on variable mappings produced by transformation functions on at least one earlier statement of the computer program.
- 10. The method of claim 9, wherein the variable mapping resulting from said at least one assignment statement maps the variable assigned by that statement to a new variable introduced by the transformation function.
- 11. The method of claim 9, wherein the transformation function, when applied to the first and second groups of guarded commands coupled by the choice operator, generates a set of fix up code for said first group and for said second group of guarded commands coupled by the choice operator, wherein each of said sets of fix up code collectively synchronize the new variables used in said first and second groups of guarded commands.
- 12. The method of claim 11, wherein the modified mapping produced by the transformation function, when applied to the pair of groups of guarded commands coupled by the choice operator, is based on variable mappings produced by the transformation function when applied to both the first and second groups of guarded commands.
- 13. The method of claim 1 additionally comprising:
passing the verification condition to a theorem prover and determining whether or not the verification condition is valid.
- 14. The method of claim 13 wherein said theorem prover generates at least one counter-example, if the truth of the verification condition cannot be proved.
- 15. The method of claim 14 additionally comprising:
analyzing said at least one counter-example and producing an error message.
- 16. A computer readable medium for use in conjunction with a computer system, the computer readable medium comprising a computer readable storage medium and a computer program mechanism embedded therein, the computer program mechanism comprising:
instructions for generating a verification condition for a computer program that comprises a collection of program statements and that contains a pair of conditional program execution paths preceding a control join point and an expression following the control join point; instructions for determining when the program statements in the computer program include at least one assignment statement, and,
instructions for transforming said at least one assignment statement into an assume command, wherein said transforming includes mapping a variable that is assigned a value by said at least one assignment statement into an expression denoting a value of the variable after said at least one assignment statement; and instructions for applying at least one precondition operator to the computer program to produce a verification condition which includes a single instance of a subexpression derived from the expression following the control join point, wherein, while applying the at least one precondition operator to the computer program, a label is given to a value, at the control join point, of a variable that is modified on at least one of the conditional program execution paths.
- 17. The computer readable medium of claim 16, additionally comprising:
instructions for determining when the program statements in the computer program include at least one assignment statement that assigns a variable to a simple expression, and
instructions for transforming, when said at least one assignment statement is present, said at least one assignment statement into an assume command, wherein said transforming also produces a mapping that maps said variable to the result of applying to said simple expression a mapping corresponding to a program state before said assignment statement.
- 18. The computer readable medium of claim 16 additionally comprising instructions for expressing said precondition operator in a form containing at least one operator selected from the group consisting of bad, norm and exc.
- 19. The computer readable medium of claim 16 additionally comprising instructions for converting said computer program into an intermediate form.
- 20. The computer readable medium of claim 19 additionally comprising instructions for converting said computer program into a guarded command form.
- 21. The computer readable medium of claim 19 additionally comprising instructions for passing the verification condition to a theorem prover and determining whether or not the verification condition is valid.
- 22. An apparatus for generating a verification condition for a computer program that comprises a collection of program statements and that contains a pair of conditional program execution paths preceding a control join point and an expression following the control join point, the apparatus comprising:
a memory containing the computer program, an operating system and at least one processor configured to execute mathematical operations on the computer program, wherein said computer processor:
when the program statements in the computer program include at least one assignment statement,
transforms said at least one assignment statement into an assume command, and includes mapping a variable that is assigned a value by said at least one assignment statement into an expression denoting a value of the variable after said at least one assignment statement;; and applies at least one precondition operator to the computer program to produce a verification condition which includes a single instance of a subexpression derived from the expression following the control join point, wherein, while applying the at least one precondition operator to the computer program, a label is given to a value, at the control join point, of a variable that is modified on at least one of the conditional program execution paths.
- 23. The apparatus of claim 22, wherein said computer processor additionally:
determines whether the program statements in the computer program include at least one assignment statement that assigns a variable to a simple expression, and
transforms, when said at least one assignment statement is present, said at least one assignment statement into an assume command, and also produces a mapping that maps said variable to the result of applying to said simple expression a mapping corresponding to a program state before said assignment statement.
- 24. The apparatus of claim 22, wherein said computer processor additionally expresses said precondition operator in a form containing at least one operator selected from the group consisting of bad, norm and exc.
- 25. The apparatus of claim 22, wherein said computer processor additionally converts said computer program into an intermediate form.
- 26. The apparatus of claim 22, wherein said computer processor additionally converts said computer program into a guarded command form.
- 27. The apparatus of claim 22, wherein said computer processor additionally passes the verification condition to a theorem prover and determines whether or not the verification condition is valid.
Parent Case Info
[0001] This application claims priority to U.S. provisional patent application no. 60/218,305, filed Jul. 14, 2000, entitled “Case-reduced Verification Condition Generation System And Method,” which is hereby incorporated by reference in its entirety.
Provisional Applications (1)
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Number |
Date |
Country |
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60218305 |
Jul 2000 |
US |