NSF Award
1914875
The wireless communications of 5G and beyond facilitate unprecedented quality of service such as ultrahigh speed and low latency. However, this evolution is inevitably accompanied by severe energy inefficiency mainly due to the degraded efficiency of radio-frequency (RF) power amplifiers (PAs) that are the most power-consuming module in wireless systems. On the other hand, the existing efficiency-enhancement technology, e.g., industry-standard envelope tracking, is expected to become ineffective when accommodating increasingly wide modulation bandwidth of signals. The overarching goal of this research is to investigate and demonstrate a new architecture of wideband, highly efficient, and intrinsically linearized PA and radio transmitter as a key enabler to next-generation energy-saving and ultra-fast wireless communications. The successful completion of the proposed research will mark a milestone of breaking the bandwidth limitation on PA efficiency and linearity, which crucially contributes to the growth of wireless and semiconductor industries. It is important to emphasize that the enhancement of PA efficiency will significantly reduce the energy consumption of entire wireless networks with improved environmental friendliness. Moreover, the proposed silicon-integration method provides an ideal solution to the high-cost, non-integrability, and limited-manufacturing-capacity issues of radio frontend development faced by industry. This is expected to be critical in expediting the dissemination of emerging technologies and in expanding the wireless connections from finite number of people to nearly infinite number of things (i.e., Internet of Everything). Furthermore, this research will provide foundational support to wireless and semiconductor industries by training next-generation young professionals and through collaborations and data sharing. Impacts of this research will be further broadened and prolonged through educational and inspiring outreach efforts.<br/><br/>The next-generation wireless communications will feature wideband, high speed and low latency, which leads to extreme challenges for efficiency and linearity of RF PAs and transmitters. This project proposes a transformative concept called Loadline-Envelope-Tracking (LET) Transmitter Architecture. By shifting the paradigm of envelope tracking (ET) from the existing supply-modulation technique to the new loadline-modulation technique, this new architecture not only holds the promise to fundamentally break the bandwidth and linearity limitations imposed on existing PA efficiency-enhancement technologies, but it also inherits the advanced features of the industry-standard ET system. This research pursues the following key innovations: 1) The novel radio transmitter architecture based on loadline envelope tracking enabling wideband efficiency enhancement and intrinsic linearization of RF PAs, a significant technological leap forward in wireless communications. 2) An innovative RF-analog-digital co-design methodology to concurrently achieve optimized efficiency and linearity of PA, eliminating the necessity of external digital linearization that can be energy inefficient under wide modulation bandwidths. 3) The first-ever revealing of the speed/bandwidth limiting factors for loadline modulation and the corresponding circuit and system design methodology. 4) A silicon-integration method based on high-voltage Complementary Metal Oxide Semiconductor (HV-CMOS) process to integrate the entire LET transmitter frontend involving PA, tunable matching network, and high-speed loadline modulator, leading to the first-ever fully integrated, massively manufacturable, and low-cost single-chip solution.<br/><br/>This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
