This application claims the benefit, under 35 U.S.C. §365 of International Application PCT/US2005/001188, filed Jan. 14, 2005, which was published in accordance with PCT Article 21(2) on July 27, 2006 in English. This application is related to copending, commonly assigned, U.S. patent applications Ser. Nos., 11/795,049 entitled EFFICIENT MAXIMAL RATIO COMBINER FOR CDMA SYSTEMS, filed on Jul. 10, 2007; 11/794,973 entitled RAM-BASED SCRAMBLING CODE GENERATOR FOR CDMA, filed on Jul. 9, 2007; 11/792,885 entitled HARDWARE-EFFICIENT SEARCHER ARCHITECTURE FOR CDMA CELLULAR RECEIVERS, filed on Jun. 11, 2007; and 11/795,063 entitled METHOD AND SYSTEM FOR SUB-CHIP RESOLUTION FOR SECONDARY CELL SEARCH, filed on Jul. 10, 2007.
The present invention generally relates to a receiver architecture for use with spread spectrum and Code Division Multiple Access (CDMA) wireless networks.
Universal Mobile Telecommunications System (UMTS) is a standard for 3G wireless networks, as defined by the International Telecommunications Union (ITU). UMTS defines a communication scheme composed of slots, with 15 slots forming a frame. Each slot specifies, among other data, synchronization information used to synchronize communications between nodes of a UMTS compliant network.
An important procedure performed by a receiver within a UMTS network, for example a CDMA mobile receiver, is the cell search operation. Cell searching typically is performed by a cell search system that is incorporated as part of the receiver. The cell search system is activated after the receiver is powered on to determine synchronization information pertaining to the cell in which the receiver is located. The cell search operation is a three stage process. That is, the cell search system performs slot synchronization (primary synchronization), frame synchronization and scrambling code group determination (secondary synchronization), and scrambling code determination.
In performing cell searching, the cell search system accesses a Synchronization Channel (SCH) and a Common Pilot Channel (CPICH) of the received wireless signal. The SCH is a composite channel formed from a Primary SCH and a Secondary SCH. Within each slot, the Primary SCH specifies a Primary Synchronization Code (PSC). The Primary SCH, however, only contains data during the first 256 chips of each 2560 chip slot. As is known, “chip” or “chip rate” refers to the rate of the spreading code within a CDMA communication system.
The cell search system of the receiver uses the Primary SCH to acquire slot synchronization with a cell. Typically this is performed using a single matched filter, or other similar device. The filter is matched to the PSC which is common to all cells. The slot timing of a cell can be obtained by detecting peaks in the matched filter output.
The cell search system of the receiver performs frame synchronization using the Secondary SCH. The Secondary SCH specifies, within each slot, a Secondary Synchronization Code (SSC). Unlike the PSC, the SSC can be one of 16 different codes. Each slot contains one SSC. The SSC used varies from slot to slot to form a sequence that has a period of one frame, or 15 slots. There are 64 possible SSC sequences and each sequence corresponds to one of 64 possible scrambling code groups. By observing a full frame of data, the receiver can determine which of the 64 SSC sequences is being transmitted. Since the SSC sequence repeats with a period equal to one frame, the sequence can be used to achieve frame synchronization at the receiver because frame boundaries can be identified. The SSC sequence that is transmitted further indicates which scrambling code group is used in the current cell.
Each scrambling code group includes 8 possible scrambling codes. To determine the actual scrambling code, the cell search system of the receiver correlates the received CPICH signal with each of the 8 possible scrambling codes in the identified scrambling code group until the correct scrambling code is determined. After the actual scrambling code has been identified, the Primary Common Control Channel (CCPCH) can be detected so that system and cell specific Broadcast Channel (BCH) information can be read.
A conventional cell search system typically includes a matched filter correlator for correlating the received samples against the CPICH sequence. Peak detection hardware also is included to locate the peak of the 8 correlations for a given scrambling code group. Other logic also is included to determine which of the peaks is the strongest of the 8 so that a particular scrambling code from the 8 in the scrambling code group can be identified.
Conventional cell search designs are expensive both in terms of the amount of hardware required and the increased power usage. Traditionally, a cell search system is implemented as an application specific integrated circuit (ASIC). Because the system is large, an increased die size is required for fabrication. Larger ASIC designs include more gates, which consume more power. This can be critical with respect to battery life in a mobile receiver. These problems are exacerbated in that scrambling code determination is performed infrequently—typically only when the receiver is powered on or loses lock.
As such, it would be desirable to reduce the amount of hardware required within a receiver for the cell search process and thus reduce the power consumption of the cell search system in the receiver.
In accordance with the principles of the invention, we have realized it is possible to further reduce the amount of hardware required in the cell search system of the receiver. In particular, the cell search system performs primary and secondary synchronization while identification of the scrambling code is moved from the cell search system to the searcher of the receiver. Thus, the hardware associated with the scrambling code identification in the cell search system can be eliminated.
In an illustrative embodiment, the receiver is a CDMA receiver. Illustratively, the cell search system is deactivated after performing secondary synchronization to determine the associated scrambling code group. The searcher is then activated after the secondary synchronization is performed by the cell search system. The searcher correlates each scrambling code of the associated scrambling code group with a received Common Pilot Channel (CPICH) signal and selects that scrambling code having the largest correlation peak. The searcher further can correlate different offsets of each scrambling code of the scrambling code group.
In accordance with a feature of the invention, the receiver can include a scrambling code generator that dynamically generates at least one scrambling code of the associated scrambling code group. The dynamically generated scrambling code(s) can be used by the searcher to select the particular scrambling code. In another embodiment, a memory can be included that stores at least one pre-generated scrambling code of the associated scrambling code group. In that case, the searcher reads the one or more scrambling codes of the associated scrambling code group from the memory for selecting the particular scrambling code.
Another aspect of the present invention can include a method of cell searching for use with a spread spectrum receiver, such as a CDMA receiver. The method can include performing a primary and a secondary synchronization using a cell search system, thereby identifying a scrambling code group, and selecting a scrambling code from the scrambling code group using a searcher.
The method can include deactivating the cell search system after the performing step and activating the searcher prior to the selecting step. The scrambling code can be selected by correlating each scrambling code of the scrambling code group with a received CPICH signal and selecting that scrambling code having the largest correlation peak. In performing the correlations, different offsets of each scrambling code of the scrambling code group can be correlated.
Illustratively, the method can include storing at least one scrambling code of the scrambling code group within a memory and reading one or more scrambling codes of the scrambling code group from the memory for performing the correlating step as needed. In another embodiment, the method can include dynamically, generating at least one scrambling code for use in the correlating step.
Preferred embodiments of the present invention will be described below in more detail, with reference to the accompanying drawings, in which:
Other than the inventive concept, the elements shown in the figures are well known and will not be described in detail. Also, familiarity with UMTS-based wireless communications systems is assumed and is not described in detail herein. For example, other than the inventive concept, spread spectrum transmission and reception, cells (base stations), user equipment (UE), downlink channels, uplink channels, the searcher and RAKE receivers are well known and not described herein. In addition, the inventive concept may be implemented using conventional programming techniques, which, as such, will not be described herein. Finally, like-numbers on the figures represent similar elements.
The present invention provides a solution for determining scrambling codes within a receiver. In accordance with the inventive arrangements disclosed herein, cell searching is implemented not as a three stage process but as a two stage process where primary synchronization and secondary synchronization are performed by a cell search system and scrambling code determination is performed using other existing hardware in the receiver, such as a searcher.
More particularly, after the Secondary SCH channel is acquired by cell search hardware, that cell search hardware or system can be deactivated to conserve power. The searcher then can be enabled. Typically, the searcher hardware is used to identify multipath components. Since the searcher is already configured to perform such processing we have realized that the existing searcher hardware can, in accordance with the principles of the invention, also be used for purposes of scrambling code determination. Accordingly, the hardware necessary to implement the cell search system can be reduced.
Filtered signals are provided to a tapped delay line 115, which further provides signals to a cell search system 120, a searcher 125, as well as one or more fingers 130A-130N. The tapped delay line 115 includes a plurality of taps through which various samples of a multipath signal can be provided. Each tap can provide samples for a different delayed version of a received multipath signal.
The signal provided to the cell search system 120 includes timing information. In particular, the signal includes a composite Synchronization Channel (SCH) and a Common Pilot Channel (CPICH), allowing the cell search system 120 to determine timing information from the provided signal. The cell search system 120 performs two stages of the cell search operation. Specifically, slot synchronization is performed using the primary SCH and frame synchronization and scrambling code group determination is performed using the secondary SCH. As noted, the cell search system 120 need not perform the third stage of scrambling code determination. Thus, such hardware can be excluded from the cell search system 120, thereby reducing size and power consumption.
Once the secondary SCH is acquired, the cell search system 120 can be deactivated or powered down. For example, the cell search system 120 can be placed in a standby mode. The searcher 125, which may be in a standby or low power mode, then can be activated or energized. Once energized, the searcher 125 performs the third stage of scrambling code determination. The cell search system 120 and the searcher 125 can be implemented as one or more integrated circuits (IC's), ASICs, processors, controllers, discrete components, or any combination thereof.
A processor (not shown) can be included to facilitate communications among the various components of the receiver 100 through the processor interface 150. Thus, the searcher 125, using the scrambling code group determined by the cell search system 120, can be used to identify the particular scrambling code to be used. Once the searcher 125 is enabled, the searcher searches or correlates the Common Pilot Channel (CPICH) signal against each of the 8 scrambling codes in the scrambling code group determined by the cell search system 120.
Since the cell search system 120 has already achieved slot and frame synchronization, the searcher 125 need only correlate against a small number of scrambling code offsets in the beginning of the searcher space (e.g., from offset 0 to offset M). In the UMTS standard, there are 8 scrambling codes in a given scrambling code group. The highest correlation value of each of the eight searches is identified and the values can be stored. It should be appreciated that since similar functions are performed during normal searcher operations, no additional hardware is required in the searcher 125. The scrambling code used by the wireless transmitter is then identified as the code that corresponds to the highest correlation peak. The latter is illustratively performed by processor 150 accessing memory (not shown) of searcher 125.
Scrambling code generation, as performed by the scrambling code generator 135, can be performed using any of a variety of different techniques. In one embodiment, the 8 scrambling codes can be generated on-the-fly. That is, the scrambling code generator 135 can generate each scrambling code dynamically for use in the correlation as needed. For example, and as known in the art, a scrambling code generator utilizes hardware-implemented linear feedback shift registers (LFSRs) to generate scrambling codes, one LFSR per scrambling code. An LFSR generates a scrambling code dynamically, or “on the fly”, with a new scrambling code chip value being generated for each chip. (A scrambling code covers a UMTS frame (38,400 chips) and comprises 38,400 chip values.)
In another embodiment, one or more, or all 8 scrambling codes can be generated prior to the beginning the third stage. For example, the pre-generated scrambling codes can be stored in a memory by the processor. Thus, the scrambling code generator 135 can be implemented as a memory or a memory block, such as a memory with accompanying logic for storing the 38,400 chip values of the scrambling code. (It should be noted that each scrambling code chip value may further comprise in-phase (I) and quadrature (Q) components.) Notably, if all 8 scrambling codes are stored within the scrambling code memory, it is possible for the receiver to later communicate with multiple base stations, for example during a so-called “soft handoff”, where each base station communicates using a different scrambling code.
Once the scrambling code is determined, the searcher 125 returns to it previous task of correlating the multipath signal against the scrambling code to obtain profiles of, and for identifying, the locations of the various paths within the multipath signal. Each of the fingers 130A-130N can then be assigned to a different path of the multipath signal as determined by the searcher 125.
As known in the art, fingers 130A-130N further process the various paths using a spreading code provided by a spreading code generator 140. A maximal ratio combiner (MRC) 145 phase aligns the individual multi-path signals from each finger 130A-130N using the CPICH signal. The maximal ratio combiner 145 produces a constructively combined signal that is provided to a processor interface 150.
It should be appreciated that because the taps of the tapped delay line 115 each provide a different version of the delayed multipath signal, delay hardware is unnecessary. In other words, each different version of the multipath signal provided from a particular tap of the tapped delay line 115 is time aligned with other versions provided from other taps. As such, no delay hardware need be incorporated between the outputs of the fingers 130A-130N and the MRC 145.
In step 210, and in accordance with the principles of the invention, the searcher is run using one of the scrambling codes from the identified scrambling code group. The searcher is run over a short window of offsets from 0 to some value M. Since slot and frame synchronization have already been achieved (in step 205), the searcher need only correlate against a small window of scrambling code offsets. For example, if the cell search synchronized accurately (i.e., the correct scrambling code group was identified), correlation need only involve several scrambling code offsets (M=4). Otherwise, the window can be set to be several chips wide to ensure that the peak is found. Illustratively, in the case where the searcher is inactive until needed, the searcher can be activated prior to step 210.
In step 215, the largest correlation value found in the window of offsets of 0 to M from step 210 is stored. Illustratively, the correlations are compared in terms of magnitude so that the largest correlation value with respect to magnitude is stored. In step 220, a determination is made as to whether all 8 scrambling codes have been searched of the identified scrambling code group. If all of the scrambling codes have been processed, the method 200 proceeds to step 225. If not, the method 200 loops back to step 210 so that the searcher is run with the next scrambling code of the identified scrambling code group. Steps 210, 215, 220 are repeated until all of the scrambling codes of the identified scrambling code group have been processed.
In step 225, the 8 stored correlation peaks from processing the 8 scrambling codes of the identified scrambling code group are evaluated. The largest correlation peak is selected and the scrambling code that corresponds to the largest of the 8 correlation peaks is identified as the scrambling code used by the wireless transmitter. ,
Once the scrambling code is determined, the various paths of the multipath signal can be processed as described above. More particularly, the paths can be extracted, derotated, and then summed.
The foregoing merely illustrates the principles of the invention and it will thus be appreciated that those skilled in the art will be able to devise numerous alternative arrangements which, although not explicitly described herein, embody the principles of the invention and are within its spirit and scope. For example, although illustrated in the context of separate functional elements, these functional elements may be embodied on one or more integrated circuits (ICs) and/or in one or more stored program-controlled processors (e.g., a microprocessor or digital signal processor (DSP)). Similarly, although illustrated in the context of a UMTS-based system, the inventive concept is applicable to other communications system. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims.
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/US2005/001188 | 1/14/2005 | WO | 00 | 7/10/2007 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2006/078234 | 7/27/2006 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
5060239 | Briscoe et al. | Oct 1991 | A |
5483292 | Ko | Jan 1996 | A |
5648893 | Loo et al. | Jul 1997 | A |
5648983 | Kostic et al. | Jul 1997 | A |
5764687 | Easton | Jun 1998 | A |
5796775 | Aoyama | Aug 1998 | A |
5995512 | Pogue, Jr. | Nov 1999 | A |
6067293 | Shoji | May 2000 | A |
6185199 | Zehavi | Feb 2001 | B1 |
6366606 | Sriram | Apr 2002 | B1 |
6480527 | Kim | Nov 2002 | B1 |
6700925 | Ohnishi | Mar 2004 | B1 |
6771693 | Hackett | Aug 2004 | B2 |
6888372 | Hazanchuk | May 2005 | B1 |
7130331 | Kang et al. | Oct 2006 | B2 |
7248635 | Arneson et al. | Jul 2007 | B1 |
7327779 | Lugil et al. | Feb 2008 | B1 |
7352704 | Toussi et al. | Apr 2008 | B1 |
7532663 | Lewis | May 2009 | B2 |
7630730 | Becker et al. | Dec 2009 | B2 |
7684472 | Litwin et al. | Mar 2010 | B2 |
20010004378 | Takeuchi et al. | Jun 2001 | A1 |
20010036222 | Doetsch et al. | Nov 2001 | A1 |
20020110103 | Jung | Aug 2002 | A1 |
20020110123 | Shitama | Aug 2002 | A1 |
20030103476 | Choi et al. | Jun 2003 | A1 |
20030103557 | Dolwin | Jun 2003 | A1 |
20030123528 | Hackett | Jul 2003 | A1 |
20030156462 | Lim et al. | Aug 2003 | A1 |
20030161390 | Teague et al. | Aug 2003 | A1 |
20030169702 | Ryu et al. | Sep 2003 | A1 |
20030176171 | Sato et al. | Sep 2003 | A1 |
20030193922 | Ho et al. | Oct 2003 | A1 |
20030202541 | Lim et al. | Oct 2003 | A1 |
20030202565 | Li et al. | Oct 2003 | A1 |
20030223384 | Sengupta et al. | Dec 2003 | A1 |
20030235238 | Schelm et al. | Dec 2003 | A1 |
20040017846 | Fernandez-Corbaton | Jan 2004 | A1 |
20040062297 | McDonough et al. | Apr 2004 | A1 |
20040071199 | Boesel et al. | Apr 2004 | A1 |
20040085921 | Lin | May 2004 | A1 |
20040127213 | Hwang | Jul 2004 | A1 |
20040165566 | Lee et al. | Aug 2004 | A1 |
20040240529 | Leonard et al. | Dec 2004 | A1 |
20040250049 | Becker et al. | Dec 2004 | A1 |
20050002369 | Ro et al. | Jan 2005 | A1 |
20050002442 | Litwin et al. | Jan 2005 | A1 |
20050002446 | Litwin et al. | Jan 2005 | A1 |
20050047488 | Sugahara | Mar 2005 | A1 |
20050047492 | Amerga et al. | Mar 2005 | A1 |
20050053049 | Blanz et al. | Mar 2005 | A1 |
20050100230 | Moore | May 2005 | A1 |
20050207479 | Ruprich et al. | Sep 2005 | A1 |
20050208959 | Chen et al. | Sep 2005 | A1 |
20050225804 | Arquilevich et al. | Oct 2005 | A1 |
20060126491 | Ro et al. | Jun 2006 | A1 |
20060188005 | Espax | Aug 2006 | A1 |
20060199596 | Teauge et al. | Sep 2006 | A1 |
20070025428 | Hahm et al. | Feb 2007 | A1 |
20070189410 | Zeng | Aug 2007 | A1 |
20070195864 | Jonsson et al. | Aug 2007 | A1 |
20080130720 | Dolwin | Jun 2008 | A1 |
20080225963 | Lakkis | Sep 2008 | A1 |
20090258605 | Boos | Oct 2009 | A1 |
Number | Date | Country |
---|---|---|
1189265 | Jul 1998 | CN |
1280428 | Jul 2001 | CN |
1365211 | Aug 2002 | CN |
10241693 | Mar 2004 | DE |
0691754 | Jan 1996 | EP |
0994572 | Apr 2000 | EP |
1075090 | Feb 2001 | EP |
1109323 | Jun 2001 | EP |
1517454 | Mar 2005 | EP |
10173629 | Jun 1998 | JP |
10240388 | Sep 1998 | JP |
2000124847 | Apr 2000 | JP |
20000349681 | Dec 2000 | JP |
2004164566 | Jun 2004 | JP |
2006520149 | Aug 2006 | JP |
WO2004082149 | Sep 2004 | WO |
Entry |
---|
Sanat Kamal Bahl: Reconfigurable Synchronization Circuit for Software Defined Radios Using On-Chip Processor in FPGAs, Dept. of Computer Science and Electrical Engineering, Univ. of Maryland Baltimore County, Abstract and Drawings. |
WCDMA Baseband Design Faces Challenges, Wireless Systems Design, Jan./Feb. 2003, pp. 34-37. |
Search Report Dated Aug. 23, 2005. |
Kiessling et al., “Performance Enhancements to the UMTS (W-CDMA) Initial Cell Search Algorithm”, Agere Systems, IEEE, 2002. |
Number | Date | Country | |
---|---|---|---|
20080025376 A1 | Jan 2008 | US |